src/gallium/drivers/virgl/virgl_screen.c

   1 /*
   2  * Copyright 2014, 2015 Red Hat.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * on the rights to use, copy, modify, merge, publish, distribute, sub
   8  * license, and/or sell copies of the Software, and to permit persons to whom
   9  * the Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  21  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  22  */
  23 #include "util/u_memory.h"
  24 #include "util/u_format.h"
  25 #include "util/u_format_s3tc.h"
  26 #include "util/u_video.h"
  27 #include "util/os_time.h"
  28 #include "pipe/p_defines.h"
  29 #include "pipe/p_screen.h"
  30
  31 #include "tgsi/tgsi_exec.h"
  32
  33 #include "virgl_screen.h"
  34 #include "virgl_resource.h"
  35 #include "virgl_public.h"
  36 #include "virgl_context.h"
  37
  38 #define SP_MAX_TEXTURE_2D_LEVELS 15  /* 16K x 16K */
  39 #define SP_MAX_TEXTURE_3D_LEVELS 9   /* 512 x 512 x 512 */
  40 #define SP_MAX_TEXTURE_CUBE_LEVELS 13  /* 4K x 4K */
  41
  42 static const char *
  43 virgl_get_vendor(struct pipe_screen *screen)
  44 {
  45    return "Red Hat";
  46 }
  47
  48
  49 static const char *
  50 virgl_get_name(struct pipe_screen *screen)
  51 {
  52    return "virgl";
  53 }
  54
  55 static int
  56 virgl_get_param(struct pipe_screen *screen, enum pipe_cap param)
  57 {
  58    struct virgl_screen *vscreen = virgl_screen(screen);
  59    switch (param) {
  60    case PIPE_CAP_NPOT_TEXTURES:
  61       return 1;
  62    case PIPE_CAP_SM3:
  63       return 1;
  64    case PIPE_CAP_ANISOTROPIC_FILTER:
  65       return 1;
  66    case PIPE_CAP_POINT_SPRITE:
  67       return 1;
  68    case PIPE_CAP_MAX_RENDER_TARGETS:
  69       return vscreen->caps.caps.v1.max_render_targets;
  70    case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
  71       return vscreen->caps.caps.v1.max_dual_source_render_targets;
  72    case PIPE_CAP_OCCLUSION_QUERY:
  73       return vscreen->caps.caps.v1.bset.occlusion_query;
  74    case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
  75       return vscreen->caps.caps.v1.bset.mirror_clamp;
  76    case PIPE_CAP_TEXTURE_SWIZZLE:
  77       return 1;
  78    case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
  79       return SP_MAX_TEXTURE_2D_LEVELS;
  80    case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
  81       return SP_MAX_TEXTURE_3D_LEVELS;
  82    case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
  83       return SP_MAX_TEXTURE_CUBE_LEVELS;
  84    case PIPE_CAP_BLEND_EQUATION_SEPARATE:
  85       return 1;
  86    case PIPE_CAP_INDEP_BLEND_ENABLE:
  87       return vscreen->caps.caps.v1.bset.indep_blend_enable;
  88    case PIPE_CAP_INDEP_BLEND_FUNC:
  89       return vscreen->caps.caps.v1.bset.indep_blend_func;
  90    case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
  91    case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
  92    case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
  93       return 1;
  94    case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
  95       return vscreen->caps.caps.v1.bset.fragment_coord_conventions;
  96    case PIPE_CAP_DEPTH_CLIP_DISABLE:
  97       return vscreen->caps.caps.v1.bset.depth_clip_disable;
  98    case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
  99       return vscreen->caps.caps.v1.max_streamout_buffers;
 100    case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
 101    case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
 102       return 16*4;
 103    case PIPE_CAP_PRIMITIVE_RESTART:
 104       return vscreen->caps.caps.v1.bset.primitive_restart;
 105    case PIPE_CAP_SHADER_STENCIL_EXPORT:
 106       return vscreen->caps.caps.v1.bset.shader_stencil_export;
 107    case PIPE_CAP_TGSI_INSTANCEID:
 108    case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
 109       return 1;
 110    case PIPE_CAP_SEAMLESS_CUBE_MAP:
 111       return vscreen->caps.caps.v1.bset.seamless_cube_map;
 112    case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
 113       return vscreen->caps.caps.v1.bset.seamless_cube_map_per_texture;
 114    case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
 115       return vscreen->caps.caps.v1.max_texture_array_layers;
 116    case PIPE_CAP_MIN_TEXEL_OFFSET:
 117       return vscreen->caps.caps.v2.min_texel_offset;
 118    case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
 119       return vscreen->caps.caps.v2.min_texture_gather_offset;
 120    case PIPE_CAP_MAX_TEXEL_OFFSET:
 121       return vscreen->caps.caps.v2.max_texel_offset;
 122    case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
 123       return vscreen->caps.caps.v2.max_texture_gather_offset;
 124    case PIPE_CAP_CONDITIONAL_RENDER:
 125       return vscreen->caps.caps.v1.bset.conditional_render;
 126    case PIPE_CAP_TEXTURE_BARRIER:
 127       return 0;
 128    case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
 129       return 1;
 130    case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
 131    case PIPE_CAP_VERTEX_COLOR_CLAMPED:
 132       return vscreen->caps.caps.v1.bset.color_clamping;
 133    case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
 134       return 1;
 135    case PIPE_CAP_GLSL_FEATURE_LEVEL:
 136       return vscreen->caps.caps.v1.glsl_level;
 137    case PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY:
 138       return MIN2(vscreen->caps.caps.v1.glsl_level, 140);
 139    case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
 140       return 0;
 141    case PIPE_CAP_COMPUTE:
 142       return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_COMPUTE_SHADER;
 143    case PIPE_CAP_USER_VERTEX_BUFFERS:
 144       return 0;
 145    case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
 146       return vscreen->caps.caps.v2.uniform_buffer_offset_alignment;
 147    case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
 148    case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS:
 149       return vscreen->caps.caps.v1.bset.streamout_pause_resume;
 150    case PIPE_CAP_START_INSTANCE:
 151       return vscreen->caps.caps.v1.bset.start_instance;
 152    case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
 153    case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
 154    case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
 155    case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
 156    case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
 157       return 0;
 158    case PIPE_CAP_QUERY_TIMESTAMP:
 159       return 1;
 160    case PIPE_CAP_QUERY_TIME_ELAPSED:
 161       return 0;
 162    case PIPE_CAP_TGSI_TEXCOORD:
 163       return 0;
 164    case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
 165       return VIRGL_MAP_BUFFER_ALIGNMENT;
 166    case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
 167       return vscreen->caps.caps.v1.max_tbo_size > 0;
 168    case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
 169       return vscreen->caps.caps.v2.texture_buffer_offset_alignment;
 170    case PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY:
 171       return 0;
 172    case PIPE_CAP_CUBE_MAP_ARRAY:
 173       return vscreen->caps.caps.v1.bset.cube_map_array;
 174    case PIPE_CAP_TEXTURE_MULTISAMPLE:
 175       return vscreen->caps.caps.v1.bset.texture_multisample;
 176    case PIPE_CAP_MAX_VIEWPORTS:
 177       return vscreen->caps.caps.v1.max_viewports;
 178    case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
 179       return vscreen->caps.caps.v1.max_tbo_size;
 180    case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
 181    case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
 182    case PIPE_CAP_ENDIANNESS:
 183       return 0;
 184    case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
 185    case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
 186       return 1;
 187    case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
 188       return 0;
 189    case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
 190       return vscreen->caps.caps.v2.max_geom_output_vertices;
 191    case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
 192       return vscreen->caps.caps.v2.max_geom_total_output_components;
 193    case PIPE_CAP_TEXTURE_QUERY_LOD:
 194       return vscreen->caps.caps.v1.bset.texture_query_lod;
 195    case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
 196       return vscreen->caps.caps.v1.max_texture_gather_components;
 197    case PIPE_CAP_DRAW_INDIRECT:
 198       return vscreen->caps.caps.v1.bset.has_indirect_draw;
 199    case PIPE_CAP_SAMPLE_SHADING:
 200    case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
 201       return vscreen->caps.caps.v1.bset.has_sample_shading;
 202    case PIPE_CAP_CULL_DISTANCE:
 203       return vscreen->caps.caps.v1.bset.has_cull;
 204    case PIPE_CAP_MAX_VERTEX_STREAMS:
 205       return vscreen->caps.caps.v1.glsl_level >= 400 ? 4 : 1;
 206    case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
 207       return vscreen->caps.caps.v1.bset.conditional_render_inverted;
 208    case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
 209       return vscreen->caps.caps.v1.bset.derivative_control;
 210    case PIPE_CAP_POLYGON_OFFSET_CLAMP:
 211       return vscreen->caps.caps.v1.bset.polygon_offset_clamp;
 212    case PIPE_CAP_QUERY_SO_OVERFLOW:
 213       return vscreen->caps.caps.v1.bset.transform_feedback_overflow_query;
 214    case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
 215       return vscreen->caps.caps.v2.shader_buffer_offset_alignment;
 216    case PIPE_CAP_DOUBLES:
 217       return vscreen->caps.caps.v1.bset.has_fp64;
 218    case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
 219       return vscreen->caps.caps.v2.max_shader_patch_varyings;
 220    case PIPE_CAP_SAMPLER_VIEW_TARGET:
 221       return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_TEXTURE_VIEW;
 222    case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
 223       return vscreen->caps.caps.v2.max_vertex_attrib_stride;
 224    case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
 225       return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_COPY_IMAGE;
 226    case PIPE_CAP_TGSI_TXQS:
 227       return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_TXQS;
 228    case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT:
 229       return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_FB_NO_ATTACH;
 230    case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR:
 231       return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_ROBUST_BUFFER_ACCESS;
 232    case PIPE_CAP_TGSI_FS_FBFETCH:
 233       return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_TGSI_FBFETCH;
 234    case PIPE_CAP_TGSI_CLOCK:
 235       return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_SHADER_CLOCK;
 236    case PIPE_CAP_TEXTURE_GATHER_SM5:
 237    case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
 238    case PIPE_CAP_FAKE_SW_MSAA:
 239    case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
 240    case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
 241    case PIPE_CAP_MULTI_DRAW_INDIRECT:
 242    case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS:
 243    case PIPE_CAP_CLIP_HALFZ:
 244    case PIPE_CAP_VERTEXID_NOBASE:
 245    case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
 246    case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
 247    case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
 248    case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
 249    case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
 250    case PIPE_CAP_DEPTH_BOUNDS_TEST:
 251    case PIPE_CAP_SHAREABLE_SHADERS:
 252    case PIPE_CAP_CLEAR_TEXTURE:
 253    case PIPE_CAP_DRAW_PARAMETERS:
 254    case PIPE_CAP_TGSI_PACK_HALF_FLOAT:
 255    case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
 256    case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
 257    case PIPE_CAP_INVALIDATE_BUFFER:
 258    case PIPE_CAP_GENERATE_MIPMAP:
 259    case PIPE_CAP_SURFACE_REINTERPRET_BLOCKS:
 260    case PIPE_CAP_QUERY_BUFFER_OBJECT:
 261    case PIPE_CAP_STRING_MARKER:
 262    case PIPE_CAP_QUERY_MEMORY_INFO:
 263    case PIPE_CAP_PCI_GROUP:
 264    case PIPE_CAP_PCI_BUS:
 265    case PIPE_CAP_PCI_DEVICE:
 266    case PIPE_CAP_PCI_FUNCTION:
 267    case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES:
 268    case PIPE_CAP_TGSI_VOTE:
 269    case PIPE_CAP_MAX_WINDOW_RECTANGLES:
 270    case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED:
 271    case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS:
 272    case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
 273    case PIPE_CAP_TGSI_CAN_READ_OUTPUTS:
 274    case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
 275    case PIPE_CAP_TGSI_MUL_ZERO_WINS:
 276    case PIPE_CAP_INT64:
 277    case PIPE_CAP_INT64_DIVMOD:
 278    case PIPE_CAP_TGSI_TEX_TXF_LZ:
 279    case PIPE_CAP_POLYGON_MODE_FILL_RECTANGLE:
 280    case PIPE_CAP_SPARSE_BUFFER_PAGE_SIZE:
 281    case PIPE_CAP_TGSI_BALLOT:
 282    case PIPE_CAP_TGSI_TES_LAYER_VIEWPORT:
 283    case PIPE_CAP_CAN_BIND_CONST_BUFFER_AS_VERTEX:
 284    case PIPE_CAP_ALLOW_MAPPED_BUFFERS_DURING_EXECUTION:
 285    case PIPE_CAP_POST_DEPTH_COVERAGE:
 286    case PIPE_CAP_BINDLESS_TEXTURE:
 287    case PIPE_CAP_NIR_SAMPLERS_AS_DEREF:
 288    case PIPE_CAP_MEMOBJ:
 289    case PIPE_CAP_LOAD_CONSTBUF:
 290    case PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS:
 291    case PIPE_CAP_TILE_RASTER_ORDER:
 292    case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
 293    case PIPE_CAP_FRAMEBUFFER_MSAA_CONSTRAINTS:
 294    case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
 295    case PIPE_CAP_CONTEXT_PRIORITY_MASK:
 296    case PIPE_CAP_FENCE_SIGNAL:
 297    case PIPE_CAP_CONSTBUF0_FLAGS:
 298    case PIPE_CAP_PACKED_UNIFORMS:
 299    case PIPE_CAP_CONSERVATIVE_RASTER_POST_SNAP_TRIANGLES:
 300    case PIPE_CAP_CONSERVATIVE_RASTER_POST_SNAP_POINTS_LINES:
 301    case PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_TRIANGLES:
 302    case PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_POINTS_LINES:
 303    case PIPE_CAP_CONSERVATIVE_RASTER_POST_DEPTH_COVERAGE:
 304    case PIPE_CAP_MAX_CONSERVATIVE_RASTER_SUBPIXEL_PRECISION_BIAS:
 305    case PIPE_CAP_PROGRAMMABLE_SAMPLE_LOCATIONS:
 306       return 0;
 307    case PIPE_CAP_VENDOR_ID:
 308       return 0x1af4;
 309    case PIPE_CAP_DEVICE_ID:
 310       return 0x1010;
 311    case PIPE_CAP_ACCELERATED:
 312       return 1;
 313    case PIPE_CAP_UMA:
 314    case PIPE_CAP_VIDEO_MEMORY:
 315       return 0;
 316    case PIPE_CAP_NATIVE_FENCE_FD:
 317       return 0;
 318    }
 319    /* should only get here on unhandled cases */
 320    debug_printf("Unexpected PIPE_CAP %d query\n", param);
 321    return 0;
 322 }
 323
 324 static int
 325 virgl_get_shader_param(struct pipe_screen *screen,
 326                        enum pipe_shader_type shader,
 327                        enum pipe_shader_cap param)
 328 {
 329    struct virgl_screen *vscreen = virgl_screen(screen);
 330
 331    if ((shader == PIPE_SHADER_TESS_CTRL || shader == PIPE_SHADER_TESS_EVAL) &&
 332        !vscreen->caps.caps.v1.bset.has_tessellation_shaders)
 333       return 0;
 334
 335    if (shader == PIPE_SHADER_COMPUTE &&
 336        !(vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_COMPUTE_SHADER))
 337      return 0;
 338
 339    switch(shader)
 340    {
 341    case PIPE_SHADER_FRAGMENT:
 342    case PIPE_SHADER_VERTEX:
 343    case PIPE_SHADER_GEOMETRY:
 344    case PIPE_SHADER_TESS_CTRL:
 345    case PIPE_SHADER_TESS_EVAL:
 346    case PIPE_SHADER_COMPUTE:
 347       switch (param) {
 348       case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 349       case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 350       case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 351       case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 352          return INT_MAX;
 353       case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 354       case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 355       case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 356          return 1;
 357       case PIPE_SHADER_CAP_MAX_INPUTS:
 358          if (vscreen->caps.caps.v1.glsl_level < 150)
 359             return vscreen->caps.caps.v2.max_vertex_attribs;
 360          return (shader == PIPE_SHADER_VERTEX ||
 361                  shader == PIPE_SHADER_GEOMETRY) ? vscreen->caps.caps.v2.max_vertex_attribs : 32;
 362       case PIPE_SHADER_CAP_MAX_OUTPUTS:
 363          if (shader == PIPE_SHADER_FRAGMENT)
 364             return vscreen->caps.caps.v1.max_render_targets;
 365          return vscreen->caps.caps.v2.max_vertex_outputs;
 366      // case PIPE_SHADER_CAP_MAX_CONSTS:
 367      //    return 4096;
 368       case PIPE_SHADER_CAP_MAX_TEMPS:
 369          return 256;
 370       case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 371          return vscreen->caps.caps.v1.max_uniform_blocks;
 372     //  case PIPE_SHADER_CAP_MAX_ADDRS:
 373      //    return 1;
 374       case PIPE_SHADER_CAP_SUBROUTINES:
 375          return 1;
 376       case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 377             return 16;
 378       case PIPE_SHADER_CAP_INTEGERS:
 379          return vscreen->caps.caps.v1.glsl_level >= 130;
 380       case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 381          return 32;
 382       case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 383          return 4096 * sizeof(float[4]);
 384       case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
 385          if (shader == PIPE_SHADER_FRAGMENT || shader == PIPE_SHADER_COMPUTE)
 386             return vscreen->caps.caps.v2.max_shader_buffer_frag_compute;
 387          else
 388             return vscreen->caps.caps.v2.max_shader_buffer_other_stages;
 389       case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
 390          if (shader == PIPE_SHADER_FRAGMENT || shader == PIPE_SHADER_COMPUTE)
 391             return vscreen->caps.caps.v2.max_shader_image_frag_compute;
 392          else
 393             return vscreen->caps.caps.v2.max_shader_image_other_stages;
 394       case PIPE_SHADER_CAP_SUPPORTED_IRS:
 395          return (1 << PIPE_SHADER_IR_TGSI);
 396       case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
 397       case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
 398       case PIPE_SHADER_CAP_INT64_ATOMICS:
 399       case PIPE_SHADER_CAP_FP16:
 400       case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
 401       case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
 402          return 0;
 403       case PIPE_SHADER_CAP_SCALAR_ISA:
 404          return 1;
 405       default:
 406          return 0;
 407       }
 408    default:
 409       return 0;
 410    }
 411 }
 412
 413 static float
 414 virgl_get_paramf(struct pipe_screen *screen, enum pipe_capf param)
 415 {
 416    struct virgl_screen *vscreen = virgl_screen(screen);
 417    switch (param) {
 418    case PIPE_CAPF_MAX_LINE_WIDTH:
 419       return vscreen->caps.caps.v2.max_aliased_line_width;
 420    case PIPE_CAPF_MAX_LINE_WIDTH_AA:
 421       return vscreen->caps.caps.v2.max_smooth_line_width;
 422    case PIPE_CAPF_MAX_POINT_WIDTH:
 423       return vscreen->caps.caps.v2.max_aliased_point_size;
 424    case PIPE_CAPF_MAX_POINT_WIDTH_AA:
 425       return vscreen->caps.caps.v2.max_smooth_point_size;
 426    case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
 427       return 16.0;
 428    case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
 429       return vscreen->caps.caps.v2.max_texture_lod_bias;
 430    case PIPE_CAPF_MIN_CONSERVATIVE_RASTER_DILATE:
 431    case PIPE_CAPF_MAX_CONSERVATIVE_RASTER_DILATE:
 432    case PIPE_CAPF_CONSERVATIVE_RASTER_DILATE_GRANULARITY:
 433       return 0.0f;
 434    }
 435    /* should only get here on unhandled cases */
 436    debug_printf("Unexpected PIPE_CAPF %d query\n", param);
 437    return 0.0;
 438 }
 439
 440 static int
 441 virgl_get_compute_param(struct pipe_screen *screen,
 442                         enum pipe_shader_ir ir_type,
 443                         enum pipe_compute_cap param,
 444                         void *ret)
 445 {
 446    struct virgl_screen *vscreen = virgl_screen(screen);
 447    if (!(vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_COMPUTE_SHADER))
 448       return 0;
 449    switch (param) {
 450    case PIPE_COMPUTE_CAP_MAX_GRID_SIZE:
 451       if (ret) {
 452          uint64_t *grid_size = ret;
 453          grid_size[0] = vscreen->caps.caps.v2.max_compute_grid_size[0];
 454          grid_size[1] = vscreen->caps.caps.v2.max_compute_grid_size[1];
 455          grid_size[2] = vscreen->caps.caps.v2.max_compute_grid_size[2];
 456       }
 457       return 3 * sizeof(uint64_t) ;
 458    case PIPE_COMPUTE_CAP_MAX_BLOCK_SIZE:
 459       if (ret) {
 460          uint64_t *block_size = ret;
 461          block_size[0] = vscreen->caps.caps.v2.max_compute_block_size[0];
 462          block_size[1] = vscreen->caps.caps.v2.max_compute_block_size[1];
 463          block_size[2] = vscreen->caps.caps.v2.max_compute_block_size[2];
 464       }
 465       return 3 * sizeof(uint64_t);
 466    case PIPE_COMPUTE_CAP_MAX_THREADS_PER_BLOCK:
 467       if (ret) {
 468          uint64_t *max_threads_per_block = ret;
 469          *max_threads_per_block = vscreen->caps.caps.v2.max_compute_work_group_invocations;
 470       }
 471       return sizeof(uint64_t);
 472    case PIPE_COMPUTE_CAP_MAX_LOCAL_SIZE:
 473       if (ret) {
 474          uint64_t *max_local_size = ret;
 475          /* Value reported by the closed source driver. */
 476          *max_local_size = vscreen->caps.caps.v2.max_compute_shared_memory_size;
 477       }
 478       return sizeof(uint64_t);
 479    default:
 480       break;
 481    }
 482    return 0;
 483 }
 484
 485 static boolean
 486 virgl_is_vertex_format_supported(struct pipe_screen *screen,
 487                                  enum pipe_format format)
 488 {
 489    struct virgl_screen *vscreen = virgl_screen(screen);
 490    const struct util_format_description *format_desc;
 491    int i;
 492
 493    format_desc = util_format_description(format);
 494    if (!format_desc)
 495       return FALSE;
 496
 497    if (format == PIPE_FORMAT_R11G11B10_FLOAT) {
 498       int vformat = VIRGL_FORMAT_R11G11B10_FLOAT;
 499       int big = vformat / 32;
 500       int small = vformat % 32;
 501       if (!(vscreen->caps.caps.v1.vertexbuffer.bitmask[big] & (1 << small)))
 502          return FALSE;
 503       return TRUE;
 504    }
 505
 506    /* Find the first non-VOID channel. */
 507    for (i = 0; i < 4; i++) {
 508       if (format_desc->channel[i].type != UTIL_FORMAT_TYPE_VOID) {
 509          break;
 510       }
 511    }
 512
 513    if (i == 4)
 514       return FALSE;
 515
 516    if (format_desc->layout != UTIL_FORMAT_LAYOUT_PLAIN)
 517       return FALSE;
 518
 519    if (format_desc->channel[i].type == UTIL_FORMAT_TYPE_FIXED)
 520       return FALSE;
 521    return TRUE;
 522 }
 523
 524 /**
 525  * Query format support for creating a texture, drawing surface, etc.
 526  * \param format  the format to test
 527  * \param type  one of PIPE_TEXTURE, PIPE_SURFACE
 528  */
 529 static boolean
 530 virgl_is_format_supported( struct pipe_screen *screen,
 531                                  enum pipe_format format,
 532                                  enum pipe_texture_target target,
 533                                  unsigned sample_count,
 534                                  unsigned storage_sample_count,
 535                                  unsigned bind)
 536 {
 537    struct virgl_screen *vscreen = virgl_screen(screen);
 538    const struct util_format_description *format_desc;
 539    int i;
 540
 541    if (MAX2(1, sample_count) != MAX2(1, storage_sample_count))
 542       return false;
 543
 544    assert(target == PIPE_BUFFER ||
 545           target == PIPE_TEXTURE_1D ||
 546           target == PIPE_TEXTURE_1D_ARRAY ||
 547           target == PIPE_TEXTURE_2D ||
 548           target == PIPE_TEXTURE_2D_ARRAY ||
 549           target == PIPE_TEXTURE_RECT ||
 550           target == PIPE_TEXTURE_3D ||
 551           target == PIPE_TEXTURE_CUBE ||
 552           target == PIPE_TEXTURE_CUBE_ARRAY);
 553
 554    format_desc = util_format_description(format);
 555    if (!format_desc)
 556       return FALSE;
 557
 558    if (util_format_is_intensity(format))
 559       return FALSE;
 560
 561    if (sample_count > 1) {
 562       if (!vscreen->caps.caps.v1.bset.texture_multisample)
 563          return FALSE;
 564
 565       if (bind & PIPE_BIND_SHADER_IMAGE) {
 566          if (sample_count > vscreen->caps.caps.v2.max_image_samples)
 567             return FALSE;
 568       }
 569
 570       if (sample_count > vscreen->caps.caps.v1.max_samples)
 571          return FALSE;
 572    }
 573
 574    if (bind & PIPE_BIND_VERTEX_BUFFER) {
 575       return virgl_is_vertex_format_supported(screen, format);
 576    }
 577
 578    /* Allow 3-comp 32 bit textures only for TBOs (needed for ARB_tbo_rgb32) */
 579    if ((format == PIPE_FORMAT_R32G32B32_FLOAT ||
 580        format == PIPE_FORMAT_R32G32B32_SINT ||
 581        format == PIPE_FORMAT_R32G32B32_UINT) &&
 582        target != PIPE_BUFFER)
 583       return FALSE;
 584
 585    if (bind & PIPE_BIND_RENDER_TARGET) {
 586       /* For ARB_framebuffer_no_attachments. */
 587       if (format == PIPE_FORMAT_NONE)
 588          return TRUE;
 589
 590       if (format_desc->colorspace == UTIL_FORMAT_COLORSPACE_ZS)
 591          return FALSE;
 592
 593       /*
 594        * Although possible, it is unnatural to render into compressed or YUV
 595        * surfaces. So disable these here to avoid going into weird paths
 596        * inside the state trackers.
 597        */
 598       if (format_desc->block.width != 1 ||
 599           format_desc->block.height != 1)
 600          return FALSE;
 601
 602       {
 603          int big = format / 32;
 604          int small = format % 32;
 605          if (!(vscreen->caps.caps.v1.render.bitmask[big] & (1 << small)))
 606             return FALSE;
 607       }
 608    }
 609
 610    if (bind & PIPE_BIND_DEPTH_STENCIL) {
 611       if (format_desc->colorspace != UTIL_FORMAT_COLORSPACE_ZS)
 612          return FALSE;
 613    }
 614
 615    /*
 616     * All other operations (sampling, transfer, etc).
 617     */
 618
 619    if (format_desc->layout == UTIL_FORMAT_LAYOUT_S3TC) {
 620       goto out_lookup;
 621    }
 622    if (format_desc->layout == UTIL_FORMAT_LAYOUT_RGTC) {
 623       goto out_lookup;
 624    }
 625    if (format_desc->layout == UTIL_FORMAT_LAYOUT_BPTC) {
 626       goto out_lookup;
 627    }
 628
 629    if (format == PIPE_FORMAT_R11G11B10_FLOAT) {
 630       goto out_lookup;
 631    } else if (format == PIPE_FORMAT_R9G9B9E5_FLOAT) {
 632       goto out_lookup;
 633    }
 634
 635    /* Find the first non-VOID channel. */
 636    for (i = 0; i < 4; i++) {
 637       if (format_desc->channel[i].type != UTIL_FORMAT_TYPE_VOID) {
 638          break;
 639       }
 640    }
 641
 642    if (i == 4)
 643       return FALSE;
 644
 645    /* no L4A4 */
 646    if (format_desc->nr_channels < 4 && format_desc->channel[i].size == 4)
 647       return FALSE;
 648
 649  out_lookup:
 650    {
 651       int big = format / 32;
 652       int small = format % 32;
 653       if (!(vscreen->caps.caps.v1.sampler.bitmask[big] & (1 << small)))
 654          return FALSE;
 655    }
 656    /*
 657     * Everything else should be supported by u_format.
 658     */
 659    return TRUE;
 660 }
 661
 662 static void virgl_flush_frontbuffer(struct pipe_screen *screen,
 663                                       struct pipe_resource *res,
 664                                       unsigned level, unsigned layer,
 665                                     void *winsys_drawable_handle, struct pipe_box *sub_box)
 666 {
 667    struct virgl_screen *vscreen = virgl_screen(screen);
 668    struct virgl_winsys *vws = vscreen->vws;
 669    struct virgl_resource *vres = virgl_resource(res);
 670
 671    if (vws->flush_frontbuffer)
 672       vws->flush_frontbuffer(vws, vres->hw_res, level, layer, winsys_drawable_handle,
 673                              sub_box);
 674 }
 675
 676 static void virgl_fence_reference(struct pipe_screen *screen,
 677                                   struct pipe_fence_handle **ptr,
 678                                   struct pipe_fence_handle *fence)
 679 {
 680    struct virgl_screen *vscreen = virgl_screen(screen);
 681    struct virgl_winsys *vws = vscreen->vws;
 682
 683    vws->fence_reference(vws, ptr, fence);
 684 }
 685
 686 static boolean virgl_fence_finish(struct pipe_screen *screen,
 687                                   struct pipe_context *ctx,
 688                                   struct pipe_fence_handle *fence,
 689                                   uint64_t timeout)
 690 {
 691    struct virgl_screen *vscreen = virgl_screen(screen);
 692    struct virgl_winsys *vws = vscreen->vws;
 693
 694    return vws->fence_wait(vws, fence, timeout);
 695 }
 696
 697 static uint64_t
 698 virgl_get_timestamp(struct pipe_screen *_screen)
 699 {
 700    return os_time_get_nano();
 701 }
 702
 703 static void
 704 virgl_destroy_screen(struct pipe_screen *screen)
 705 {
 706    struct virgl_screen *vscreen = virgl_screen(screen);
 707    struct virgl_winsys *vws = vscreen->vws;
 708
 709    slab_destroy_parent(&vscreen->texture_transfer_pool);
 710
 711    if (vws)
 712       vws->destroy(vws);
 713    FREE(vscreen);
 714 }
 715
 716 struct pipe_screen *
 717 virgl_create_screen(struct virgl_winsys *vws)
 718 {
 719    struct virgl_screen *screen = CALLOC_STRUCT(virgl_screen);
 720
 721    if (!screen)
 722       return NULL;
 723
 724    screen->vws = vws;
 725    screen->base.get_name = virgl_get_name;
 726    screen->base.get_vendor = virgl_get_vendor;
 727    screen->base.get_param = virgl_get_param;
 728    screen->base.get_shader_param = virgl_get_shader_param;
 729    screen->base.get_compute_param = virgl_get_compute_param;
 730    screen->base.get_paramf = virgl_get_paramf;
 731    screen->base.is_format_supported = virgl_is_format_supported;
 732    screen->base.destroy = virgl_destroy_screen;
 733    screen->base.context_create = virgl_context_create;
 734    screen->base.flush_frontbuffer = virgl_flush_frontbuffer;
 735    screen->base.get_timestamp = virgl_get_timestamp;
 736    screen->base.fence_reference = virgl_fence_reference;
 737    //screen->base.fence_signalled = virgl_fence_signalled;
 738    screen->base.fence_finish = virgl_fence_finish;
 739
 740    virgl_init_screen_resource_functions(&screen->base);
 741
 742    vws->get_caps(vws, &screen->caps);
 743
 744    screen->refcnt = 1;
 745
 746    slab_create_parent(&screen->texture_transfer_pool, sizeof(struct virgl_transfer), 16);
 747
 748    return &screen->base;
 749 }