src/gallium/drivers/virgl/virgl_screen.c

   1 /*
   2  * Copyright 2014, 2015 Red Hat.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * on the rights to use, copy, modify, merge, publish, distribute, sub
   8  * license, and/or sell copies of the Software, and to permit persons to whom
   9  * the Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  21  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  22  */
  23 #include "util/u_memory.h"
  24 #include "util/u_format.h"
  25 #include "util/u_format_s3tc.h"
  26 #include "util/u_screen.h"
  27 #include "util/u_video.h"
  28 #include "util/u_math.h"
  29 #include "util/os_time.h"
  30 #include "pipe/p_defines.h"
  31 #include "pipe/p_screen.h"
  32
  33 #include "tgsi/tgsi_exec.h"
  34
  35 #include "virgl_screen.h"
  36 #include "virgl_resource.h"
  37 #include "virgl_public.h"
  38 #include "virgl_context.h"
  39
  40 int virgl_debug = 0;
  41 static const struct debug_named_value debug_options[] = {
  42    { "verbose", VIRGL_DEBUG_VERBOSE, NULL },
  43    { "tgsi", VIRGL_DEBUG_TGSI, NULL },
  44    DEBUG_NAMED_VALUE_END
  45 };
  46 DEBUG_GET_ONCE_FLAGS_OPTION(virgl_debug, "VIRGL_DEBUG", debug_options, 0)
  47
  48 static const char *
  49 virgl_get_vendor(struct pipe_screen *screen)
  50 {
  51    return "Red Hat";
  52 }
  53
  54
  55 static const char *
  56 virgl_get_name(struct pipe_screen *screen)
  57 {
  58    return "virgl";
  59 }
  60
  61 static int
  62 virgl_get_param(struct pipe_screen *screen, enum pipe_cap param)
  63 {
  64    struct virgl_screen *vscreen = virgl_screen(screen);
  65    switch (param) {
  66    case PIPE_CAP_NPOT_TEXTURES:
  67       return 1;
  68    case PIPE_CAP_SM3:
  69       return 1;
  70    case PIPE_CAP_ANISOTROPIC_FILTER:
  71       return 1;
  72    case PIPE_CAP_POINT_SPRITE:
  73       return 1;
  74    case PIPE_CAP_MAX_RENDER_TARGETS:
  75       return vscreen->caps.caps.v1.max_render_targets;
  76    case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
  77       return vscreen->caps.caps.v1.max_dual_source_render_targets;
  78    case PIPE_CAP_OCCLUSION_QUERY:
  79       return vscreen->caps.caps.v1.bset.occlusion_query;
  80    case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
  81    case PIPE_CAP_TEXTURE_MIRROR_CLAMP_TO_EDGE:
  82       return vscreen->caps.caps.v1.bset.mirror_clamp;
  83    case PIPE_CAP_TEXTURE_SWIZZLE:
  84       return 1;
  85    case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
  86       if (vscreen->caps.caps.v2.max_texture_2d_size)
  87          return 1 + util_logbase2(vscreen->caps.caps.v2.max_texture_2d_size);
  88       return 15; /* 16K x 16K */
  89    case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
  90       if (vscreen->caps.caps.v2.max_texture_3d_size)
  91          return 1 + util_logbase2(vscreen->caps.caps.v2.max_texture_3d_size);
  92       return 9; /* 256 x 256 x 256 */
  93    case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
  94       if (vscreen->caps.caps.v2.max_texture_cube_size)
  95          return 1 + util_logbase2(vscreen->caps.caps.v2.max_texture_cube_size);
  96       return 13; /* 4K x 4K */
  97    case PIPE_CAP_BLEND_EQUATION_SEPARATE:
  98       return 1;
  99    case PIPE_CAP_INDEP_BLEND_ENABLE:
 100       return vscreen->caps.caps.v1.bset.indep_blend_enable;
 101    case PIPE_CAP_INDEP_BLEND_FUNC:
 102       return vscreen->caps.caps.v1.bset.indep_blend_func;
 103    case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
 104    case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
 105    case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
 106       return 1;
 107    case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
 108       return vscreen->caps.caps.v1.bset.fragment_coord_conventions;
 109    case PIPE_CAP_DEPTH_CLIP_DISABLE:
 110       return vscreen->caps.caps.v1.bset.depth_clip_disable;
 111    case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
 112       return vscreen->caps.caps.v1.max_streamout_buffers;
 113    case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
 114    case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
 115       return 16*4;
 116    case PIPE_CAP_PRIMITIVE_RESTART:
 117       return vscreen->caps.caps.v1.bset.primitive_restart;
 118    case PIPE_CAP_SHADER_STENCIL_EXPORT:
 119       return vscreen->caps.caps.v1.bset.shader_stencil_export;
 120    case PIPE_CAP_TGSI_INSTANCEID:
 121    case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
 122       return 1;
 123    case PIPE_CAP_SEAMLESS_CUBE_MAP:
 124       return vscreen->caps.caps.v1.bset.seamless_cube_map;
 125    case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
 126       return vscreen->caps.caps.v1.bset.seamless_cube_map_per_texture;
 127    case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
 128       return vscreen->caps.caps.v1.max_texture_array_layers;
 129    case PIPE_CAP_MIN_TEXEL_OFFSET:
 130       return vscreen->caps.caps.v2.min_texel_offset;
 131    case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
 132       return vscreen->caps.caps.v2.min_texture_gather_offset;
 133    case PIPE_CAP_MAX_TEXEL_OFFSET:
 134       return vscreen->caps.caps.v2.max_texel_offset;
 135    case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
 136       return vscreen->caps.caps.v2.max_texture_gather_offset;
 137    case PIPE_CAP_CONDITIONAL_RENDER:
 138       return vscreen->caps.caps.v1.bset.conditional_render;
 139    case PIPE_CAP_TEXTURE_BARRIER:
 140       return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_TEXTURE_BARRIER;
 141    case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
 142       return 1;
 143    case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
 144    case PIPE_CAP_VERTEX_COLOR_CLAMPED:
 145       return vscreen->caps.caps.v1.bset.color_clamping;
 146    case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
 147       return 1;
 148    case PIPE_CAP_GLSL_FEATURE_LEVEL:
 149       return vscreen->caps.caps.v1.glsl_level;
 150    case PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY:
 151       return MIN2(vscreen->caps.caps.v1.glsl_level, 140);
 152    case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
 153    case PIPE_CAP_DEPTH_CLIP_DISABLE_SEPARATE:
 154       return 0;
 155    case PIPE_CAP_COMPUTE:
 156       return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_COMPUTE_SHADER;
 157    case PIPE_CAP_USER_VERTEX_BUFFERS:
 158       return 0;
 159    case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
 160       return vscreen->caps.caps.v2.uniform_buffer_offset_alignment;
 161    case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
 162    case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS:
 163       return vscreen->caps.caps.v1.bset.streamout_pause_resume;
 164    case PIPE_CAP_START_INSTANCE:
 165       return vscreen->caps.caps.v1.bset.start_instance;
 166    case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
 167    case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
 168    case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
 169    case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
 170    case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
 171       return 0;
 172    case PIPE_CAP_QUERY_TIMESTAMP:
 173       return 1;
 174    case PIPE_CAP_QUERY_TIME_ELAPSED:
 175       return 1;
 176    case PIPE_CAP_TGSI_TEXCOORD:
 177       return 0;
 178    case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
 179       return VIRGL_MAP_BUFFER_ALIGNMENT;
 180    case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
 181       return vscreen->caps.caps.v1.max_tbo_size > 0;
 182    case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
 183       return vscreen->caps.caps.v2.texture_buffer_offset_alignment;
 184    case PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY:
 185       return 0;
 186    case PIPE_CAP_CUBE_MAP_ARRAY:
 187       return vscreen->caps.caps.v1.bset.cube_map_array;
 188    case PIPE_CAP_TEXTURE_MULTISAMPLE:
 189       return vscreen->caps.caps.v1.bset.texture_multisample;
 190    case PIPE_CAP_MAX_VIEWPORTS:
 191       return vscreen->caps.caps.v1.max_viewports;
 192    case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
 193       return vscreen->caps.caps.v1.max_tbo_size;
 194    case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
 195    case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
 196    case PIPE_CAP_ENDIANNESS:
 197       return 0;
 198    case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
 199    case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
 200       return 1;
 201    case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
 202       return 0;
 203    case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
 204       return vscreen->caps.caps.v2.max_geom_output_vertices;
 205    case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
 206       return vscreen->caps.caps.v2.max_geom_total_output_components;
 207    case PIPE_CAP_TEXTURE_QUERY_LOD:
 208       return vscreen->caps.caps.v1.bset.texture_query_lod;
 209    case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
 210       return vscreen->caps.caps.v1.max_texture_gather_components;
 211    case PIPE_CAP_DRAW_INDIRECT:
 212       return vscreen->caps.caps.v1.bset.has_indirect_draw;
 213    case PIPE_CAP_SAMPLE_SHADING:
 214    case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
 215       return vscreen->caps.caps.v1.bset.has_sample_shading;
 216    case PIPE_CAP_CULL_DISTANCE:
 217       return vscreen->caps.caps.v1.bset.has_cull;
 218    case PIPE_CAP_MAX_VERTEX_STREAMS:
 219       return vscreen->caps.caps.v1.glsl_level >= 400 ? 4 : 1;
 220    case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
 221       return vscreen->caps.caps.v1.bset.conditional_render_inverted;
 222    case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
 223       return vscreen->caps.caps.v1.bset.derivative_control;
 224    case PIPE_CAP_POLYGON_OFFSET_CLAMP:
 225       return vscreen->caps.caps.v1.bset.polygon_offset_clamp;
 226    case PIPE_CAP_QUERY_SO_OVERFLOW:
 227       return vscreen->caps.caps.v1.bset.transform_feedback_overflow_query;
 228    case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
 229       return vscreen->caps.caps.v2.shader_buffer_offset_alignment;
 230    case PIPE_CAP_DOUBLES:
 231       return vscreen->caps.caps.v1.bset.has_fp64;
 232    case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
 233       return vscreen->caps.caps.v2.max_shader_patch_varyings;
 234    case PIPE_CAP_SAMPLER_VIEW_TARGET:
 235       return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_TEXTURE_VIEW;
 236    case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
 237       return vscreen->caps.caps.v2.max_vertex_attrib_stride;
 238    case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
 239       return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_COPY_IMAGE;
 240    case PIPE_CAP_TGSI_TXQS:
 241       return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_TXQS;
 242    case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT:
 243       return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_FB_NO_ATTACH;
 244    case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR:
 245       return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_ROBUST_BUFFER_ACCESS;
 246    case PIPE_CAP_TGSI_FS_FBFETCH:
 247       return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_TGSI_FBFETCH;
 248    case PIPE_CAP_TGSI_CLOCK:
 249       return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_SHADER_CLOCK;
 250    case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
 251       return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_TGSI_COMPONENTS;
 252    case PIPE_CAP_MAX_COMBINED_SHADER_BUFFERS:
 253       return vscreen->caps.caps.v2.max_combined_shader_buffers;
 254    case PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTERS:
 255       return vscreen->caps.caps.v2.max_combined_atomic_counters;
 256    case PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTER_BUFFERS:
 257       return vscreen->caps.caps.v2.max_combined_atomic_counter_buffers;
 258    case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
 259    case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
 260       return 1; /* TODO: need to introduce a hw-cap for this */
 261    case PIPE_CAP_QUERY_BUFFER_OBJECT:
 262       return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_QBO;
 263    case PIPE_CAP_MAX_VARYINGS:
 264       if (vscreen->caps.caps.v1.glsl_level < 150)
 265          return vscreen->caps.caps.v2.max_vertex_attribs;
 266       return 32;
 267    case PIPE_CAP_TEXTURE_GATHER_SM5:
 268    case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
 269    case PIPE_CAP_FAKE_SW_MSAA:
 270    case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
 271    case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
 272    case PIPE_CAP_MULTI_DRAW_INDIRECT:
 273    case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS:
 274    case PIPE_CAP_CLIP_HALFZ:
 275    case PIPE_CAP_VERTEXID_NOBASE:
 276    case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
 277    case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
 278    case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
 279    case PIPE_CAP_DEPTH_BOUNDS_TEST:
 280    case PIPE_CAP_SHAREABLE_SHADERS:
 281    case PIPE_CAP_CLEAR_TEXTURE:
 282    case PIPE_CAP_DRAW_PARAMETERS:
 283    case PIPE_CAP_TGSI_PACK_HALF_FLOAT:
 284    case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
 285    case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
 286    case PIPE_CAP_INVALIDATE_BUFFER:
 287    case PIPE_CAP_GENERATE_MIPMAP:
 288    case PIPE_CAP_SURFACE_REINTERPRET_BLOCKS:
 289    case PIPE_CAP_STRING_MARKER:
 290    case PIPE_CAP_QUERY_MEMORY_INFO:
 291    case PIPE_CAP_PCI_GROUP:
 292    case PIPE_CAP_PCI_BUS:
 293    case PIPE_CAP_PCI_DEVICE:
 294    case PIPE_CAP_PCI_FUNCTION:
 295    case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES:
 296    case PIPE_CAP_TGSI_VOTE:
 297    case PIPE_CAP_MAX_WINDOW_RECTANGLES:
 298    case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED:
 299    case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS:
 300    case PIPE_CAP_TGSI_CAN_READ_OUTPUTS:
 301    case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
 302    case PIPE_CAP_TGSI_MUL_ZERO_WINS:
 303    case PIPE_CAP_INT64:
 304    case PIPE_CAP_INT64_DIVMOD:
 305    case PIPE_CAP_TGSI_TEX_TXF_LZ:
 306    case PIPE_CAP_POLYGON_MODE_FILL_RECTANGLE:
 307    case PIPE_CAP_SPARSE_BUFFER_PAGE_SIZE:
 308    case PIPE_CAP_TGSI_BALLOT:
 309    case PIPE_CAP_TGSI_TES_LAYER_VIEWPORT:
 310    case PIPE_CAP_CAN_BIND_CONST_BUFFER_AS_VERTEX:
 311    case PIPE_CAP_ALLOW_MAPPED_BUFFERS_DURING_EXECUTION:
 312    case PIPE_CAP_POST_DEPTH_COVERAGE:
 313    case PIPE_CAP_BINDLESS_TEXTURE:
 314    case PIPE_CAP_NIR_SAMPLERS_AS_DEREF:
 315    case PIPE_CAP_MEMOBJ:
 316    case PIPE_CAP_LOAD_CONSTBUF:
 317    case PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS:
 318    case PIPE_CAP_TILE_RASTER_ORDER:
 319    case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
 320    case PIPE_CAP_FRAMEBUFFER_MSAA_CONSTRAINTS:
 321    case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
 322    case PIPE_CAP_CONTEXT_PRIORITY_MASK:
 323    case PIPE_CAP_FENCE_SIGNAL:
 324    case PIPE_CAP_CONSTBUF0_FLAGS:
 325    case PIPE_CAP_PACKED_UNIFORMS:
 326    case PIPE_CAP_CONSERVATIVE_RASTER_POST_SNAP_TRIANGLES:
 327    case PIPE_CAP_CONSERVATIVE_RASTER_POST_SNAP_POINTS_LINES:
 328    case PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_TRIANGLES:
 329    case PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_POINTS_LINES:
 330    case PIPE_CAP_CONSERVATIVE_RASTER_POST_DEPTH_COVERAGE:
 331    case PIPE_CAP_MAX_CONSERVATIVE_RASTER_SUBPIXEL_PRECISION_BIAS:
 332    case PIPE_CAP_PROGRAMMABLE_SAMPLE_LOCATIONS:
 333    case PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET:
 334       return 0;
 335    case PIPE_CAP_MAX_GS_INVOCATIONS:
 336       return 32;
 337    case PIPE_CAP_MAX_SHADER_BUFFER_SIZE:
 338       return 1 << 27;
 339    case PIPE_CAP_VENDOR_ID:
 340       return 0x1af4;
 341    case PIPE_CAP_DEVICE_ID:
 342       return 0x1010;
 343    case PIPE_CAP_ACCELERATED:
 344       return 1;
 345    case PIPE_CAP_UMA:
 346    case PIPE_CAP_VIDEO_MEMORY:
 347       return 0;
 348    case PIPE_CAP_NATIVE_FENCE_FD:
 349       return vscreen->vws->supports_fences;
 350    case PIPE_CAP_DEST_SURFACE_SRGB_CONTROL:
 351       return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_SRGB_WRITE_CONTROL;
 352    default:
 353       return u_pipe_screen_get_param_defaults(screen, param);
 354    }
 355 }
 356
 357 static int
 358 virgl_get_shader_param(struct pipe_screen *screen,
 359                        enum pipe_shader_type shader,
 360                        enum pipe_shader_cap param)
 361 {
 362    struct virgl_screen *vscreen = virgl_screen(screen);
 363
 364    if ((shader == PIPE_SHADER_TESS_CTRL || shader == PIPE_SHADER_TESS_EVAL) &&
 365        !vscreen->caps.caps.v1.bset.has_tessellation_shaders)
 366       return 0;
 367
 368    if (shader == PIPE_SHADER_COMPUTE &&
 369        !(vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_COMPUTE_SHADER))
 370      return 0;
 371
 372    switch(shader)
 373    {
 374    case PIPE_SHADER_FRAGMENT:
 375    case PIPE_SHADER_VERTEX:
 376    case PIPE_SHADER_GEOMETRY:
 377    case PIPE_SHADER_TESS_CTRL:
 378    case PIPE_SHADER_TESS_EVAL:
 379    case PIPE_SHADER_COMPUTE:
 380       switch (param) {
 381       case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 382       case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 383       case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 384       case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 385          return INT_MAX;
 386       case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 387       case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 388       case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 389          return 1;
 390       case PIPE_SHADER_CAP_MAX_INPUTS:
 391          if (vscreen->caps.caps.v1.glsl_level < 150)
 392             return vscreen->caps.caps.v2.max_vertex_attribs;
 393          return (shader == PIPE_SHADER_VERTEX ||
 394                  shader == PIPE_SHADER_GEOMETRY) ? vscreen->caps.caps.v2.max_vertex_attribs : 32;
 395       case PIPE_SHADER_CAP_MAX_OUTPUTS:
 396          if (shader == PIPE_SHADER_FRAGMENT)
 397             return vscreen->caps.caps.v1.max_render_targets;
 398          return vscreen->caps.caps.v2.max_vertex_outputs;
 399      // case PIPE_SHADER_CAP_MAX_CONSTS:
 400      //    return 4096;
 401       case PIPE_SHADER_CAP_MAX_TEMPS:
 402          return 256;
 403       case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 404          return vscreen->caps.caps.v1.max_uniform_blocks;
 405     //  case PIPE_SHADER_CAP_MAX_ADDRS:
 406      //    return 1;
 407       case PIPE_SHADER_CAP_SUBROUTINES:
 408          return 1;
 409       case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 410             return 16;
 411       case PIPE_SHADER_CAP_INTEGERS:
 412          return vscreen->caps.caps.v1.glsl_level >= 130;
 413       case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 414          return 32;
 415       case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 416          return 4096 * sizeof(float[4]);
 417       case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
 418          if (shader == PIPE_SHADER_FRAGMENT || shader == PIPE_SHADER_COMPUTE)
 419             return vscreen->caps.caps.v2.max_shader_buffer_frag_compute;
 420          else
 421             return vscreen->caps.caps.v2.max_shader_buffer_other_stages;
 422       case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
 423          if (shader == PIPE_SHADER_FRAGMENT || shader == PIPE_SHADER_COMPUTE)
 424             return vscreen->caps.caps.v2.max_shader_image_frag_compute;
 425          else
 426             return vscreen->caps.caps.v2.max_shader_image_other_stages;
 427       case PIPE_SHADER_CAP_SUPPORTED_IRS:
 428          return (1 << PIPE_SHADER_IR_TGSI);
 429       case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
 430          return vscreen->caps.caps.v2.max_atomic_counters[shader];
 431       case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
 432          return vscreen->caps.caps.v2.max_atomic_counter_buffers[shader];
 433       case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
 434       case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
 435       case PIPE_SHADER_CAP_INT64_ATOMICS:
 436       case PIPE_SHADER_CAP_FP16:
 437          return 0;
 438       case PIPE_SHADER_CAP_SCALAR_ISA:
 439          return 1;
 440       default:
 441          return 0;
 442       }
 443    default:
 444       return 0;
 445    }
 446 }
 447
 448 static float
 449 virgl_get_paramf(struct pipe_screen *screen, enum pipe_capf param)
 450 {
 451    struct virgl_screen *vscreen = virgl_screen(screen);
 452    switch (param) {
 453    case PIPE_CAPF_MAX_LINE_WIDTH:
 454       return vscreen->caps.caps.v2.max_aliased_line_width;
 455    case PIPE_CAPF_MAX_LINE_WIDTH_AA:
 456       return vscreen->caps.caps.v2.max_smooth_line_width;
 457    case PIPE_CAPF_MAX_POINT_WIDTH:
 458       return vscreen->caps.caps.v2.max_aliased_point_size;
 459    case PIPE_CAPF_MAX_POINT_WIDTH_AA:
 460       return vscreen->caps.caps.v2.max_smooth_point_size;
 461    case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
 462       return 16.0;
 463    case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
 464       return vscreen->caps.caps.v2.max_texture_lod_bias;
 465    case PIPE_CAPF_MIN_CONSERVATIVE_RASTER_DILATE:
 466    case PIPE_CAPF_MAX_CONSERVATIVE_RASTER_DILATE:
 467    case PIPE_CAPF_CONSERVATIVE_RASTER_DILATE_GRANULARITY:
 468       return 0.0f;
 469    }
 470    /* should only get here on unhandled cases */
 471    debug_printf("Unexpected PIPE_CAPF %d query\n", param);
 472    return 0.0;
 473 }
 474
 475 static int
 476 virgl_get_compute_param(struct pipe_screen *screen,
 477                         enum pipe_shader_ir ir_type,
 478                         enum pipe_compute_cap param,
 479                         void *ret)
 480 {
 481    struct virgl_screen *vscreen = virgl_screen(screen);
 482    if (!(vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_COMPUTE_SHADER))
 483       return 0;
 484    switch (param) {
 485    case PIPE_COMPUTE_CAP_MAX_GRID_SIZE:
 486       if (ret) {
 487          uint64_t *grid_size = ret;
 488          grid_size[0] = vscreen->caps.caps.v2.max_compute_grid_size[0];
 489          grid_size[1] = vscreen->caps.caps.v2.max_compute_grid_size[1];
 490          grid_size[2] = vscreen->caps.caps.v2.max_compute_grid_size[2];
 491       }
 492       return 3 * sizeof(uint64_t) ;
 493    case PIPE_COMPUTE_CAP_MAX_BLOCK_SIZE:
 494       if (ret) {
 495          uint64_t *block_size = ret;
 496          block_size[0] = vscreen->caps.caps.v2.max_compute_block_size[0];
 497          block_size[1] = vscreen->caps.caps.v2.max_compute_block_size[1];
 498          block_size[2] = vscreen->caps.caps.v2.max_compute_block_size[2];
 499       }
 500       return 3 * sizeof(uint64_t);
 501    case PIPE_COMPUTE_CAP_MAX_THREADS_PER_BLOCK:
 502       if (ret) {
 503          uint64_t *max_threads_per_block = ret;
 504          *max_threads_per_block = vscreen->caps.caps.v2.max_compute_work_group_invocations;
 505       }
 506       return sizeof(uint64_t);
 507    case PIPE_COMPUTE_CAP_MAX_LOCAL_SIZE:
 508       if (ret) {
 509          uint64_t *max_local_size = ret;
 510          /* Value reported by the closed source driver. */
 511          *max_local_size = vscreen->caps.caps.v2.max_compute_shared_memory_size;
 512       }
 513       return sizeof(uint64_t);
 514    default:
 515       break;
 516    }
 517    return 0;
 518 }
 519
 520 static boolean
 521 virgl_is_vertex_format_supported(struct pipe_screen *screen,
 522                                  enum pipe_format format)
 523 {
 524    struct virgl_screen *vscreen = virgl_screen(screen);
 525    const struct util_format_description *format_desc;
 526    int i;
 527
 528    format_desc = util_format_description(format);
 529    if (!format_desc)
 530       return FALSE;
 531
 532    if (format == PIPE_FORMAT_R11G11B10_FLOAT) {
 533       int vformat = VIRGL_FORMAT_R11G11B10_FLOAT;
 534       int big = vformat / 32;
 535       int small = vformat % 32;
 536       if (!(vscreen->caps.caps.v1.vertexbuffer.bitmask[big] & (1 << small)))
 537          return FALSE;
 538       return TRUE;
 539    }
 540
 541    /* Find the first non-VOID channel. */
 542    for (i = 0; i < 4; i++) {
 543       if (format_desc->channel[i].type != UTIL_FORMAT_TYPE_VOID) {
 544          break;
 545       }
 546    }
 547
 548    if (i == 4)
 549       return FALSE;
 550
 551    if (format_desc->layout != UTIL_FORMAT_LAYOUT_PLAIN)
 552       return FALSE;
 553
 554    if (format_desc->channel[i].type == UTIL_FORMAT_TYPE_FIXED)
 555       return FALSE;
 556    return TRUE;
 557 }
 558
 559 /**
 560  * Query format support for creating a texture, drawing surface, etc.
 561  * \param format  the format to test
 562  * \param type  one of PIPE_TEXTURE, PIPE_SURFACE
 563  */
 564 static boolean
 565 virgl_is_format_supported( struct pipe_screen *screen,
 566                                  enum pipe_format format,
 567                                  enum pipe_texture_target target,
 568                                  unsigned sample_count,
 569                                  unsigned storage_sample_count,
 570                                  unsigned bind)
 571 {
 572    struct virgl_screen *vscreen = virgl_screen(screen);
 573    const struct util_format_description *format_desc;
 574    int i;
 575
 576    if (MAX2(1, sample_count) != MAX2(1, storage_sample_count))
 577       return false;
 578
 579    assert(target == PIPE_BUFFER ||
 580           target == PIPE_TEXTURE_1D ||
 581           target == PIPE_TEXTURE_1D_ARRAY ||
 582           target == PIPE_TEXTURE_2D ||
 583           target == PIPE_TEXTURE_2D_ARRAY ||
 584           target == PIPE_TEXTURE_RECT ||
 585           target == PIPE_TEXTURE_3D ||
 586           target == PIPE_TEXTURE_CUBE ||
 587           target == PIPE_TEXTURE_CUBE_ARRAY);
 588
 589    format_desc = util_format_description(format);
 590    if (!format_desc)
 591       return FALSE;
 592
 593    if (util_format_is_intensity(format))
 594       return FALSE;
 595
 596    if (sample_count > 1) {
 597       if (!vscreen->caps.caps.v1.bset.texture_multisample)
 598          return FALSE;
 599
 600       if (bind & PIPE_BIND_SHADER_IMAGE) {
 601          if (sample_count > vscreen->caps.caps.v2.max_image_samples)
 602             return FALSE;
 603       }
 604
 605       if (sample_count > vscreen->caps.caps.v1.max_samples)
 606          return FALSE;
 607    }
 608
 609    if (bind & PIPE_BIND_VERTEX_BUFFER) {
 610       return virgl_is_vertex_format_supported(screen, format);
 611    }
 612
 613    /* Allow 3-comp 32 bit textures only for TBOs (needed for ARB_tbo_rgb32) */
 614    if ((format == PIPE_FORMAT_R32G32B32_FLOAT ||
 615        format == PIPE_FORMAT_R32G32B32_SINT ||
 616        format == PIPE_FORMAT_R32G32B32_UINT) &&
 617        target != PIPE_BUFFER)
 618       return FALSE;
 619
 620    if (bind & PIPE_BIND_RENDER_TARGET) {
 621       /* For ARB_framebuffer_no_attachments. */
 622       if (format == PIPE_FORMAT_NONE)
 623          return TRUE;
 624
 625       if (format_desc->colorspace == UTIL_FORMAT_COLORSPACE_ZS)
 626          return FALSE;
 627
 628       /*
 629        * Although possible, it is unnatural to render into compressed or YUV
 630        * surfaces. So disable these here to avoid going into weird paths
 631        * inside the state trackers.
 632        */
 633       if (format_desc->block.width != 1 ||
 634           format_desc->block.height != 1)
 635          return FALSE;
 636
 637       {
 638          int big = format / 32;
 639          int small = format % 32;
 640          if (!(vscreen->caps.caps.v1.render.bitmask[big] & (1 << small)))
 641             return FALSE;
 642       }
 643    }
 644
 645    if (bind & PIPE_BIND_DEPTH_STENCIL) {
 646       if (format_desc->colorspace != UTIL_FORMAT_COLORSPACE_ZS)
 647          return FALSE;
 648    }
 649
 650    /*
 651     * All other operations (sampling, transfer, etc).
 652     */
 653
 654    if (format_desc->layout == UTIL_FORMAT_LAYOUT_S3TC) {
 655       goto out_lookup;
 656    }
 657    if (format_desc->layout == UTIL_FORMAT_LAYOUT_RGTC) {
 658       goto out_lookup;
 659    }
 660    if (format_desc->layout == UTIL_FORMAT_LAYOUT_BPTC) {
 661       goto out_lookup;
 662    }
 663
 664    if (format == PIPE_FORMAT_R11G11B10_FLOAT) {
 665       goto out_lookup;
 666    } else if (format == PIPE_FORMAT_R9G9B9E5_FLOAT) {
 667       goto out_lookup;
 668    }
 669
 670    /* Find the first non-VOID channel. */
 671    for (i = 0; i < 4; i++) {
 672       if (format_desc->channel[i].type != UTIL_FORMAT_TYPE_VOID) {
 673          break;
 674       }
 675    }
 676
 677    if (i == 4)
 678       return FALSE;
 679
 680    /* no L4A4 */
 681    if (format_desc->nr_channels < 4 && format_desc->channel[i].size == 4)
 682       return FALSE;
 683
 684  out_lookup:
 685    {
 686       int big = format / 32;
 687       int small = format % 32;
 688       if (!(vscreen->caps.caps.v1.sampler.bitmask[big] & (1 << small)))
 689          return FALSE;
 690    }
 691    /*
 692     * Everything else should be supported by u_format.
 693     */
 694    return TRUE;
 695 }
 696
 697 static void virgl_flush_frontbuffer(struct pipe_screen *screen,
 698                                       struct pipe_resource *res,
 699                                       unsigned level, unsigned layer,
 700                                     void *winsys_drawable_handle, struct pipe_box *sub_box)
 701 {
 702    struct virgl_screen *vscreen = virgl_screen(screen);
 703    struct virgl_winsys *vws = vscreen->vws;
 704    struct virgl_resource *vres = virgl_resource(res);
 705
 706    if (vws->flush_frontbuffer)
 707       vws->flush_frontbuffer(vws, vres->hw_res, level, layer, winsys_drawable_handle,
 708                              sub_box);
 709 }
 710
 711 static void virgl_fence_reference(struct pipe_screen *screen,
 712                                   struct pipe_fence_handle **ptr,
 713                                   struct pipe_fence_handle *fence)
 714 {
 715    struct virgl_screen *vscreen = virgl_screen(screen);
 716    struct virgl_winsys *vws = vscreen->vws;
 717
 718    vws->fence_reference(vws, ptr, fence);
 719 }
 720
 721 static boolean virgl_fence_finish(struct pipe_screen *screen,
 722                                   struct pipe_context *ctx,
 723                                   struct pipe_fence_handle *fence,
 724                                   uint64_t timeout)
 725 {
 726    struct virgl_screen *vscreen = virgl_screen(screen);
 727    struct virgl_winsys *vws = vscreen->vws;
 728
 729    return vws->fence_wait(vws, fence, timeout);
 730 }
 731
 732 static int virgl_fence_get_fd(struct pipe_screen *screen,
 733             struct pipe_fence_handle *fence)
 734 {
 735    struct virgl_screen *vscreen = virgl_screen(screen);
 736    struct virgl_winsys *vws = vscreen->vws;
 737
 738    return vws->fence_get_fd(vws, fence);
 739 }
 740
 741 static uint64_t
 742 virgl_get_timestamp(struct pipe_screen *_screen)
 743 {
 744    return os_time_get_nano();
 745 }
 746
 747 static void
 748 virgl_destroy_screen(struct pipe_screen *screen)
 749 {
 750    struct virgl_screen *vscreen = virgl_screen(screen);
 751    struct virgl_winsys *vws = vscreen->vws;
 752
 753    slab_destroy_parent(&vscreen->transfer_pool);
 754
 755    if (vws)
 756       vws->destroy(vws);
 757    FREE(vscreen);
 758 }
 759
 760 struct pipe_screen *
 761 virgl_create_screen(struct virgl_winsys *vws)
 762 {
 763    struct virgl_screen *screen = CALLOC_STRUCT(virgl_screen);
 764
 765    if (!screen)
 766       return NULL;
 767
 768    virgl_debug = debug_get_option_virgl_debug();
 769
 770    screen->vws = vws;
 771    screen->base.get_name = virgl_get_name;
 772    screen->base.get_vendor = virgl_get_vendor;
 773    screen->base.get_param = virgl_get_param;
 774    screen->base.get_shader_param = virgl_get_shader_param;
 775    screen->base.get_compute_param = virgl_get_compute_param;
 776    screen->base.get_paramf = virgl_get_paramf;
 777    screen->base.is_format_supported = virgl_is_format_supported;
 778    screen->base.destroy = virgl_destroy_screen;
 779    screen->base.context_create = virgl_context_create;
 780    screen->base.flush_frontbuffer = virgl_flush_frontbuffer;
 781    screen->base.get_timestamp = virgl_get_timestamp;
 782    screen->base.fence_reference = virgl_fence_reference;
 783    //screen->base.fence_signalled = virgl_fence_signalled;
 784    screen->base.fence_finish = virgl_fence_finish;
 785    screen->base.fence_get_fd = virgl_fence_get_fd;
 786
 787    virgl_init_screen_resource_functions(&screen->base);
 788
 789    vws->get_caps(vws, &screen->caps);
 790
 791    screen->refcnt = 1;
 792
 793    slab_create_parent(&screen->transfer_pool, sizeof(struct virgl_transfer), 16);
 794
 795    return &screen->base;
 796 }