gallium: Redefine the max texture 2d cap from _LEVELS to _SIZE.
[mesa.git] / src / gallium / drivers / virgl / virgl_screen.c
1 /*
2 * Copyright 2014, 2015 Red Hat.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 */
23 #include "util/u_memory.h"
24 #include "util/u_format.h"
25 #include "util/u_format_s3tc.h"
26 #include "util/u_screen.h"
27 #include "util/u_video.h"
28 #include "util/u_math.h"
29 #include "util/os_time.h"
30 #include "pipe/p_defines.h"
31 #include "pipe/p_screen.h"
32
33 #include "tgsi/tgsi_exec.h"
34
35 #include "virgl_screen.h"
36 #include "virgl_resource.h"
37 #include "virgl_public.h"
38 #include "virgl_context.h"
39
40 int virgl_debug = 0;
41 static const struct debug_named_value debug_options[] = {
42 { "verbose", VIRGL_DEBUG_VERBOSE, NULL },
43 { "tgsi", VIRGL_DEBUG_TGSI, NULL },
44 DEBUG_NAMED_VALUE_END
45 };
46 DEBUG_GET_ONCE_FLAGS_OPTION(virgl_debug, "VIRGL_DEBUG", debug_options, 0)
47
48 static const char *
49 virgl_get_vendor(struct pipe_screen *screen)
50 {
51 return "Red Hat";
52 }
53
54
55 static const char *
56 virgl_get_name(struct pipe_screen *screen)
57 {
58 return "virgl";
59 }
60
61 static int
62 virgl_get_param(struct pipe_screen *screen, enum pipe_cap param)
63 {
64 struct virgl_screen *vscreen = virgl_screen(screen);
65 switch (param) {
66 case PIPE_CAP_NPOT_TEXTURES:
67 return 1;
68 case PIPE_CAP_SM3:
69 return 1;
70 case PIPE_CAP_ANISOTROPIC_FILTER:
71 return 1;
72 case PIPE_CAP_POINT_SPRITE:
73 return 1;
74 case PIPE_CAP_MAX_RENDER_TARGETS:
75 return vscreen->caps.caps.v1.max_render_targets;
76 case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
77 return vscreen->caps.caps.v1.max_dual_source_render_targets;
78 case PIPE_CAP_OCCLUSION_QUERY:
79 return vscreen->caps.caps.v1.bset.occlusion_query;
80 case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
81 case PIPE_CAP_TEXTURE_MIRROR_CLAMP_TO_EDGE:
82 return vscreen->caps.caps.v1.bset.mirror_clamp;
83 case PIPE_CAP_TEXTURE_SWIZZLE:
84 return 1;
85 case PIPE_CAP_MAX_TEXTURE_2D_SIZE:
86 if (vscreen->caps.caps.v2.max_texture_2d_size)
87 return vscreen->caps.caps.v2.max_texture_2d_size;
88 return 16384;
89 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
90 if (vscreen->caps.caps.v2.max_texture_3d_size)
91 return 1 + util_logbase2(vscreen->caps.caps.v2.max_texture_3d_size);
92 return 9; /* 256 x 256 x 256 */
93 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
94 if (vscreen->caps.caps.v2.max_texture_cube_size)
95 return 1 + util_logbase2(vscreen->caps.caps.v2.max_texture_cube_size);
96 return 13; /* 4K x 4K */
97 case PIPE_CAP_BLEND_EQUATION_SEPARATE:
98 return 1;
99 case PIPE_CAP_INDEP_BLEND_ENABLE:
100 return vscreen->caps.caps.v1.bset.indep_blend_enable;
101 case PIPE_CAP_INDEP_BLEND_FUNC:
102 return vscreen->caps.caps.v1.bset.indep_blend_func;
103 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
104 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
105 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
106 return 1;
107 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
108 return vscreen->caps.caps.v1.bset.fragment_coord_conventions;
109 case PIPE_CAP_DEPTH_CLIP_DISABLE:
110 return vscreen->caps.caps.v1.bset.depth_clip_disable;
111 case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
112 return vscreen->caps.caps.v1.max_streamout_buffers;
113 case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
114 case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
115 return 16*4;
116 case PIPE_CAP_PRIMITIVE_RESTART:
117 return vscreen->caps.caps.v1.bset.primitive_restart;
118 case PIPE_CAP_SHADER_STENCIL_EXPORT:
119 return vscreen->caps.caps.v1.bset.shader_stencil_export;
120 case PIPE_CAP_TGSI_INSTANCEID:
121 case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
122 return 1;
123 case PIPE_CAP_SEAMLESS_CUBE_MAP:
124 return vscreen->caps.caps.v1.bset.seamless_cube_map;
125 case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
126 return vscreen->caps.caps.v1.bset.seamless_cube_map_per_texture;
127 case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
128 return vscreen->caps.caps.v1.max_texture_array_layers;
129 case PIPE_CAP_MIN_TEXEL_OFFSET:
130 return vscreen->caps.caps.v2.min_texel_offset;
131 case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
132 return vscreen->caps.caps.v2.min_texture_gather_offset;
133 case PIPE_CAP_MAX_TEXEL_OFFSET:
134 return vscreen->caps.caps.v2.max_texel_offset;
135 case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
136 return vscreen->caps.caps.v2.max_texture_gather_offset;
137 case PIPE_CAP_CONDITIONAL_RENDER:
138 return vscreen->caps.caps.v1.bset.conditional_render;
139 case PIPE_CAP_TEXTURE_BARRIER:
140 return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_TEXTURE_BARRIER;
141 case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
142 return 1;
143 case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
144 case PIPE_CAP_VERTEX_COLOR_CLAMPED:
145 return vscreen->caps.caps.v1.bset.color_clamping;
146 case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
147 return (vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_FBO_MIXED_COLOR_FORMATS) ||
148 (vscreen->caps.caps.v2.host_feature_check_version < 1);
149 case PIPE_CAP_GLSL_FEATURE_LEVEL:
150 return vscreen->caps.caps.v1.glsl_level;
151 case PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY:
152 return MIN2(vscreen->caps.caps.v1.glsl_level, 140);
153 case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
154 case PIPE_CAP_DEPTH_CLIP_DISABLE_SEPARATE:
155 return 0;
156 case PIPE_CAP_COMPUTE:
157 return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_COMPUTE_SHADER;
158 case PIPE_CAP_USER_VERTEX_BUFFERS:
159 return 0;
160 case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
161 return vscreen->caps.caps.v2.uniform_buffer_offset_alignment;
162 case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
163 case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS:
164 return vscreen->caps.caps.v1.bset.streamout_pause_resume;
165 case PIPE_CAP_START_INSTANCE:
166 return vscreen->caps.caps.v1.bset.start_instance;
167 case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
168 case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
169 case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
170 case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
171 case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
172 return 0;
173 case PIPE_CAP_QUERY_TIMESTAMP:
174 return 1;
175 case PIPE_CAP_QUERY_TIME_ELAPSED:
176 return 1;
177 case PIPE_CAP_TGSI_TEXCOORD:
178 return 0;
179 case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
180 return VIRGL_MAP_BUFFER_ALIGNMENT;
181 case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
182 return vscreen->caps.caps.v1.max_tbo_size > 0;
183 case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
184 return vscreen->caps.caps.v2.texture_buffer_offset_alignment;
185 case PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY:
186 return 0;
187 case PIPE_CAP_CUBE_MAP_ARRAY:
188 return vscreen->caps.caps.v1.bset.cube_map_array;
189 case PIPE_CAP_TEXTURE_MULTISAMPLE:
190 return vscreen->caps.caps.v1.bset.texture_multisample;
191 case PIPE_CAP_MAX_VIEWPORTS:
192 return vscreen->caps.caps.v1.max_viewports;
193 case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
194 return vscreen->caps.caps.v1.max_tbo_size;
195 case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
196 case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
197 case PIPE_CAP_ENDIANNESS:
198 return 0;
199 case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
200 case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
201 return 1;
202 case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
203 return 0;
204 case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
205 return vscreen->caps.caps.v2.max_geom_output_vertices;
206 case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
207 return vscreen->caps.caps.v2.max_geom_total_output_components;
208 case PIPE_CAP_TEXTURE_QUERY_LOD:
209 return vscreen->caps.caps.v1.bset.texture_query_lod;
210 case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
211 return vscreen->caps.caps.v1.max_texture_gather_components;
212 case PIPE_CAP_DRAW_INDIRECT:
213 return vscreen->caps.caps.v1.bset.has_indirect_draw;
214 case PIPE_CAP_SAMPLE_SHADING:
215 case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
216 return vscreen->caps.caps.v1.bset.has_sample_shading;
217 case PIPE_CAP_CULL_DISTANCE:
218 return vscreen->caps.caps.v1.bset.has_cull;
219 case PIPE_CAP_MAX_VERTEX_STREAMS:
220 return ((vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_TRANSFORM_FEEDBACK3) ||
221 (vscreen->caps.caps.v2.host_feature_check_version < 2)) ? 4 : 1;
222 case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
223 return vscreen->caps.caps.v1.bset.conditional_render_inverted;
224 case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
225 return vscreen->caps.caps.v1.bset.derivative_control;
226 case PIPE_CAP_POLYGON_OFFSET_CLAMP:
227 return vscreen->caps.caps.v1.bset.polygon_offset_clamp;
228 case PIPE_CAP_QUERY_SO_OVERFLOW:
229 return vscreen->caps.caps.v1.bset.transform_feedback_overflow_query;
230 case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
231 return vscreen->caps.caps.v2.shader_buffer_offset_alignment;
232 case PIPE_CAP_DOUBLES:
233 return vscreen->caps.caps.v1.bset.has_fp64 ||
234 (vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_FAKE_FP64);
235 case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
236 return vscreen->caps.caps.v2.max_shader_patch_varyings;
237 case PIPE_CAP_SAMPLER_VIEW_TARGET:
238 return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_TEXTURE_VIEW;
239 case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
240 return vscreen->caps.caps.v2.max_vertex_attrib_stride;
241 case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
242 return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_COPY_IMAGE;
243 case PIPE_CAP_TGSI_TXQS:
244 return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_TXQS;
245 case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT:
246 return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_FB_NO_ATTACH;
247 case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR:
248 return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_ROBUST_BUFFER_ACCESS;
249 case PIPE_CAP_TGSI_FS_FBFETCH:
250 return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_TGSI_FBFETCH;
251 case PIPE_CAP_TGSI_CLOCK:
252 return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_SHADER_CLOCK;
253 case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
254 return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_TGSI_COMPONENTS;
255 case PIPE_CAP_MAX_COMBINED_SHADER_BUFFERS:
256 return vscreen->caps.caps.v2.max_combined_shader_buffers;
257 case PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTERS:
258 return vscreen->caps.caps.v2.max_combined_atomic_counters;
259 case PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTER_BUFFERS:
260 return vscreen->caps.caps.v2.max_combined_atomic_counter_buffers;
261 case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
262 case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
263 return 1; /* TODO: need to introduce a hw-cap for this */
264 case PIPE_CAP_QUERY_BUFFER_OBJECT:
265 return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_QBO;
266 case PIPE_CAP_MAX_VARYINGS:
267 if (vscreen->caps.caps.v1.glsl_level < 150)
268 return vscreen->caps.caps.v2.max_vertex_attribs;
269 return 32;
270 case PIPE_CAP_FAKE_SW_MSAA:
271 /* If the host supports only one sample (e.g., if it is using softpipe),
272 * fake multisampling to able to advertise higher GL versions. */
273 return (vscreen->caps.caps.v1.max_samples == 1) ? 1 : 0;
274 case PIPE_CAP_MULTI_DRAW_INDIRECT:
275 return !!(vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_MULTI_DRAW_INDIRECT);
276 case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS:
277 return !!(vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_INDIRECT_PARAMS);
278 case PIPE_CAP_TEXTURE_GATHER_SM5:
279 case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
280 case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
281 case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
282 case PIPE_CAP_CLIP_HALFZ:
283 case PIPE_CAP_VERTEXID_NOBASE:
284 case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
285 case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
286 case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
287 case PIPE_CAP_DEPTH_BOUNDS_TEST:
288 case PIPE_CAP_SHAREABLE_SHADERS:
289 case PIPE_CAP_CLEAR_TEXTURE:
290 case PIPE_CAP_DRAW_PARAMETERS:
291 case PIPE_CAP_TGSI_PACK_HALF_FLOAT:
292 case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
293 case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
294 case PIPE_CAP_INVALIDATE_BUFFER:
295 case PIPE_CAP_GENERATE_MIPMAP:
296 case PIPE_CAP_SURFACE_REINTERPRET_BLOCKS:
297 case PIPE_CAP_STRING_MARKER:
298 case PIPE_CAP_QUERY_MEMORY_INFO:
299 case PIPE_CAP_PCI_GROUP:
300 case PIPE_CAP_PCI_BUS:
301 case PIPE_CAP_PCI_DEVICE:
302 case PIPE_CAP_PCI_FUNCTION:
303 case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES:
304 case PIPE_CAP_TGSI_VOTE:
305 case PIPE_CAP_MAX_WINDOW_RECTANGLES:
306 case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED:
307 case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS:
308 case PIPE_CAP_TGSI_CAN_READ_OUTPUTS:
309 case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
310 case PIPE_CAP_TGSI_MUL_ZERO_WINS:
311 case PIPE_CAP_INT64:
312 case PIPE_CAP_INT64_DIVMOD:
313 case PIPE_CAP_TGSI_TEX_TXF_LZ:
314 case PIPE_CAP_POLYGON_MODE_FILL_RECTANGLE:
315 case PIPE_CAP_SPARSE_BUFFER_PAGE_SIZE:
316 case PIPE_CAP_TGSI_BALLOT:
317 case PIPE_CAP_TGSI_TES_LAYER_VIEWPORT:
318 case PIPE_CAP_CAN_BIND_CONST_BUFFER_AS_VERTEX:
319 case PIPE_CAP_ALLOW_MAPPED_BUFFERS_DURING_EXECUTION:
320 case PIPE_CAP_POST_DEPTH_COVERAGE:
321 case PIPE_CAP_BINDLESS_TEXTURE:
322 case PIPE_CAP_NIR_SAMPLERS_AS_DEREF:
323 case PIPE_CAP_MEMOBJ:
324 case PIPE_CAP_LOAD_CONSTBUF:
325 case PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS:
326 case PIPE_CAP_TILE_RASTER_ORDER:
327 case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
328 case PIPE_CAP_FRAMEBUFFER_MSAA_CONSTRAINTS:
329 case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
330 case PIPE_CAP_CONTEXT_PRIORITY_MASK:
331 case PIPE_CAP_FENCE_SIGNAL:
332 case PIPE_CAP_CONSTBUF0_FLAGS:
333 case PIPE_CAP_PACKED_UNIFORMS:
334 case PIPE_CAP_CONSERVATIVE_RASTER_POST_SNAP_TRIANGLES:
335 case PIPE_CAP_CONSERVATIVE_RASTER_POST_SNAP_POINTS_LINES:
336 case PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_TRIANGLES:
337 case PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_POINTS_LINES:
338 case PIPE_CAP_CONSERVATIVE_RASTER_POST_DEPTH_COVERAGE:
339 case PIPE_CAP_MAX_CONSERVATIVE_RASTER_SUBPIXEL_PRECISION_BIAS:
340 case PIPE_CAP_PROGRAMMABLE_SAMPLE_LOCATIONS:
341 case PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET:
342 return 0;
343 case PIPE_CAP_MAX_GS_INVOCATIONS:
344 return 32;
345 case PIPE_CAP_MAX_SHADER_BUFFER_SIZE:
346 return 1 << 27;
347 case PIPE_CAP_VENDOR_ID:
348 return 0x1af4;
349 case PIPE_CAP_DEVICE_ID:
350 return 0x1010;
351 case PIPE_CAP_ACCELERATED:
352 return 1;
353 case PIPE_CAP_UMA:
354 case PIPE_CAP_VIDEO_MEMORY:
355 return 0;
356 case PIPE_CAP_NATIVE_FENCE_FD:
357 return vscreen->vws->supports_fences;
358 case PIPE_CAP_DEST_SURFACE_SRGB_CONTROL:
359 return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_SRGB_WRITE_CONTROL;
360 case PIPE_CAP_TGSI_SKIP_SHRINK_IO_ARRAYS:
361 return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_INDIRECT_INPUT_ADDR;
362 default:
363 return u_pipe_screen_get_param_defaults(screen, param);
364 }
365 }
366
367 static int
368 virgl_get_shader_param(struct pipe_screen *screen,
369 enum pipe_shader_type shader,
370 enum pipe_shader_cap param)
371 {
372 struct virgl_screen *vscreen = virgl_screen(screen);
373
374 if ((shader == PIPE_SHADER_TESS_CTRL || shader == PIPE_SHADER_TESS_EVAL) &&
375 !vscreen->caps.caps.v1.bset.has_tessellation_shaders)
376 return 0;
377
378 if (shader == PIPE_SHADER_COMPUTE &&
379 !(vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_COMPUTE_SHADER))
380 return 0;
381
382 switch(shader)
383 {
384 case PIPE_SHADER_FRAGMENT:
385 case PIPE_SHADER_VERTEX:
386 case PIPE_SHADER_GEOMETRY:
387 case PIPE_SHADER_TESS_CTRL:
388 case PIPE_SHADER_TESS_EVAL:
389 case PIPE_SHADER_COMPUTE:
390 switch (param) {
391 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
392 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
393 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
394 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
395 return INT_MAX;
396 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
397 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
398 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
399 return 1;
400 case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
401 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
402 return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_INDIRECT_INPUT_ADDR;
403 case PIPE_SHADER_CAP_MAX_INPUTS:
404 if (vscreen->caps.caps.v1.glsl_level < 150)
405 return vscreen->caps.caps.v2.max_vertex_attribs;
406 return (shader == PIPE_SHADER_VERTEX ||
407 shader == PIPE_SHADER_GEOMETRY) ? vscreen->caps.caps.v2.max_vertex_attribs : 32;
408 case PIPE_SHADER_CAP_MAX_OUTPUTS:
409 if (shader == PIPE_SHADER_FRAGMENT)
410 return vscreen->caps.caps.v1.max_render_targets;
411 return vscreen->caps.caps.v2.max_vertex_outputs;
412 // case PIPE_SHADER_CAP_MAX_CONSTS:
413 // return 4096;
414 case PIPE_SHADER_CAP_MAX_TEMPS:
415 return 256;
416 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
417 return vscreen->caps.caps.v1.max_uniform_blocks;
418 // case PIPE_SHADER_CAP_MAX_ADDRS:
419 // return 1;
420 case PIPE_SHADER_CAP_SUBROUTINES:
421 return 1;
422 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
423 return 16;
424 case PIPE_SHADER_CAP_INTEGERS:
425 return vscreen->caps.caps.v1.glsl_level >= 130;
426 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
427 return 32;
428 case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
429 return 4096 * sizeof(float[4]);
430 case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
431 if (shader == PIPE_SHADER_FRAGMENT || shader == PIPE_SHADER_COMPUTE)
432 return vscreen->caps.caps.v2.max_shader_buffer_frag_compute;
433 else
434 return vscreen->caps.caps.v2.max_shader_buffer_other_stages;
435 case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
436 if (shader == PIPE_SHADER_FRAGMENT || shader == PIPE_SHADER_COMPUTE)
437 return vscreen->caps.caps.v2.max_shader_image_frag_compute;
438 else
439 return vscreen->caps.caps.v2.max_shader_image_other_stages;
440 case PIPE_SHADER_CAP_SUPPORTED_IRS:
441 return (1 << PIPE_SHADER_IR_TGSI);
442 case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
443 return vscreen->caps.caps.v2.max_atomic_counters[shader];
444 case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
445 return vscreen->caps.caps.v2.max_atomic_counter_buffers[shader];
446 case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
447 case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
448 case PIPE_SHADER_CAP_INT64_ATOMICS:
449 case PIPE_SHADER_CAP_FP16:
450 return 0;
451 case PIPE_SHADER_CAP_SCALAR_ISA:
452 return 1;
453 default:
454 return 0;
455 }
456 default:
457 return 0;
458 }
459 }
460
461 static float
462 virgl_get_paramf(struct pipe_screen *screen, enum pipe_capf param)
463 {
464 struct virgl_screen *vscreen = virgl_screen(screen);
465 switch (param) {
466 case PIPE_CAPF_MAX_LINE_WIDTH:
467 return vscreen->caps.caps.v2.max_aliased_line_width;
468 case PIPE_CAPF_MAX_LINE_WIDTH_AA:
469 return vscreen->caps.caps.v2.max_smooth_line_width;
470 case PIPE_CAPF_MAX_POINT_WIDTH:
471 return vscreen->caps.caps.v2.max_aliased_point_size;
472 case PIPE_CAPF_MAX_POINT_WIDTH_AA:
473 return vscreen->caps.caps.v2.max_smooth_point_size;
474 case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
475 return 16.0;
476 case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
477 return vscreen->caps.caps.v2.max_texture_lod_bias;
478 case PIPE_CAPF_MIN_CONSERVATIVE_RASTER_DILATE:
479 case PIPE_CAPF_MAX_CONSERVATIVE_RASTER_DILATE:
480 case PIPE_CAPF_CONSERVATIVE_RASTER_DILATE_GRANULARITY:
481 return 0.0f;
482 }
483 /* should only get here on unhandled cases */
484 debug_printf("Unexpected PIPE_CAPF %d query\n", param);
485 return 0.0;
486 }
487
488 static int
489 virgl_get_compute_param(struct pipe_screen *screen,
490 enum pipe_shader_ir ir_type,
491 enum pipe_compute_cap param,
492 void *ret)
493 {
494 struct virgl_screen *vscreen = virgl_screen(screen);
495 if (!(vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_COMPUTE_SHADER))
496 return 0;
497 switch (param) {
498 case PIPE_COMPUTE_CAP_MAX_GRID_SIZE:
499 if (ret) {
500 uint64_t *grid_size = ret;
501 grid_size[0] = vscreen->caps.caps.v2.max_compute_grid_size[0];
502 grid_size[1] = vscreen->caps.caps.v2.max_compute_grid_size[1];
503 grid_size[2] = vscreen->caps.caps.v2.max_compute_grid_size[2];
504 }
505 return 3 * sizeof(uint64_t) ;
506 case PIPE_COMPUTE_CAP_MAX_BLOCK_SIZE:
507 if (ret) {
508 uint64_t *block_size = ret;
509 block_size[0] = vscreen->caps.caps.v2.max_compute_block_size[0];
510 block_size[1] = vscreen->caps.caps.v2.max_compute_block_size[1];
511 block_size[2] = vscreen->caps.caps.v2.max_compute_block_size[2];
512 }
513 return 3 * sizeof(uint64_t);
514 case PIPE_COMPUTE_CAP_MAX_THREADS_PER_BLOCK:
515 if (ret) {
516 uint64_t *max_threads_per_block = ret;
517 *max_threads_per_block = vscreen->caps.caps.v2.max_compute_work_group_invocations;
518 }
519 return sizeof(uint64_t);
520 case PIPE_COMPUTE_CAP_MAX_LOCAL_SIZE:
521 if (ret) {
522 uint64_t *max_local_size = ret;
523 /* Value reported by the closed source driver. */
524 *max_local_size = vscreen->caps.caps.v2.max_compute_shared_memory_size;
525 }
526 return sizeof(uint64_t);
527 default:
528 break;
529 }
530 return 0;
531 }
532
533 static boolean
534 has_format_bit(struct virgl_supported_format_mask *mask,
535 enum virgl_formats fmt)
536 {
537 assert(fmt < VIRGL_FORMAT_MAX);
538 unsigned val = (unsigned)fmt;
539 unsigned idx = val / 32;
540 unsigned bit = val % 32;
541 assert(idx < ARRAY_SIZE(mask->bitmask));
542 return (mask->bitmask[val / 32] & (1u << bit)) != 0;
543 }
544
545 boolean
546 virgl_has_readback_format(struct pipe_screen *screen,
547 enum virgl_formats fmt)
548 {
549 struct virgl_screen *vscreen = virgl_screen(screen);
550 return has_format_bit(&vscreen->caps.caps.v2.supported_readback_formats,
551 fmt);
552 }
553
554 static boolean
555 virgl_is_vertex_format_supported(struct pipe_screen *screen,
556 enum pipe_format format)
557 {
558 struct virgl_screen *vscreen = virgl_screen(screen);
559 const struct util_format_description *format_desc;
560 int i;
561
562 format_desc = util_format_description(format);
563 if (!format_desc)
564 return FALSE;
565
566 if (format == PIPE_FORMAT_R11G11B10_FLOAT) {
567 int vformat = VIRGL_FORMAT_R11G11B10_FLOAT;
568 int big = vformat / 32;
569 int small = vformat % 32;
570 if (!(vscreen->caps.caps.v1.vertexbuffer.bitmask[big] & (1 << small)))
571 return FALSE;
572 return TRUE;
573 }
574
575 /* Find the first non-VOID channel. */
576 for (i = 0; i < 4; i++) {
577 if (format_desc->channel[i].type != UTIL_FORMAT_TYPE_VOID) {
578 break;
579 }
580 }
581
582 if (i == 4)
583 return FALSE;
584
585 if (format_desc->layout != UTIL_FORMAT_LAYOUT_PLAIN)
586 return FALSE;
587
588 if (format_desc->channel[i].type == UTIL_FORMAT_TYPE_FIXED)
589 return FALSE;
590 return TRUE;
591 }
592
593 /**
594 * Query format support for creating a texture, drawing surface, etc.
595 * \param format the format to test
596 * \param type one of PIPE_TEXTURE, PIPE_SURFACE
597 */
598 static boolean
599 virgl_is_format_supported( struct pipe_screen *screen,
600 enum pipe_format format,
601 enum pipe_texture_target target,
602 unsigned sample_count,
603 unsigned storage_sample_count,
604 unsigned bind)
605 {
606 struct virgl_screen *vscreen = virgl_screen(screen);
607 const struct util_format_description *format_desc;
608 int i;
609
610 if (MAX2(1, sample_count) != MAX2(1, storage_sample_count))
611 return false;
612
613 assert(target == PIPE_BUFFER ||
614 target == PIPE_TEXTURE_1D ||
615 target == PIPE_TEXTURE_1D_ARRAY ||
616 target == PIPE_TEXTURE_2D ||
617 target == PIPE_TEXTURE_2D_ARRAY ||
618 target == PIPE_TEXTURE_RECT ||
619 target == PIPE_TEXTURE_3D ||
620 target == PIPE_TEXTURE_CUBE ||
621 target == PIPE_TEXTURE_CUBE_ARRAY);
622
623 format_desc = util_format_description(format);
624 if (!format_desc)
625 return FALSE;
626
627 if (util_format_is_intensity(format))
628 return FALSE;
629
630 if (sample_count > 1) {
631 if (!vscreen->caps.caps.v1.bset.texture_multisample)
632 return FALSE;
633
634 if (bind & PIPE_BIND_SHADER_IMAGE) {
635 if (sample_count > vscreen->caps.caps.v2.max_image_samples)
636 return FALSE;
637 }
638
639 if (sample_count > vscreen->caps.caps.v1.max_samples)
640 return FALSE;
641 }
642
643 if (bind & PIPE_BIND_VERTEX_BUFFER) {
644 return virgl_is_vertex_format_supported(screen, format);
645 }
646
647 if (util_format_is_compressed(format) && target == PIPE_BUFFER)
648 return FALSE;
649
650 /* Allow 3-comp 32 bit textures only for TBOs (needed for ARB_tbo_rgb32) */
651 if ((format == PIPE_FORMAT_R32G32B32_FLOAT ||
652 format == PIPE_FORMAT_R32G32B32_SINT ||
653 format == PIPE_FORMAT_R32G32B32_UINT) &&
654 target != PIPE_BUFFER)
655 return FALSE;
656
657 if ((format_desc->layout == UTIL_FORMAT_LAYOUT_RGTC ||
658 format_desc->layout == UTIL_FORMAT_LAYOUT_ETC ||
659 format_desc->layout == UTIL_FORMAT_LAYOUT_S3TC) &&
660 target == PIPE_TEXTURE_3D)
661 return FALSE;
662
663 if (bind & PIPE_BIND_RENDER_TARGET) {
664 /* For ARB_framebuffer_no_attachments. */
665 if (format == PIPE_FORMAT_NONE)
666 return TRUE;
667
668 if (format_desc->colorspace == UTIL_FORMAT_COLORSPACE_ZS)
669 return FALSE;
670
671 /*
672 * Although possible, it is unnatural to render into compressed or YUV
673 * surfaces. So disable these here to avoid going into weird paths
674 * inside the state trackers.
675 */
676 if (format_desc->block.width != 1 ||
677 format_desc->block.height != 1)
678 return FALSE;
679
680 {
681 int big = format / 32;
682 int small = format % 32;
683 if (!(vscreen->caps.caps.v1.render.bitmask[big] & (1 << small)))
684 return FALSE;
685 }
686 }
687
688 if (bind & PIPE_BIND_DEPTH_STENCIL) {
689 if (format_desc->colorspace != UTIL_FORMAT_COLORSPACE_ZS)
690 return FALSE;
691 }
692
693 /*
694 * All other operations (sampling, transfer, etc).
695 */
696
697 if (format_desc->layout == UTIL_FORMAT_LAYOUT_S3TC) {
698 goto out_lookup;
699 }
700 if (format_desc->layout == UTIL_FORMAT_LAYOUT_RGTC) {
701 goto out_lookup;
702 }
703 if (format_desc->layout == UTIL_FORMAT_LAYOUT_BPTC) {
704 goto out_lookup;
705 }
706
707 if (format == PIPE_FORMAT_R11G11B10_FLOAT) {
708 goto out_lookup;
709 } else if (format == PIPE_FORMAT_R9G9B9E5_FLOAT) {
710 goto out_lookup;
711 }
712
713 /* Find the first non-VOID channel. */
714 for (i = 0; i < 4; i++) {
715 if (format_desc->channel[i].type != UTIL_FORMAT_TYPE_VOID) {
716 break;
717 }
718 }
719
720 if (i == 4)
721 return FALSE;
722
723 /* no L4A4 */
724 if (format_desc->nr_channels < 4 && format_desc->channel[i].size == 4)
725 return FALSE;
726
727 out_lookup:
728 {
729 int big = format / 32;
730 int small = format % 32;
731 if (!(vscreen->caps.caps.v1.sampler.bitmask[big] & (1 << small)))
732 return FALSE;
733 }
734 /*
735 * Everything else should be supported by u_format.
736 */
737 return TRUE;
738 }
739
740 static void virgl_flush_frontbuffer(struct pipe_screen *screen,
741 struct pipe_resource *res,
742 unsigned level, unsigned layer,
743 void *winsys_drawable_handle, struct pipe_box *sub_box)
744 {
745 struct virgl_screen *vscreen = virgl_screen(screen);
746 struct virgl_winsys *vws = vscreen->vws;
747 struct virgl_resource *vres = virgl_resource(res);
748
749 if (vws->flush_frontbuffer)
750 vws->flush_frontbuffer(vws, vres->hw_res, level, layer, winsys_drawable_handle,
751 sub_box);
752 }
753
754 static void virgl_fence_reference(struct pipe_screen *screen,
755 struct pipe_fence_handle **ptr,
756 struct pipe_fence_handle *fence)
757 {
758 struct virgl_screen *vscreen = virgl_screen(screen);
759 struct virgl_winsys *vws = vscreen->vws;
760
761 vws->fence_reference(vws, ptr, fence);
762 }
763
764 static boolean virgl_fence_finish(struct pipe_screen *screen,
765 struct pipe_context *ctx,
766 struct pipe_fence_handle *fence,
767 uint64_t timeout)
768 {
769 struct virgl_screen *vscreen = virgl_screen(screen);
770 struct virgl_winsys *vws = vscreen->vws;
771
772 return vws->fence_wait(vws, fence, timeout);
773 }
774
775 static int virgl_fence_get_fd(struct pipe_screen *screen,
776 struct pipe_fence_handle *fence)
777 {
778 struct virgl_screen *vscreen = virgl_screen(screen);
779 struct virgl_winsys *vws = vscreen->vws;
780
781 return vws->fence_get_fd(vws, fence);
782 }
783
784 static uint64_t
785 virgl_get_timestamp(struct pipe_screen *_screen)
786 {
787 return os_time_get_nano();
788 }
789
790 static void
791 virgl_destroy_screen(struct pipe_screen *screen)
792 {
793 struct virgl_screen *vscreen = virgl_screen(screen);
794 struct virgl_winsys *vws = vscreen->vws;
795
796 slab_destroy_parent(&vscreen->transfer_pool);
797
798 if (vws)
799 vws->destroy(vws);
800 FREE(vscreen);
801 }
802
803 static void
804 fixup_readback_format(union virgl_caps *caps)
805 {
806 const size_t size = ARRAY_SIZE(caps->v2.supported_readback_formats.bitmask);
807 for (int i = 0; i < size; ++i) {
808 if (caps->v2.supported_readback_formats.bitmask[i] != 0)
809 return; /* we got some formats, we definately have a new protocol */
810 }
811
812 /* old protocol used; fall back to considering all sampleable formats valid
813 * readback-formats
814 */
815 for (int i = 0; i < size; ++i) {
816 caps->v2.supported_readback_formats.bitmask[i] =
817 caps->v1.sampler.bitmask[i];
818 }
819 }
820
821 struct pipe_screen *
822 virgl_create_screen(struct virgl_winsys *vws)
823 {
824 struct virgl_screen *screen = CALLOC_STRUCT(virgl_screen);
825
826 if (!screen)
827 return NULL;
828
829 virgl_debug = debug_get_option_virgl_debug();
830
831 screen->vws = vws;
832 screen->base.get_name = virgl_get_name;
833 screen->base.get_vendor = virgl_get_vendor;
834 screen->base.get_param = virgl_get_param;
835 screen->base.get_shader_param = virgl_get_shader_param;
836 screen->base.get_compute_param = virgl_get_compute_param;
837 screen->base.get_paramf = virgl_get_paramf;
838 screen->base.is_format_supported = virgl_is_format_supported;
839 screen->base.destroy = virgl_destroy_screen;
840 screen->base.context_create = virgl_context_create;
841 screen->base.flush_frontbuffer = virgl_flush_frontbuffer;
842 screen->base.get_timestamp = virgl_get_timestamp;
843 screen->base.fence_reference = virgl_fence_reference;
844 //screen->base.fence_signalled = virgl_fence_signalled;
845 screen->base.fence_finish = virgl_fence_finish;
846 screen->base.fence_get_fd = virgl_fence_get_fd;
847
848 virgl_init_screen_resource_functions(&screen->base);
849
850 vws->get_caps(vws, &screen->caps);
851 fixup_readback_format(&screen->caps.caps);
852
853 screen->refcnt = 1;
854
855 slab_create_parent(&screen->transfer_pool, sizeof(struct virgl_transfer), 16);
856
857 return &screen->base;
858 }