src/gallium/drivers/virgl/virgl_screen.c

   1 /*
   2  * Copyright 2014, 2015 Red Hat.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * on the rights to use, copy, modify, merge, publish, distribute, sub
   8  * license, and/or sell copies of the Software, and to permit persons to whom
   9  * the Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  21  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  22  */
  23 #include "util/u_memory.h"
  24 #include "util/u_format.h"
  25 #include "util/u_format_s3tc.h"
  26 #include "util/u_screen.h"
  27 #include "util/u_video.h"
  28 #include "util/u_math.h"
  29 #include "util/os_time.h"
  30 #include "pipe/p_defines.h"
  31 #include "pipe/p_screen.h"
  32
  33 #include "tgsi/tgsi_exec.h"
  34
  35 #include "virgl_screen.h"
  36 #include "virgl_resource.h"
  37 #include "virgl_public.h"
  38 #include "virgl_context.h"
  39
  40 int virgl_debug = 0;
  41 static const struct debug_named_value debug_options[] = {
  42    { "verbose", VIRGL_DEBUG_VERBOSE, NULL },
  43    { "tgsi", VIRGL_DEBUG_TGSI, NULL },
  44    DEBUG_NAMED_VALUE_END
  45 };
  46 DEBUG_GET_ONCE_FLAGS_OPTION(virgl_debug, "VIRGL_DEBUG", debug_options, 0)
  47
  48 static const char *
  49 virgl_get_vendor(struct pipe_screen *screen)
  50 {
  51    return "Red Hat";
  52 }
  53
  54
  55 static const char *
  56 virgl_get_name(struct pipe_screen *screen)
  57 {
  58    return "virgl";
  59 }
  60
  61 static int
  62 virgl_get_param(struct pipe_screen *screen, enum pipe_cap param)
  63 {
  64    struct virgl_screen *vscreen = virgl_screen(screen);
  65    switch (param) {
  66    case PIPE_CAP_NPOT_TEXTURES:
  67       return 1;
  68    case PIPE_CAP_SM3:
  69       return 1;
  70    case PIPE_CAP_ANISOTROPIC_FILTER:
  71       return 1;
  72    case PIPE_CAP_POINT_SPRITE:
  73       return 1;
  74    case PIPE_CAP_MAX_RENDER_TARGETS:
  75       return vscreen->caps.caps.v1.max_render_targets;
  76    case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
  77       return vscreen->caps.caps.v1.max_dual_source_render_targets;
  78    case PIPE_CAP_OCCLUSION_QUERY:
  79       return vscreen->caps.caps.v1.bset.occlusion_query;
  80    case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
  81    case PIPE_CAP_TEXTURE_MIRROR_CLAMP_TO_EDGE:
  82       return vscreen->caps.caps.v1.bset.mirror_clamp;
  83    case PIPE_CAP_TEXTURE_SWIZZLE:
  84       return 1;
  85    case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
  86       if (vscreen->caps.caps.v2.max_texture_2d_size)
  87          return 1 + util_logbase2(vscreen->caps.caps.v2.max_texture_2d_size);
  88       return 15; /* 16K x 16K */
  89    case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
  90       if (vscreen->caps.caps.v2.max_texture_3d_size)
  91          return 1 + util_logbase2(vscreen->caps.caps.v2.max_texture_3d_size);
  92       return 9; /* 256 x 256 x 256 */
  93    case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
  94       if (vscreen->caps.caps.v2.max_texture_cube_size)
  95          return 1 + util_logbase2(vscreen->caps.caps.v2.max_texture_cube_size);
  96       return 13; /* 4K x 4K */
  97    case PIPE_CAP_BLEND_EQUATION_SEPARATE:
  98       return 1;
  99    case PIPE_CAP_INDEP_BLEND_ENABLE:
 100       return vscreen->caps.caps.v1.bset.indep_blend_enable;
 101    case PIPE_CAP_INDEP_BLEND_FUNC:
 102       return vscreen->caps.caps.v1.bset.indep_blend_func;
 103    case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
 104    case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
 105    case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
 106       return 1;
 107    case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
 108       return vscreen->caps.caps.v1.bset.fragment_coord_conventions;
 109    case PIPE_CAP_DEPTH_CLIP_DISABLE:
 110       return vscreen->caps.caps.v1.bset.depth_clip_disable;
 111    case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
 112       return vscreen->caps.caps.v1.max_streamout_buffers;
 113    case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
 114    case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
 115       return 16*4;
 116    case PIPE_CAP_PRIMITIVE_RESTART:
 117       return vscreen->caps.caps.v1.bset.primitive_restart;
 118    case PIPE_CAP_SHADER_STENCIL_EXPORT:
 119       return vscreen->caps.caps.v1.bset.shader_stencil_export;
 120    case PIPE_CAP_TGSI_INSTANCEID:
 121    case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
 122       return 1;
 123    case PIPE_CAP_SEAMLESS_CUBE_MAP:
 124       return vscreen->caps.caps.v1.bset.seamless_cube_map;
 125    case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
 126       return vscreen->caps.caps.v1.bset.seamless_cube_map_per_texture;
 127    case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
 128       return vscreen->caps.caps.v1.max_texture_array_layers;
 129    case PIPE_CAP_MIN_TEXEL_OFFSET:
 130       return vscreen->caps.caps.v2.min_texel_offset;
 131    case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
 132       return vscreen->caps.caps.v2.min_texture_gather_offset;
 133    case PIPE_CAP_MAX_TEXEL_OFFSET:
 134       return vscreen->caps.caps.v2.max_texel_offset;
 135    case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
 136       return vscreen->caps.caps.v2.max_texture_gather_offset;
 137    case PIPE_CAP_CONDITIONAL_RENDER:
 138       return vscreen->caps.caps.v1.bset.conditional_render;
 139    case PIPE_CAP_TEXTURE_BARRIER:
 140       return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_TEXTURE_BARRIER;
 141    case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
 142       return 1;
 143    case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
 144    case PIPE_CAP_VERTEX_COLOR_CLAMPED:
 145       return vscreen->caps.caps.v1.bset.color_clamping;
 146    case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
 147       return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_FBO_MIXED_COLOR_FORMATS;
 148    case PIPE_CAP_GLSL_FEATURE_LEVEL:
 149       return vscreen->caps.caps.v1.glsl_level;
 150    case PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY:
 151       return MIN2(vscreen->caps.caps.v1.glsl_level, 140);
 152    case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
 153    case PIPE_CAP_DEPTH_CLIP_DISABLE_SEPARATE:
 154       return 0;
 155    case PIPE_CAP_COMPUTE:
 156       return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_COMPUTE_SHADER;
 157    case PIPE_CAP_USER_VERTEX_BUFFERS:
 158       return 0;
 159    case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
 160       return vscreen->caps.caps.v2.uniform_buffer_offset_alignment;
 161    case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
 162    case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS:
 163       return vscreen->caps.caps.v1.bset.streamout_pause_resume;
 164    case PIPE_CAP_START_INSTANCE:
 165       return vscreen->caps.caps.v1.bset.start_instance;
 166    case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
 167    case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
 168    case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
 169    case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
 170    case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
 171       return 0;
 172    case PIPE_CAP_QUERY_TIMESTAMP:
 173       return 1;
 174    case PIPE_CAP_QUERY_TIME_ELAPSED:
 175       return 1;
 176    case PIPE_CAP_TGSI_TEXCOORD:
 177       return 0;
 178    case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
 179       return VIRGL_MAP_BUFFER_ALIGNMENT;
 180    case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
 181       return vscreen->caps.caps.v1.max_tbo_size > 0;
 182    case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
 183       return vscreen->caps.caps.v2.texture_buffer_offset_alignment;
 184    case PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY:
 185       return 0;
 186    case PIPE_CAP_CUBE_MAP_ARRAY:
 187       return vscreen->caps.caps.v1.bset.cube_map_array;
 188    case PIPE_CAP_TEXTURE_MULTISAMPLE:
 189       return vscreen->caps.caps.v1.bset.texture_multisample;
 190    case PIPE_CAP_MAX_VIEWPORTS:
 191       return vscreen->caps.caps.v1.max_viewports;
 192    case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
 193       return vscreen->caps.caps.v1.max_tbo_size;
 194    case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
 195    case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
 196    case PIPE_CAP_ENDIANNESS:
 197       return 0;
 198    case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
 199    case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
 200       return 1;
 201    case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
 202       return 0;
 203    case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
 204       return vscreen->caps.caps.v2.max_geom_output_vertices;
 205    case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
 206       return vscreen->caps.caps.v2.max_geom_total_output_components;
 207    case PIPE_CAP_TEXTURE_QUERY_LOD:
 208       return vscreen->caps.caps.v1.bset.texture_query_lod;
 209    case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
 210       return vscreen->caps.caps.v1.max_texture_gather_components;
 211    case PIPE_CAP_DRAW_INDIRECT:
 212       return vscreen->caps.caps.v1.bset.has_indirect_draw;
 213    case PIPE_CAP_SAMPLE_SHADING:
 214    case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
 215       return vscreen->caps.caps.v1.bset.has_sample_shading;
 216    case PIPE_CAP_CULL_DISTANCE:
 217       return vscreen->caps.caps.v1.bset.has_cull;
 218    case PIPE_CAP_MAX_VERTEX_STREAMS:
 219       return vscreen->caps.caps.v1.glsl_level >= 400 ? 4 : 1;
 220    case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
 221       return vscreen->caps.caps.v1.bset.conditional_render_inverted;
 222    case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
 223       return vscreen->caps.caps.v1.bset.derivative_control;
 224    case PIPE_CAP_POLYGON_OFFSET_CLAMP:
 225       return vscreen->caps.caps.v1.bset.polygon_offset_clamp;
 226    case PIPE_CAP_QUERY_SO_OVERFLOW:
 227       return vscreen->caps.caps.v1.bset.transform_feedback_overflow_query;
 228    case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
 229       return vscreen->caps.caps.v2.shader_buffer_offset_alignment;
 230    case PIPE_CAP_DOUBLES:
 231       return vscreen->caps.caps.v1.bset.has_fp64 ||
 232             (vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_FAKE_FP64);
 233    case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
 234       return vscreen->caps.caps.v2.max_shader_patch_varyings;
 235    case PIPE_CAP_SAMPLER_VIEW_TARGET:
 236       return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_TEXTURE_VIEW;
 237    case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
 238       return vscreen->caps.caps.v2.max_vertex_attrib_stride;
 239    case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
 240       return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_COPY_IMAGE;
 241    case PIPE_CAP_TGSI_TXQS:
 242       return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_TXQS;
 243    case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT:
 244       return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_FB_NO_ATTACH;
 245    case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR:
 246       return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_ROBUST_BUFFER_ACCESS;
 247    case PIPE_CAP_TGSI_FS_FBFETCH:
 248       return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_TGSI_FBFETCH;
 249    case PIPE_CAP_TGSI_CLOCK:
 250       return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_SHADER_CLOCK;
 251    case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
 252       return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_TGSI_COMPONENTS;
 253    case PIPE_CAP_MAX_COMBINED_SHADER_BUFFERS:
 254       return vscreen->caps.caps.v2.max_combined_shader_buffers;
 255    case PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTERS:
 256       return vscreen->caps.caps.v2.max_combined_atomic_counters;
 257    case PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTER_BUFFERS:
 258       return vscreen->caps.caps.v2.max_combined_atomic_counter_buffers;
 259    case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
 260    case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
 261       return 1; /* TODO: need to introduce a hw-cap for this */
 262    case PIPE_CAP_QUERY_BUFFER_OBJECT:
 263       return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_QBO;
 264    case PIPE_CAP_MAX_VARYINGS:
 265       if (vscreen->caps.caps.v1.glsl_level < 150)
 266          return vscreen->caps.caps.v2.max_vertex_attribs;
 267       return 32;
 268    case PIPE_CAP_FAKE_SW_MSAA:
 269       /* If the host supports only one sample (e.g., if it is using softpipe),
 270        * fake multisampling to able to advertise higher GL versions. */
 271       return (vscreen->caps.caps.v1.max_samples == 1) ? 1 : 0;
 272    case PIPE_CAP_TEXTURE_GATHER_SM5:
 273    case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
 274    case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
 275    case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
 276    case PIPE_CAP_MULTI_DRAW_INDIRECT:
 277    case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS:
 278    case PIPE_CAP_CLIP_HALFZ:
 279    case PIPE_CAP_VERTEXID_NOBASE:
 280    case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
 281    case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
 282    case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
 283    case PIPE_CAP_DEPTH_BOUNDS_TEST:
 284    case PIPE_CAP_SHAREABLE_SHADERS:
 285    case PIPE_CAP_CLEAR_TEXTURE:
 286    case PIPE_CAP_DRAW_PARAMETERS:
 287    case PIPE_CAP_TGSI_PACK_HALF_FLOAT:
 288    case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
 289    case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
 290    case PIPE_CAP_INVALIDATE_BUFFER:
 291    case PIPE_CAP_GENERATE_MIPMAP:
 292    case PIPE_CAP_SURFACE_REINTERPRET_BLOCKS:
 293    case PIPE_CAP_STRING_MARKER:
 294    case PIPE_CAP_QUERY_MEMORY_INFO:
 295    case PIPE_CAP_PCI_GROUP:
 296    case PIPE_CAP_PCI_BUS:
 297    case PIPE_CAP_PCI_DEVICE:
 298    case PIPE_CAP_PCI_FUNCTION:
 299    case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES:
 300    case PIPE_CAP_TGSI_VOTE:
 301    case PIPE_CAP_MAX_WINDOW_RECTANGLES:
 302    case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED:
 303    case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS:
 304    case PIPE_CAP_TGSI_CAN_READ_OUTPUTS:
 305    case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
 306    case PIPE_CAP_TGSI_MUL_ZERO_WINS:
 307    case PIPE_CAP_INT64:
 308    case PIPE_CAP_INT64_DIVMOD:
 309    case PIPE_CAP_TGSI_TEX_TXF_LZ:
 310    case PIPE_CAP_POLYGON_MODE_FILL_RECTANGLE:
 311    case PIPE_CAP_SPARSE_BUFFER_PAGE_SIZE:
 312    case PIPE_CAP_TGSI_BALLOT:
 313    case PIPE_CAP_TGSI_TES_LAYER_VIEWPORT:
 314    case PIPE_CAP_CAN_BIND_CONST_BUFFER_AS_VERTEX:
 315    case PIPE_CAP_ALLOW_MAPPED_BUFFERS_DURING_EXECUTION:
 316    case PIPE_CAP_POST_DEPTH_COVERAGE:
 317    case PIPE_CAP_BINDLESS_TEXTURE:
 318    case PIPE_CAP_NIR_SAMPLERS_AS_DEREF:
 319    case PIPE_CAP_MEMOBJ:
 320    case PIPE_CAP_LOAD_CONSTBUF:
 321    case PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS:
 322    case PIPE_CAP_TILE_RASTER_ORDER:
 323    case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
 324    case PIPE_CAP_FRAMEBUFFER_MSAA_CONSTRAINTS:
 325    case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
 326    case PIPE_CAP_CONTEXT_PRIORITY_MASK:
 327    case PIPE_CAP_FENCE_SIGNAL:
 328    case PIPE_CAP_CONSTBUF0_FLAGS:
 329    case PIPE_CAP_PACKED_UNIFORMS:
 330    case PIPE_CAP_CONSERVATIVE_RASTER_POST_SNAP_TRIANGLES:
 331    case PIPE_CAP_CONSERVATIVE_RASTER_POST_SNAP_POINTS_LINES:
 332    case PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_TRIANGLES:
 333    case PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_POINTS_LINES:
 334    case PIPE_CAP_CONSERVATIVE_RASTER_POST_DEPTH_COVERAGE:
 335    case PIPE_CAP_MAX_CONSERVATIVE_RASTER_SUBPIXEL_PRECISION_BIAS:
 336    case PIPE_CAP_PROGRAMMABLE_SAMPLE_LOCATIONS:
 337    case PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET:
 338       return 0;
 339    case PIPE_CAP_MAX_GS_INVOCATIONS:
 340       return 32;
 341    case PIPE_CAP_MAX_SHADER_BUFFER_SIZE:
 342       return 1 << 27;
 343    case PIPE_CAP_VENDOR_ID:
 344       return 0x1af4;
 345    case PIPE_CAP_DEVICE_ID:
 346       return 0x1010;
 347    case PIPE_CAP_ACCELERATED:
 348       return 1;
 349    case PIPE_CAP_UMA:
 350    case PIPE_CAP_VIDEO_MEMORY:
 351       return 0;
 352    case PIPE_CAP_NATIVE_FENCE_FD:
 353       return vscreen->vws->supports_fences;
 354    case PIPE_CAP_DEST_SURFACE_SRGB_CONTROL:
 355       return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_SRGB_WRITE_CONTROL;
 356    default:
 357       return u_pipe_screen_get_param_defaults(screen, param);
 358    }
 359 }
 360
 361 static int
 362 virgl_get_shader_param(struct pipe_screen *screen,
 363                        enum pipe_shader_type shader,
 364                        enum pipe_shader_cap param)
 365 {
 366    struct virgl_screen *vscreen = virgl_screen(screen);
 367
 368    if ((shader == PIPE_SHADER_TESS_CTRL || shader == PIPE_SHADER_TESS_EVAL) &&
 369        !vscreen->caps.caps.v1.bset.has_tessellation_shaders)
 370       return 0;
 371
 372    if (shader == PIPE_SHADER_COMPUTE &&
 373        !(vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_COMPUTE_SHADER))
 374      return 0;
 375
 376    switch(shader)
 377    {
 378    case PIPE_SHADER_FRAGMENT:
 379    case PIPE_SHADER_VERTEX:
 380    case PIPE_SHADER_GEOMETRY:
 381    case PIPE_SHADER_TESS_CTRL:
 382    case PIPE_SHADER_TESS_EVAL:
 383    case PIPE_SHADER_COMPUTE:
 384       switch (param) {
 385       case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 386       case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 387       case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 388       case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 389          return INT_MAX;
 390       case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 391       case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 392       case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 393          return 1;
 394       case PIPE_SHADER_CAP_MAX_INPUTS:
 395          if (vscreen->caps.caps.v1.glsl_level < 150)
 396             return vscreen->caps.caps.v2.max_vertex_attribs;
 397          return (shader == PIPE_SHADER_VERTEX ||
 398                  shader == PIPE_SHADER_GEOMETRY) ? vscreen->caps.caps.v2.max_vertex_attribs : 32;
 399       case PIPE_SHADER_CAP_MAX_OUTPUTS:
 400          if (shader == PIPE_SHADER_FRAGMENT)
 401             return vscreen->caps.caps.v1.max_render_targets;
 402          return vscreen->caps.caps.v2.max_vertex_outputs;
 403      // case PIPE_SHADER_CAP_MAX_CONSTS:
 404      //    return 4096;
 405       case PIPE_SHADER_CAP_MAX_TEMPS:
 406          return 256;
 407       case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 408          return vscreen->caps.caps.v1.max_uniform_blocks;
 409     //  case PIPE_SHADER_CAP_MAX_ADDRS:
 410      //    return 1;
 411       case PIPE_SHADER_CAP_SUBROUTINES:
 412          return 1;
 413       case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 414             return 16;
 415       case PIPE_SHADER_CAP_INTEGERS:
 416          return vscreen->caps.caps.v1.glsl_level >= 130;
 417       case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 418          return 32;
 419       case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 420          return 4096 * sizeof(float[4]);
 421       case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
 422          if (shader == PIPE_SHADER_FRAGMENT || shader == PIPE_SHADER_COMPUTE)
 423             return vscreen->caps.caps.v2.max_shader_buffer_frag_compute;
 424          else
 425             return vscreen->caps.caps.v2.max_shader_buffer_other_stages;
 426       case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
 427          if (shader == PIPE_SHADER_FRAGMENT || shader == PIPE_SHADER_COMPUTE)
 428             return vscreen->caps.caps.v2.max_shader_image_frag_compute;
 429          else
 430             return vscreen->caps.caps.v2.max_shader_image_other_stages;
 431       case PIPE_SHADER_CAP_SUPPORTED_IRS:
 432          return (1 << PIPE_SHADER_IR_TGSI);
 433       case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
 434          return vscreen->caps.caps.v2.max_atomic_counters[shader];
 435       case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
 436          return vscreen->caps.caps.v2.max_atomic_counter_buffers[shader];
 437       case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
 438       case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
 439       case PIPE_SHADER_CAP_INT64_ATOMICS:
 440       case PIPE_SHADER_CAP_FP16:
 441          return 0;
 442       case PIPE_SHADER_CAP_SCALAR_ISA:
 443          return 1;
 444       default:
 445          return 0;
 446       }
 447    default:
 448       return 0;
 449    }
 450 }
 451
 452 static float
 453 virgl_get_paramf(struct pipe_screen *screen, enum pipe_capf param)
 454 {
 455    struct virgl_screen *vscreen = virgl_screen(screen);
 456    switch (param) {
 457    case PIPE_CAPF_MAX_LINE_WIDTH:
 458       return vscreen->caps.caps.v2.max_aliased_line_width;
 459    case PIPE_CAPF_MAX_LINE_WIDTH_AA:
 460       return vscreen->caps.caps.v2.max_smooth_line_width;
 461    case PIPE_CAPF_MAX_POINT_WIDTH:
 462       return vscreen->caps.caps.v2.max_aliased_point_size;
 463    case PIPE_CAPF_MAX_POINT_WIDTH_AA:
 464       return vscreen->caps.caps.v2.max_smooth_point_size;
 465    case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
 466       return 16.0;
 467    case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
 468       return vscreen->caps.caps.v2.max_texture_lod_bias;
 469    case PIPE_CAPF_MIN_CONSERVATIVE_RASTER_DILATE:
 470    case PIPE_CAPF_MAX_CONSERVATIVE_RASTER_DILATE:
 471    case PIPE_CAPF_CONSERVATIVE_RASTER_DILATE_GRANULARITY:
 472       return 0.0f;
 473    }
 474    /* should only get here on unhandled cases */
 475    debug_printf("Unexpected PIPE_CAPF %d query\n", param);
 476    return 0.0;
 477 }
 478
 479 static int
 480 virgl_get_compute_param(struct pipe_screen *screen,
 481                         enum pipe_shader_ir ir_type,
 482                         enum pipe_compute_cap param,
 483                         void *ret)
 484 {
 485    struct virgl_screen *vscreen = virgl_screen(screen);
 486    if (!(vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_COMPUTE_SHADER))
 487       return 0;
 488    switch (param) {
 489    case PIPE_COMPUTE_CAP_MAX_GRID_SIZE:
 490       if (ret) {
 491          uint64_t *grid_size = ret;
 492          grid_size[0] = vscreen->caps.caps.v2.max_compute_grid_size[0];
 493          grid_size[1] = vscreen->caps.caps.v2.max_compute_grid_size[1];
 494          grid_size[2] = vscreen->caps.caps.v2.max_compute_grid_size[2];
 495       }
 496       return 3 * sizeof(uint64_t) ;
 497    case PIPE_COMPUTE_CAP_MAX_BLOCK_SIZE:
 498       if (ret) {
 499          uint64_t *block_size = ret;
 500          block_size[0] = vscreen->caps.caps.v2.max_compute_block_size[0];
 501          block_size[1] = vscreen->caps.caps.v2.max_compute_block_size[1];
 502          block_size[2] = vscreen->caps.caps.v2.max_compute_block_size[2];
 503       }
 504       return 3 * sizeof(uint64_t);
 505    case PIPE_COMPUTE_CAP_MAX_THREADS_PER_BLOCK:
 506       if (ret) {
 507          uint64_t *max_threads_per_block = ret;
 508          *max_threads_per_block = vscreen->caps.caps.v2.max_compute_work_group_invocations;
 509       }
 510       return sizeof(uint64_t);
 511    case PIPE_COMPUTE_CAP_MAX_LOCAL_SIZE:
 512       if (ret) {
 513          uint64_t *max_local_size = ret;
 514          /* Value reported by the closed source driver. */
 515          *max_local_size = vscreen->caps.caps.v2.max_compute_shared_memory_size;
 516       }
 517       return sizeof(uint64_t);
 518    default:
 519       break;
 520    }
 521    return 0;
 522 }
 523
 524 static boolean
 525 virgl_is_vertex_format_supported(struct pipe_screen *screen,
 526                                  enum pipe_format format)
 527 {
 528    struct virgl_screen *vscreen = virgl_screen(screen);
 529    const struct util_format_description *format_desc;
 530    int i;
 531
 532    format_desc = util_format_description(format);
 533    if (!format_desc)
 534       return FALSE;
 535
 536    if (format == PIPE_FORMAT_R11G11B10_FLOAT) {
 537       int vformat = VIRGL_FORMAT_R11G11B10_FLOAT;
 538       int big = vformat / 32;
 539       int small = vformat % 32;
 540       if (!(vscreen->caps.caps.v1.vertexbuffer.bitmask[big] & (1 << small)))
 541          return FALSE;
 542       return TRUE;
 543    }
 544
 545    /* Find the first non-VOID channel. */
 546    for (i = 0; i < 4; i++) {
 547       if (format_desc->channel[i].type != UTIL_FORMAT_TYPE_VOID) {
 548          break;
 549       }
 550    }
 551
 552    if (i == 4)
 553       return FALSE;
 554
 555    if (format_desc->layout != UTIL_FORMAT_LAYOUT_PLAIN)
 556       return FALSE;
 557
 558    if (format_desc->channel[i].type == UTIL_FORMAT_TYPE_FIXED)
 559       return FALSE;
 560    return TRUE;
 561 }
 562
 563 /**
 564  * Query format support for creating a texture, drawing surface, etc.
 565  * \param format  the format to test
 566  * \param type  one of PIPE_TEXTURE, PIPE_SURFACE
 567  */
 568 static boolean
 569 virgl_is_format_supported( struct pipe_screen *screen,
 570                                  enum pipe_format format,
 571                                  enum pipe_texture_target target,
 572                                  unsigned sample_count,
 573                                  unsigned storage_sample_count,
 574                                  unsigned bind)
 575 {
 576    struct virgl_screen *vscreen = virgl_screen(screen);
 577    const struct util_format_description *format_desc;
 578    int i;
 579
 580    if (MAX2(1, sample_count) != MAX2(1, storage_sample_count))
 581       return false;
 582
 583    assert(target == PIPE_BUFFER ||
 584           target == PIPE_TEXTURE_1D ||
 585           target == PIPE_TEXTURE_1D_ARRAY ||
 586           target == PIPE_TEXTURE_2D ||
 587           target == PIPE_TEXTURE_2D_ARRAY ||
 588           target == PIPE_TEXTURE_RECT ||
 589           target == PIPE_TEXTURE_3D ||
 590           target == PIPE_TEXTURE_CUBE ||
 591           target == PIPE_TEXTURE_CUBE_ARRAY);
 592
 593    format_desc = util_format_description(format);
 594    if (!format_desc)
 595       return FALSE;
 596
 597    if (util_format_is_intensity(format))
 598       return FALSE;
 599
 600    if (sample_count > 1) {
 601       if (!vscreen->caps.caps.v1.bset.texture_multisample)
 602          return FALSE;
 603
 604       if (bind & PIPE_BIND_SHADER_IMAGE) {
 605          if (sample_count > vscreen->caps.caps.v2.max_image_samples)
 606             return FALSE;
 607       }
 608
 609       if (sample_count > vscreen->caps.caps.v1.max_samples)
 610          return FALSE;
 611    }
 612
 613    if (bind & PIPE_BIND_VERTEX_BUFFER) {
 614       return virgl_is_vertex_format_supported(screen, format);
 615    }
 616
 617    /* Allow 3-comp 32 bit textures only for TBOs (needed for ARB_tbo_rgb32) */
 618    if ((format == PIPE_FORMAT_R32G32B32_FLOAT ||
 619        format == PIPE_FORMAT_R32G32B32_SINT ||
 620        format == PIPE_FORMAT_R32G32B32_UINT) &&
 621        target != PIPE_BUFFER)
 622       return FALSE;
 623
 624    if (bind & PIPE_BIND_RENDER_TARGET) {
 625       /* For ARB_framebuffer_no_attachments. */
 626       if (format == PIPE_FORMAT_NONE)
 627          return TRUE;
 628
 629       if (format_desc->colorspace == UTIL_FORMAT_COLORSPACE_ZS)
 630          return FALSE;
 631
 632       /*
 633        * Although possible, it is unnatural to render into compressed or YUV
 634        * surfaces. So disable these here to avoid going into weird paths
 635        * inside the state trackers.
 636        */
 637       if (format_desc->block.width != 1 ||
 638           format_desc->block.height != 1)
 639          return FALSE;
 640
 641       {
 642          int big = format / 32;
 643          int small = format % 32;
 644          if (!(vscreen->caps.caps.v1.render.bitmask[big] & (1 << small)))
 645             return FALSE;
 646       }
 647    }
 648
 649    if (bind & PIPE_BIND_DEPTH_STENCIL) {
 650       if (format_desc->colorspace != UTIL_FORMAT_COLORSPACE_ZS)
 651          return FALSE;
 652    }
 653
 654    /*
 655     * All other operations (sampling, transfer, etc).
 656     */
 657
 658    if (format_desc->layout == UTIL_FORMAT_LAYOUT_S3TC) {
 659       goto out_lookup;
 660    }
 661    if (format_desc->layout == UTIL_FORMAT_LAYOUT_RGTC) {
 662       goto out_lookup;
 663    }
 664    if (format_desc->layout == UTIL_FORMAT_LAYOUT_BPTC) {
 665       goto out_lookup;
 666    }
 667
 668    if (format == PIPE_FORMAT_R11G11B10_FLOAT) {
 669       goto out_lookup;
 670    } else if (format == PIPE_FORMAT_R9G9B9E5_FLOAT) {
 671       goto out_lookup;
 672    }
 673
 674    /* Find the first non-VOID channel. */
 675    for (i = 0; i < 4; i++) {
 676       if (format_desc->channel[i].type != UTIL_FORMAT_TYPE_VOID) {
 677          break;
 678       }
 679    }
 680
 681    if (i == 4)
 682       return FALSE;
 683
 684    /* no L4A4 */
 685    if (format_desc->nr_channels < 4 && format_desc->channel[i].size == 4)
 686       return FALSE;
 687
 688  out_lookup:
 689    {
 690       int big = format / 32;
 691       int small = format % 32;
 692       if (!(vscreen->caps.caps.v1.sampler.bitmask[big] & (1 << small)))
 693          return FALSE;
 694    }
 695    /*
 696     * Everything else should be supported by u_format.
 697     */
 698    return TRUE;
 699 }
 700
 701 static void virgl_flush_frontbuffer(struct pipe_screen *screen,
 702                                       struct pipe_resource *res,
 703                                       unsigned level, unsigned layer,
 704                                     void *winsys_drawable_handle, struct pipe_box *sub_box)
 705 {
 706    struct virgl_screen *vscreen = virgl_screen(screen);
 707    struct virgl_winsys *vws = vscreen->vws;
 708    struct virgl_resource *vres = virgl_resource(res);
 709
 710    if (vws->flush_frontbuffer)
 711       vws->flush_frontbuffer(vws, vres->hw_res, level, layer, winsys_drawable_handle,
 712                              sub_box);
 713 }
 714
 715 static void virgl_fence_reference(struct pipe_screen *screen,
 716                                   struct pipe_fence_handle **ptr,
 717                                   struct pipe_fence_handle *fence)
 718 {
 719    struct virgl_screen *vscreen = virgl_screen(screen);
 720    struct virgl_winsys *vws = vscreen->vws;
 721
 722    vws->fence_reference(vws, ptr, fence);
 723 }
 724
 725 static boolean virgl_fence_finish(struct pipe_screen *screen,
 726                                   struct pipe_context *ctx,
 727                                   struct pipe_fence_handle *fence,
 728                                   uint64_t timeout)
 729 {
 730    struct virgl_screen *vscreen = virgl_screen(screen);
 731    struct virgl_winsys *vws = vscreen->vws;
 732
 733    return vws->fence_wait(vws, fence, timeout);
 734 }
 735
 736 static int virgl_fence_get_fd(struct pipe_screen *screen,
 737             struct pipe_fence_handle *fence)
 738 {
 739    struct virgl_screen *vscreen = virgl_screen(screen);
 740    struct virgl_winsys *vws = vscreen->vws;
 741
 742    return vws->fence_get_fd(vws, fence);
 743 }
 744
 745 static uint64_t
 746 virgl_get_timestamp(struct pipe_screen *_screen)
 747 {
 748    return os_time_get_nano();
 749 }
 750
 751 static void
 752 virgl_destroy_screen(struct pipe_screen *screen)
 753 {
 754    struct virgl_screen *vscreen = virgl_screen(screen);
 755    struct virgl_winsys *vws = vscreen->vws;
 756
 757    slab_destroy_parent(&vscreen->transfer_pool);
 758
 759    if (vws)
 760       vws->destroy(vws);
 761    FREE(vscreen);
 762 }
 763
 764 struct pipe_screen *
 765 virgl_create_screen(struct virgl_winsys *vws)
 766 {
 767    struct virgl_screen *screen = CALLOC_STRUCT(virgl_screen);
 768
 769    if (!screen)
 770       return NULL;
 771
 772    virgl_debug = debug_get_option_virgl_debug();
 773
 774    screen->vws = vws;
 775    screen->base.get_name = virgl_get_name;
 776    screen->base.get_vendor = virgl_get_vendor;
 777    screen->base.get_param = virgl_get_param;
 778    screen->base.get_shader_param = virgl_get_shader_param;
 779    screen->base.get_compute_param = virgl_get_compute_param;
 780    screen->base.get_paramf = virgl_get_paramf;
 781    screen->base.is_format_supported = virgl_is_format_supported;
 782    screen->base.destroy = virgl_destroy_screen;
 783    screen->base.context_create = virgl_context_create;
 784    screen->base.flush_frontbuffer = virgl_flush_frontbuffer;
 785    screen->base.get_timestamp = virgl_get_timestamp;
 786    screen->base.fence_reference = virgl_fence_reference;
 787    //screen->base.fence_signalled = virgl_fence_signalled;
 788    screen->base.fence_finish = virgl_fence_finish;
 789    screen->base.fence_get_fd = virgl_fence_get_fd;
 790
 791    virgl_init_screen_resource_functions(&screen->base);
 792
 793    vws->get_caps(vws, &screen->caps);
 794
 795    screen->refcnt = 1;
 796
 797    slab_create_parent(&screen->transfer_pool, sizeof(struct virgl_transfer), 16);
 798
 799    return &screen->base;
 800 }