virgl: introduce $VIRGL_DEBUG=verbose
[mesa.git] / src / gallium / drivers / virgl / virgl_screen.c
1 /*
2 * Copyright 2014, 2015 Red Hat.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 */
23 #include "util/u_memory.h"
24 #include "util/u_format.h"
25 #include "util/u_format_s3tc.h"
26 #include "util/u_video.h"
27 #include "util/u_math.h"
28 #include "util/os_time.h"
29 #include "pipe/p_defines.h"
30 #include "pipe/p_screen.h"
31
32 #include "tgsi/tgsi_exec.h"
33
34 #include "virgl_screen.h"
35 #include "virgl_resource.h"
36 #include "virgl_public.h"
37 #include "virgl_context.h"
38
39 int virgl_debug = 0;
40 static const struct debug_named_value debug_options[] = {
41 { "verbose", VIRGL_DEBUG_VERBOSE, NULL },
42 DEBUG_NAMED_VALUE_END
43 };
44 DEBUG_GET_ONCE_FLAGS_OPTION(virgl_debug, "VIRGL_DEBUG", debug_options, 0)
45
46 static const char *
47 virgl_get_vendor(struct pipe_screen *screen)
48 {
49 return "Red Hat";
50 }
51
52
53 static const char *
54 virgl_get_name(struct pipe_screen *screen)
55 {
56 return "virgl";
57 }
58
59 static int
60 virgl_get_param(struct pipe_screen *screen, enum pipe_cap param)
61 {
62 struct virgl_screen *vscreen = virgl_screen(screen);
63 switch (param) {
64 case PIPE_CAP_NPOT_TEXTURES:
65 return 1;
66 case PIPE_CAP_SM3:
67 return 1;
68 case PIPE_CAP_ANISOTROPIC_FILTER:
69 return 1;
70 case PIPE_CAP_POINT_SPRITE:
71 return 1;
72 case PIPE_CAP_MAX_RENDER_TARGETS:
73 return vscreen->caps.caps.v1.max_render_targets;
74 case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
75 return vscreen->caps.caps.v1.max_dual_source_render_targets;
76 case PIPE_CAP_OCCLUSION_QUERY:
77 return vscreen->caps.caps.v1.bset.occlusion_query;
78 case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
79 case PIPE_CAP_TEXTURE_MIRROR_CLAMP_TO_EDGE:
80 return vscreen->caps.caps.v1.bset.mirror_clamp;
81 case PIPE_CAP_TEXTURE_SWIZZLE:
82 return 1;
83 case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
84 if (vscreen->caps.caps.v2.max_texture_2d_size)
85 return 1 + util_logbase2(vscreen->caps.caps.v2.max_texture_2d_size);
86 return 15; /* 16K x 16K */
87 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
88 if (vscreen->caps.caps.v2.max_texture_3d_size)
89 return 1 + util_logbase2(vscreen->caps.caps.v2.max_texture_3d_size);
90 return 9; /* 256 x 256 x 256 */
91 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
92 if (vscreen->caps.caps.v2.max_texture_cube_size)
93 return 1 + util_logbase2(vscreen->caps.caps.v2.max_texture_cube_size);
94 return 13; /* 4K x 4K */
95 case PIPE_CAP_BLEND_EQUATION_SEPARATE:
96 return 1;
97 case PIPE_CAP_INDEP_BLEND_ENABLE:
98 return vscreen->caps.caps.v1.bset.indep_blend_enable;
99 case PIPE_CAP_INDEP_BLEND_FUNC:
100 return vscreen->caps.caps.v1.bset.indep_blend_func;
101 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
102 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
103 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
104 return 1;
105 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
106 return vscreen->caps.caps.v1.bset.fragment_coord_conventions;
107 case PIPE_CAP_DEPTH_CLIP_DISABLE:
108 return vscreen->caps.caps.v1.bset.depth_clip_disable;
109 case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
110 return vscreen->caps.caps.v1.max_streamout_buffers;
111 case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
112 case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
113 return 16*4;
114 case PIPE_CAP_PRIMITIVE_RESTART:
115 return vscreen->caps.caps.v1.bset.primitive_restart;
116 case PIPE_CAP_SHADER_STENCIL_EXPORT:
117 return vscreen->caps.caps.v1.bset.shader_stencil_export;
118 case PIPE_CAP_TGSI_INSTANCEID:
119 case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
120 return 1;
121 case PIPE_CAP_SEAMLESS_CUBE_MAP:
122 return vscreen->caps.caps.v1.bset.seamless_cube_map;
123 case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
124 return vscreen->caps.caps.v1.bset.seamless_cube_map_per_texture;
125 case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
126 return vscreen->caps.caps.v1.max_texture_array_layers;
127 case PIPE_CAP_MIN_TEXEL_OFFSET:
128 return vscreen->caps.caps.v2.min_texel_offset;
129 case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
130 return vscreen->caps.caps.v2.min_texture_gather_offset;
131 case PIPE_CAP_MAX_TEXEL_OFFSET:
132 return vscreen->caps.caps.v2.max_texel_offset;
133 case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
134 return vscreen->caps.caps.v2.max_texture_gather_offset;
135 case PIPE_CAP_CONDITIONAL_RENDER:
136 return vscreen->caps.caps.v1.bset.conditional_render;
137 case PIPE_CAP_TEXTURE_BARRIER:
138 return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_TEXTURE_BARRIER;
139 case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
140 return 1;
141 case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
142 case PIPE_CAP_VERTEX_COLOR_CLAMPED:
143 return vscreen->caps.caps.v1.bset.color_clamping;
144 case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
145 return 1;
146 case PIPE_CAP_GLSL_FEATURE_LEVEL:
147 return vscreen->caps.caps.v1.glsl_level;
148 case PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY:
149 return MIN2(vscreen->caps.caps.v1.glsl_level, 140);
150 case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
151 return 0;
152 case PIPE_CAP_COMPUTE:
153 return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_COMPUTE_SHADER;
154 case PIPE_CAP_USER_VERTEX_BUFFERS:
155 return 0;
156 case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
157 return vscreen->caps.caps.v2.uniform_buffer_offset_alignment;
158 case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
159 case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS:
160 return vscreen->caps.caps.v1.bset.streamout_pause_resume;
161 case PIPE_CAP_START_INSTANCE:
162 return vscreen->caps.caps.v1.bset.start_instance;
163 case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
164 case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
165 case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
166 case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
167 case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
168 return 0;
169 case PIPE_CAP_QUERY_TIMESTAMP:
170 return 1;
171 case PIPE_CAP_QUERY_TIME_ELAPSED:
172 return 0;
173 case PIPE_CAP_TGSI_TEXCOORD:
174 return 0;
175 case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
176 return VIRGL_MAP_BUFFER_ALIGNMENT;
177 case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
178 return vscreen->caps.caps.v1.max_tbo_size > 0;
179 case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
180 return vscreen->caps.caps.v2.texture_buffer_offset_alignment;
181 case PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY:
182 return 0;
183 case PIPE_CAP_CUBE_MAP_ARRAY:
184 return vscreen->caps.caps.v1.bset.cube_map_array;
185 case PIPE_CAP_TEXTURE_MULTISAMPLE:
186 return vscreen->caps.caps.v1.bset.texture_multisample;
187 case PIPE_CAP_MAX_VIEWPORTS:
188 return vscreen->caps.caps.v1.max_viewports;
189 case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
190 return vscreen->caps.caps.v1.max_tbo_size;
191 case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
192 case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
193 case PIPE_CAP_ENDIANNESS:
194 return 0;
195 case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
196 case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
197 return 1;
198 case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
199 return 0;
200 case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
201 return vscreen->caps.caps.v2.max_geom_output_vertices;
202 case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
203 return vscreen->caps.caps.v2.max_geom_total_output_components;
204 case PIPE_CAP_TEXTURE_QUERY_LOD:
205 return vscreen->caps.caps.v1.bset.texture_query_lod;
206 case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
207 return vscreen->caps.caps.v1.max_texture_gather_components;
208 case PIPE_CAP_DRAW_INDIRECT:
209 return vscreen->caps.caps.v1.bset.has_indirect_draw;
210 case PIPE_CAP_SAMPLE_SHADING:
211 case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
212 return vscreen->caps.caps.v1.bset.has_sample_shading;
213 case PIPE_CAP_CULL_DISTANCE:
214 return vscreen->caps.caps.v1.bset.has_cull;
215 case PIPE_CAP_MAX_VERTEX_STREAMS:
216 return vscreen->caps.caps.v1.glsl_level >= 400 ? 4 : 1;
217 case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
218 return vscreen->caps.caps.v1.bset.conditional_render_inverted;
219 case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
220 return vscreen->caps.caps.v1.bset.derivative_control;
221 case PIPE_CAP_POLYGON_OFFSET_CLAMP:
222 return vscreen->caps.caps.v1.bset.polygon_offset_clamp;
223 case PIPE_CAP_QUERY_SO_OVERFLOW:
224 return vscreen->caps.caps.v1.bset.transform_feedback_overflow_query;
225 case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
226 return vscreen->caps.caps.v2.shader_buffer_offset_alignment;
227 case PIPE_CAP_DOUBLES:
228 return vscreen->caps.caps.v1.bset.has_fp64;
229 case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
230 return vscreen->caps.caps.v2.max_shader_patch_varyings;
231 case PIPE_CAP_SAMPLER_VIEW_TARGET:
232 return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_TEXTURE_VIEW;
233 case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
234 return vscreen->caps.caps.v2.max_vertex_attrib_stride;
235 case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
236 return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_COPY_IMAGE;
237 case PIPE_CAP_TGSI_TXQS:
238 return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_TXQS;
239 case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT:
240 return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_FB_NO_ATTACH;
241 case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR:
242 return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_ROBUST_BUFFER_ACCESS;
243 case PIPE_CAP_TGSI_FS_FBFETCH:
244 return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_TGSI_FBFETCH;
245 case PIPE_CAP_TGSI_CLOCK:
246 return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_SHADER_CLOCK;
247 case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
248 return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_TGSI_COMPONENTS;
249 case PIPE_CAP_TEXTURE_GATHER_SM5:
250 case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
251 case PIPE_CAP_FAKE_SW_MSAA:
252 case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
253 case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
254 case PIPE_CAP_MULTI_DRAW_INDIRECT:
255 case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS:
256 case PIPE_CAP_CLIP_HALFZ:
257 case PIPE_CAP_VERTEXID_NOBASE:
258 case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
259 case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
260 case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
261 case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
262 case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
263 case PIPE_CAP_DEPTH_BOUNDS_TEST:
264 case PIPE_CAP_SHAREABLE_SHADERS:
265 case PIPE_CAP_CLEAR_TEXTURE:
266 case PIPE_CAP_DRAW_PARAMETERS:
267 case PIPE_CAP_TGSI_PACK_HALF_FLOAT:
268 case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
269 case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
270 case PIPE_CAP_INVALIDATE_BUFFER:
271 case PIPE_CAP_GENERATE_MIPMAP:
272 case PIPE_CAP_SURFACE_REINTERPRET_BLOCKS:
273 case PIPE_CAP_QUERY_BUFFER_OBJECT:
274 case PIPE_CAP_STRING_MARKER:
275 case PIPE_CAP_QUERY_MEMORY_INFO:
276 case PIPE_CAP_PCI_GROUP:
277 case PIPE_CAP_PCI_BUS:
278 case PIPE_CAP_PCI_DEVICE:
279 case PIPE_CAP_PCI_FUNCTION:
280 case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES:
281 case PIPE_CAP_TGSI_VOTE:
282 case PIPE_CAP_MAX_WINDOW_RECTANGLES:
283 case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED:
284 case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS:
285 case PIPE_CAP_TGSI_CAN_READ_OUTPUTS:
286 case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
287 case PIPE_CAP_TGSI_MUL_ZERO_WINS:
288 case PIPE_CAP_INT64:
289 case PIPE_CAP_INT64_DIVMOD:
290 case PIPE_CAP_TGSI_TEX_TXF_LZ:
291 case PIPE_CAP_POLYGON_MODE_FILL_RECTANGLE:
292 case PIPE_CAP_SPARSE_BUFFER_PAGE_SIZE:
293 case PIPE_CAP_TGSI_BALLOT:
294 case PIPE_CAP_TGSI_TES_LAYER_VIEWPORT:
295 case PIPE_CAP_CAN_BIND_CONST_BUFFER_AS_VERTEX:
296 case PIPE_CAP_ALLOW_MAPPED_BUFFERS_DURING_EXECUTION:
297 case PIPE_CAP_POST_DEPTH_COVERAGE:
298 case PIPE_CAP_BINDLESS_TEXTURE:
299 case PIPE_CAP_NIR_SAMPLERS_AS_DEREF:
300 case PIPE_CAP_MEMOBJ:
301 case PIPE_CAP_LOAD_CONSTBUF:
302 case PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS:
303 case PIPE_CAP_TILE_RASTER_ORDER:
304 case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
305 case PIPE_CAP_FRAMEBUFFER_MSAA_CONSTRAINTS:
306 case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
307 case PIPE_CAP_CONTEXT_PRIORITY_MASK:
308 case PIPE_CAP_FENCE_SIGNAL:
309 case PIPE_CAP_CONSTBUF0_FLAGS:
310 case PIPE_CAP_PACKED_UNIFORMS:
311 case PIPE_CAP_CONSERVATIVE_RASTER_POST_SNAP_TRIANGLES:
312 case PIPE_CAP_CONSERVATIVE_RASTER_POST_SNAP_POINTS_LINES:
313 case PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_TRIANGLES:
314 case PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_POINTS_LINES:
315 case PIPE_CAP_CONSERVATIVE_RASTER_POST_DEPTH_COVERAGE:
316 case PIPE_CAP_MAX_CONSERVATIVE_RASTER_SUBPIXEL_PRECISION_BIAS:
317 case PIPE_CAP_PROGRAMMABLE_SAMPLE_LOCATIONS:
318 return 0;
319 case PIPE_CAP_MAX_GS_INVOCATIONS:
320 return 32;
321 case PIPE_CAP_MAX_SHADER_BUFFER_SIZE:
322 return 1 << 27;
323 case PIPE_CAP_VENDOR_ID:
324 return 0x1af4;
325 case PIPE_CAP_DEVICE_ID:
326 return 0x1010;
327 case PIPE_CAP_ACCELERATED:
328 return 1;
329 case PIPE_CAP_UMA:
330 case PIPE_CAP_VIDEO_MEMORY:
331 return 0;
332 case PIPE_CAP_NATIVE_FENCE_FD:
333 return 0;
334 }
335 /* should only get here on unhandled cases */
336 debug_printf("Unexpected PIPE_CAP %d query\n", param);
337 return 0;
338 }
339
340 static int
341 virgl_get_shader_param(struct pipe_screen *screen,
342 enum pipe_shader_type shader,
343 enum pipe_shader_cap param)
344 {
345 struct virgl_screen *vscreen = virgl_screen(screen);
346
347 if ((shader == PIPE_SHADER_TESS_CTRL || shader == PIPE_SHADER_TESS_EVAL) &&
348 !vscreen->caps.caps.v1.bset.has_tessellation_shaders)
349 return 0;
350
351 if (shader == PIPE_SHADER_COMPUTE &&
352 !(vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_COMPUTE_SHADER))
353 return 0;
354
355 switch(shader)
356 {
357 case PIPE_SHADER_FRAGMENT:
358 case PIPE_SHADER_VERTEX:
359 case PIPE_SHADER_GEOMETRY:
360 case PIPE_SHADER_TESS_CTRL:
361 case PIPE_SHADER_TESS_EVAL:
362 case PIPE_SHADER_COMPUTE:
363 switch (param) {
364 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
365 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
366 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
367 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
368 return INT_MAX;
369 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
370 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
371 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
372 return 1;
373 case PIPE_SHADER_CAP_MAX_INPUTS:
374 if (vscreen->caps.caps.v1.glsl_level < 150)
375 return vscreen->caps.caps.v2.max_vertex_attribs;
376 return (shader == PIPE_SHADER_VERTEX ||
377 shader == PIPE_SHADER_GEOMETRY) ? vscreen->caps.caps.v2.max_vertex_attribs : 32;
378 case PIPE_SHADER_CAP_MAX_OUTPUTS:
379 if (shader == PIPE_SHADER_FRAGMENT)
380 return vscreen->caps.caps.v1.max_render_targets;
381 return vscreen->caps.caps.v2.max_vertex_outputs;
382 // case PIPE_SHADER_CAP_MAX_CONSTS:
383 // return 4096;
384 case PIPE_SHADER_CAP_MAX_TEMPS:
385 return 256;
386 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
387 return vscreen->caps.caps.v1.max_uniform_blocks;
388 // case PIPE_SHADER_CAP_MAX_ADDRS:
389 // return 1;
390 case PIPE_SHADER_CAP_SUBROUTINES:
391 return 1;
392 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
393 return 16;
394 case PIPE_SHADER_CAP_INTEGERS:
395 return vscreen->caps.caps.v1.glsl_level >= 130;
396 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
397 return 32;
398 case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
399 return 4096 * sizeof(float[4]);
400 case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
401 if (shader == PIPE_SHADER_FRAGMENT || shader == PIPE_SHADER_COMPUTE)
402 return vscreen->caps.caps.v2.max_shader_buffer_frag_compute;
403 else
404 return vscreen->caps.caps.v2.max_shader_buffer_other_stages;
405 case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
406 if (shader == PIPE_SHADER_FRAGMENT || shader == PIPE_SHADER_COMPUTE)
407 return vscreen->caps.caps.v2.max_shader_image_frag_compute;
408 else
409 return vscreen->caps.caps.v2.max_shader_image_other_stages;
410 case PIPE_SHADER_CAP_SUPPORTED_IRS:
411 return (1 << PIPE_SHADER_IR_TGSI);
412 case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
413 case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
414 case PIPE_SHADER_CAP_INT64_ATOMICS:
415 case PIPE_SHADER_CAP_FP16:
416 case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
417 case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
418 return 0;
419 case PIPE_SHADER_CAP_SCALAR_ISA:
420 return 1;
421 default:
422 return 0;
423 }
424 default:
425 return 0;
426 }
427 }
428
429 static float
430 virgl_get_paramf(struct pipe_screen *screen, enum pipe_capf param)
431 {
432 struct virgl_screen *vscreen = virgl_screen(screen);
433 switch (param) {
434 case PIPE_CAPF_MAX_LINE_WIDTH:
435 return vscreen->caps.caps.v2.max_aliased_line_width;
436 case PIPE_CAPF_MAX_LINE_WIDTH_AA:
437 return vscreen->caps.caps.v2.max_smooth_line_width;
438 case PIPE_CAPF_MAX_POINT_WIDTH:
439 return vscreen->caps.caps.v2.max_aliased_point_size;
440 case PIPE_CAPF_MAX_POINT_WIDTH_AA:
441 return vscreen->caps.caps.v2.max_smooth_point_size;
442 case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
443 return 16.0;
444 case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
445 return vscreen->caps.caps.v2.max_texture_lod_bias;
446 case PIPE_CAPF_MIN_CONSERVATIVE_RASTER_DILATE:
447 case PIPE_CAPF_MAX_CONSERVATIVE_RASTER_DILATE:
448 case PIPE_CAPF_CONSERVATIVE_RASTER_DILATE_GRANULARITY:
449 return 0.0f;
450 }
451 /* should only get here on unhandled cases */
452 debug_printf("Unexpected PIPE_CAPF %d query\n", param);
453 return 0.0;
454 }
455
456 static int
457 virgl_get_compute_param(struct pipe_screen *screen,
458 enum pipe_shader_ir ir_type,
459 enum pipe_compute_cap param,
460 void *ret)
461 {
462 struct virgl_screen *vscreen = virgl_screen(screen);
463 if (!(vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_COMPUTE_SHADER))
464 return 0;
465 switch (param) {
466 case PIPE_COMPUTE_CAP_MAX_GRID_SIZE:
467 if (ret) {
468 uint64_t *grid_size = ret;
469 grid_size[0] = vscreen->caps.caps.v2.max_compute_grid_size[0];
470 grid_size[1] = vscreen->caps.caps.v2.max_compute_grid_size[1];
471 grid_size[2] = vscreen->caps.caps.v2.max_compute_grid_size[2];
472 }
473 return 3 * sizeof(uint64_t) ;
474 case PIPE_COMPUTE_CAP_MAX_BLOCK_SIZE:
475 if (ret) {
476 uint64_t *block_size = ret;
477 block_size[0] = vscreen->caps.caps.v2.max_compute_block_size[0];
478 block_size[1] = vscreen->caps.caps.v2.max_compute_block_size[1];
479 block_size[2] = vscreen->caps.caps.v2.max_compute_block_size[2];
480 }
481 return 3 * sizeof(uint64_t);
482 case PIPE_COMPUTE_CAP_MAX_THREADS_PER_BLOCK:
483 if (ret) {
484 uint64_t *max_threads_per_block = ret;
485 *max_threads_per_block = vscreen->caps.caps.v2.max_compute_work_group_invocations;
486 }
487 return sizeof(uint64_t);
488 case PIPE_COMPUTE_CAP_MAX_LOCAL_SIZE:
489 if (ret) {
490 uint64_t *max_local_size = ret;
491 /* Value reported by the closed source driver. */
492 *max_local_size = vscreen->caps.caps.v2.max_compute_shared_memory_size;
493 }
494 return sizeof(uint64_t);
495 default:
496 break;
497 }
498 return 0;
499 }
500
501 static boolean
502 virgl_is_vertex_format_supported(struct pipe_screen *screen,
503 enum pipe_format format)
504 {
505 struct virgl_screen *vscreen = virgl_screen(screen);
506 const struct util_format_description *format_desc;
507 int i;
508
509 format_desc = util_format_description(format);
510 if (!format_desc)
511 return FALSE;
512
513 if (format == PIPE_FORMAT_R11G11B10_FLOAT) {
514 int vformat = VIRGL_FORMAT_R11G11B10_FLOAT;
515 int big = vformat / 32;
516 int small = vformat % 32;
517 if (!(vscreen->caps.caps.v1.vertexbuffer.bitmask[big] & (1 << small)))
518 return FALSE;
519 return TRUE;
520 }
521
522 /* Find the first non-VOID channel. */
523 for (i = 0; i < 4; i++) {
524 if (format_desc->channel[i].type != UTIL_FORMAT_TYPE_VOID) {
525 break;
526 }
527 }
528
529 if (i == 4)
530 return FALSE;
531
532 if (format_desc->layout != UTIL_FORMAT_LAYOUT_PLAIN)
533 return FALSE;
534
535 if (format_desc->channel[i].type == UTIL_FORMAT_TYPE_FIXED)
536 return FALSE;
537 return TRUE;
538 }
539
540 /**
541 * Query format support for creating a texture, drawing surface, etc.
542 * \param format the format to test
543 * \param type one of PIPE_TEXTURE, PIPE_SURFACE
544 */
545 static boolean
546 virgl_is_format_supported( struct pipe_screen *screen,
547 enum pipe_format format,
548 enum pipe_texture_target target,
549 unsigned sample_count,
550 unsigned storage_sample_count,
551 unsigned bind)
552 {
553 struct virgl_screen *vscreen = virgl_screen(screen);
554 const struct util_format_description *format_desc;
555 int i;
556
557 if (MAX2(1, sample_count) != MAX2(1, storage_sample_count))
558 return false;
559
560 assert(target == PIPE_BUFFER ||
561 target == PIPE_TEXTURE_1D ||
562 target == PIPE_TEXTURE_1D_ARRAY ||
563 target == PIPE_TEXTURE_2D ||
564 target == PIPE_TEXTURE_2D_ARRAY ||
565 target == PIPE_TEXTURE_RECT ||
566 target == PIPE_TEXTURE_3D ||
567 target == PIPE_TEXTURE_CUBE ||
568 target == PIPE_TEXTURE_CUBE_ARRAY);
569
570 format_desc = util_format_description(format);
571 if (!format_desc)
572 return FALSE;
573
574 if (util_format_is_intensity(format))
575 return FALSE;
576
577 if (sample_count > 1) {
578 if (!vscreen->caps.caps.v1.bset.texture_multisample)
579 return FALSE;
580
581 if (bind & PIPE_BIND_SHADER_IMAGE) {
582 if (sample_count > vscreen->caps.caps.v2.max_image_samples)
583 return FALSE;
584 }
585
586 if (sample_count > vscreen->caps.caps.v1.max_samples)
587 return FALSE;
588 }
589
590 if (bind & PIPE_BIND_VERTEX_BUFFER) {
591 return virgl_is_vertex_format_supported(screen, format);
592 }
593
594 /* Allow 3-comp 32 bit textures only for TBOs (needed for ARB_tbo_rgb32) */
595 if ((format == PIPE_FORMAT_R32G32B32_FLOAT ||
596 format == PIPE_FORMAT_R32G32B32_SINT ||
597 format == PIPE_FORMAT_R32G32B32_UINT) &&
598 target != PIPE_BUFFER)
599 return FALSE;
600
601 if (bind & PIPE_BIND_RENDER_TARGET) {
602 /* For ARB_framebuffer_no_attachments. */
603 if (format == PIPE_FORMAT_NONE)
604 return TRUE;
605
606 if (format_desc->colorspace == UTIL_FORMAT_COLORSPACE_ZS)
607 return FALSE;
608
609 /*
610 * Although possible, it is unnatural to render into compressed or YUV
611 * surfaces. So disable these here to avoid going into weird paths
612 * inside the state trackers.
613 */
614 if (format_desc->block.width != 1 ||
615 format_desc->block.height != 1)
616 return FALSE;
617
618 {
619 int big = format / 32;
620 int small = format % 32;
621 if (!(vscreen->caps.caps.v1.render.bitmask[big] & (1 << small)))
622 return FALSE;
623 }
624 }
625
626 if (bind & PIPE_BIND_DEPTH_STENCIL) {
627 if (format_desc->colorspace != UTIL_FORMAT_COLORSPACE_ZS)
628 return FALSE;
629 }
630
631 /*
632 * All other operations (sampling, transfer, etc).
633 */
634
635 if (format_desc->layout == UTIL_FORMAT_LAYOUT_S3TC) {
636 goto out_lookup;
637 }
638 if (format_desc->layout == UTIL_FORMAT_LAYOUT_RGTC) {
639 goto out_lookup;
640 }
641 if (format_desc->layout == UTIL_FORMAT_LAYOUT_BPTC) {
642 goto out_lookup;
643 }
644
645 if (format == PIPE_FORMAT_R11G11B10_FLOAT) {
646 goto out_lookup;
647 } else if (format == PIPE_FORMAT_R9G9B9E5_FLOAT) {
648 goto out_lookup;
649 }
650
651 /* Find the first non-VOID channel. */
652 for (i = 0; i < 4; i++) {
653 if (format_desc->channel[i].type != UTIL_FORMAT_TYPE_VOID) {
654 break;
655 }
656 }
657
658 if (i == 4)
659 return FALSE;
660
661 /* no L4A4 */
662 if (format_desc->nr_channels < 4 && format_desc->channel[i].size == 4)
663 return FALSE;
664
665 out_lookup:
666 {
667 int big = format / 32;
668 int small = format % 32;
669 if (!(vscreen->caps.caps.v1.sampler.bitmask[big] & (1 << small)))
670 return FALSE;
671 }
672 /*
673 * Everything else should be supported by u_format.
674 */
675 return TRUE;
676 }
677
678 static void virgl_flush_frontbuffer(struct pipe_screen *screen,
679 struct pipe_resource *res,
680 unsigned level, unsigned layer,
681 void *winsys_drawable_handle, struct pipe_box *sub_box)
682 {
683 struct virgl_screen *vscreen = virgl_screen(screen);
684 struct virgl_winsys *vws = vscreen->vws;
685 struct virgl_resource *vres = virgl_resource(res);
686
687 if (vws->flush_frontbuffer)
688 vws->flush_frontbuffer(vws, vres->hw_res, level, layer, winsys_drawable_handle,
689 sub_box);
690 }
691
692 static void virgl_fence_reference(struct pipe_screen *screen,
693 struct pipe_fence_handle **ptr,
694 struct pipe_fence_handle *fence)
695 {
696 struct virgl_screen *vscreen = virgl_screen(screen);
697 struct virgl_winsys *vws = vscreen->vws;
698
699 vws->fence_reference(vws, ptr, fence);
700 }
701
702 static boolean virgl_fence_finish(struct pipe_screen *screen,
703 struct pipe_context *ctx,
704 struct pipe_fence_handle *fence,
705 uint64_t timeout)
706 {
707 struct virgl_screen *vscreen = virgl_screen(screen);
708 struct virgl_winsys *vws = vscreen->vws;
709
710 return vws->fence_wait(vws, fence, timeout);
711 }
712
713 static uint64_t
714 virgl_get_timestamp(struct pipe_screen *_screen)
715 {
716 return os_time_get_nano();
717 }
718
719 static void
720 virgl_destroy_screen(struct pipe_screen *screen)
721 {
722 struct virgl_screen *vscreen = virgl_screen(screen);
723 struct virgl_winsys *vws = vscreen->vws;
724
725 slab_destroy_parent(&vscreen->texture_transfer_pool);
726
727 if (vws)
728 vws->destroy(vws);
729 FREE(vscreen);
730 }
731
732 struct pipe_screen *
733 virgl_create_screen(struct virgl_winsys *vws)
734 {
735 struct virgl_screen *screen = CALLOC_STRUCT(virgl_screen);
736
737 if (!screen)
738 return NULL;
739
740 virgl_debug = debug_get_option_virgl_debug();
741
742 screen->vws = vws;
743 screen->base.get_name = virgl_get_name;
744 screen->base.get_vendor = virgl_get_vendor;
745 screen->base.get_param = virgl_get_param;
746 screen->base.get_shader_param = virgl_get_shader_param;
747 screen->base.get_compute_param = virgl_get_compute_param;
748 screen->base.get_paramf = virgl_get_paramf;
749 screen->base.is_format_supported = virgl_is_format_supported;
750 screen->base.destroy = virgl_destroy_screen;
751 screen->base.context_create = virgl_context_create;
752 screen->base.flush_frontbuffer = virgl_flush_frontbuffer;
753 screen->base.get_timestamp = virgl_get_timestamp;
754 screen->base.fence_reference = virgl_fence_reference;
755 //screen->base.fence_signalled = virgl_fence_signalled;
756 screen->base.fence_finish = virgl_fence_finish;
757
758 virgl_init_screen_resource_functions(&screen->base);
759
760 vws->get_caps(vws, &screen->caps);
761
762 screen->refcnt = 1;
763
764 slab_create_parent(&screen->texture_transfer_pool, sizeof(struct virgl_transfer), 16);
765
766 return &screen->base;
767 }