gallium: remove PIPE_CAP_USER_CONSTANT_BUFFERS
[mesa.git] / src / gallium / drivers / virgl / virgl_screen.c
1 /*
2 * Copyright 2014, 2015 Red Hat.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 */
23 #include "util/u_memory.h"
24 #include "util/u_format.h"
25 #include "util/u_format_s3tc.h"
26 #include "util/u_video.h"
27 #include "util/os_time.h"
28 #include "pipe/p_defines.h"
29 #include "pipe/p_screen.h"
30
31 #include "tgsi/tgsi_exec.h"
32
33 #include "virgl_screen.h"
34 #include "virgl_resource.h"
35 #include "virgl_public.h"
36 #include "virgl_context.h"
37
38 #define SP_MAX_TEXTURE_2D_LEVELS 15 /* 16K x 16K */
39 #define SP_MAX_TEXTURE_3D_LEVELS 9 /* 512 x 512 x 512 */
40 #define SP_MAX_TEXTURE_CUBE_LEVELS 13 /* 4K x 4K */
41
42 static const char *
43 virgl_get_vendor(struct pipe_screen *screen)
44 {
45 return "Red Hat";
46 }
47
48
49 static const char *
50 virgl_get_name(struct pipe_screen *screen)
51 {
52 return "virgl";
53 }
54
55 static int
56 virgl_get_param(struct pipe_screen *screen, enum pipe_cap param)
57 {
58 struct virgl_screen *vscreen = virgl_screen(screen);
59 switch (param) {
60 case PIPE_CAP_NPOT_TEXTURES:
61 return 1;
62 case PIPE_CAP_SM3:
63 return 1;
64 case PIPE_CAP_ANISOTROPIC_FILTER:
65 return 1;
66 case PIPE_CAP_POINT_SPRITE:
67 return 1;
68 case PIPE_CAP_MAX_RENDER_TARGETS:
69 return vscreen->caps.caps.v1.max_render_targets;
70 case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
71 return vscreen->caps.caps.v1.max_dual_source_render_targets;
72 case PIPE_CAP_OCCLUSION_QUERY:
73 return vscreen->caps.caps.v1.bset.occlusion_query;
74 case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
75 return vscreen->caps.caps.v1.bset.mirror_clamp;
76 case PIPE_CAP_TEXTURE_SWIZZLE:
77 return 1;
78 case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
79 return SP_MAX_TEXTURE_2D_LEVELS;
80 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
81 return SP_MAX_TEXTURE_3D_LEVELS;
82 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
83 return SP_MAX_TEXTURE_CUBE_LEVELS;
84 case PIPE_CAP_BLEND_EQUATION_SEPARATE:
85 return 1;
86 case PIPE_CAP_INDEP_BLEND_ENABLE:
87 return vscreen->caps.caps.v1.bset.indep_blend_enable;
88 case PIPE_CAP_INDEP_BLEND_FUNC:
89 return vscreen->caps.caps.v1.bset.indep_blend_func;
90 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
91 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
92 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
93 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
94 return vscreen->caps.caps.v1.bset.fragment_coord_conventions;
95 case PIPE_CAP_DEPTH_CLIP_DISABLE:
96 return vscreen->caps.caps.v1.bset.depth_clip_disable;
97 case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
98 return vscreen->caps.caps.v1.max_streamout_buffers;
99 case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
100 case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
101 return 16*4;
102 case PIPE_CAP_PRIMITIVE_RESTART:
103 return vscreen->caps.caps.v1.bset.primitive_restart;
104 case PIPE_CAP_SHADER_STENCIL_EXPORT:
105 return vscreen->caps.caps.v1.bset.shader_stencil_export;
106 case PIPE_CAP_TGSI_INSTANCEID:
107 case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
108 return 1;
109 case PIPE_CAP_SEAMLESS_CUBE_MAP:
110 return vscreen->caps.caps.v1.bset.seamless_cube_map;
111 case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
112 return vscreen->caps.caps.v1.bset.seamless_cube_map_per_texture;
113 case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
114 return vscreen->caps.caps.v1.max_texture_array_layers;
115 case PIPE_CAP_MIN_TEXEL_OFFSET:
116 case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
117 return -8;
118 case PIPE_CAP_MAX_TEXEL_OFFSET:
119 case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
120 return 7;
121 case PIPE_CAP_CONDITIONAL_RENDER:
122 return vscreen->caps.caps.v1.bset.conditional_render;
123 case PIPE_CAP_TEXTURE_BARRIER:
124 return 0;
125 case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
126 return 1;
127 case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
128 case PIPE_CAP_VERTEX_COLOR_CLAMPED:
129 return vscreen->caps.caps.v1.bset.color_clamping;
130 case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
131 return 1;
132 case PIPE_CAP_GLSL_FEATURE_LEVEL:
133 return vscreen->caps.caps.v1.glsl_level;
134 case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
135 return 0;
136 case PIPE_CAP_COMPUTE:
137 return 0;
138 case PIPE_CAP_USER_VERTEX_BUFFERS:
139 return 0;
140 case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
141 return 16;
142 case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
143 case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS:
144 return vscreen->caps.caps.v1.bset.streamout_pause_resume;
145 case PIPE_CAP_START_INSTANCE:
146 return vscreen->caps.caps.v1.bset.start_instance;
147 case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
148 case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
149 case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
150 case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
151 case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
152 return 0;
153 case PIPE_CAP_QUERY_TIMESTAMP:
154 return 1;
155 case PIPE_CAP_QUERY_TIME_ELAPSED:
156 return 0;
157 case PIPE_CAP_TGSI_TEXCOORD:
158 return 0;
159 case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
160 return VIRGL_MAP_BUFFER_ALIGNMENT;
161 case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
162 return vscreen->caps.caps.v1.max_tbo_size > 0;
163 case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
164 return 0;
165 case PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY:
166 return 0;
167 case PIPE_CAP_CUBE_MAP_ARRAY:
168 return vscreen->caps.caps.v1.bset.cube_map_array;
169 case PIPE_CAP_TEXTURE_MULTISAMPLE:
170 return vscreen->caps.caps.v1.bset.texture_multisample;
171 case PIPE_CAP_MAX_VIEWPORTS:
172 return vscreen->caps.caps.v1.max_viewports;
173 case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
174 return vscreen->caps.caps.v1.max_tbo_size;
175 case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
176 case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
177 case PIPE_CAP_ENDIANNESS:
178 return 0;
179 case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
180 case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
181 return 1;
182 case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
183 return 0;
184 case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
185 return 256;
186 case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
187 return 16384;
188 case PIPE_CAP_TEXTURE_QUERY_LOD:
189 return vscreen->caps.caps.v1.bset.texture_query_lod;
190 case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
191 return vscreen->caps.caps.v1.max_texture_gather_components;
192 case PIPE_CAP_TEXTURE_GATHER_SM5:
193 case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
194 case PIPE_CAP_SAMPLE_SHADING:
195 case PIPE_CAP_FAKE_SW_MSAA:
196 case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
197 case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
198 case PIPE_CAP_MAX_VERTEX_STREAMS:
199 case PIPE_CAP_DRAW_INDIRECT:
200 case PIPE_CAP_MULTI_DRAW_INDIRECT:
201 case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS:
202 case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
203 case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
204 case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
205 case PIPE_CAP_SAMPLER_VIEW_TARGET:
206 case PIPE_CAP_CLIP_HALFZ:
207 case PIPE_CAP_VERTEXID_NOBASE:
208 case PIPE_CAP_POLYGON_OFFSET_CLAMP:
209 case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
210 case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
211 case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
212 case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
213 case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
214 case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
215 case PIPE_CAP_DEPTH_BOUNDS_TEST:
216 case PIPE_CAP_TGSI_TXQS:
217 case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
218 case PIPE_CAP_SHAREABLE_SHADERS:
219 case PIPE_CAP_CLEAR_TEXTURE:
220 case PIPE_CAP_DRAW_PARAMETERS:
221 case PIPE_CAP_TGSI_PACK_HALF_FLOAT:
222 case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
223 case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
224 case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
225 case PIPE_CAP_INVALIDATE_BUFFER:
226 case PIPE_CAP_GENERATE_MIPMAP:
227 case PIPE_CAP_SURFACE_REINTERPRET_BLOCKS:
228 case PIPE_CAP_QUERY_BUFFER_OBJECT:
229 case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
230 case PIPE_CAP_STRING_MARKER:
231 case PIPE_CAP_QUERY_MEMORY_INFO:
232 case PIPE_CAP_PCI_GROUP:
233 case PIPE_CAP_PCI_BUS:
234 case PIPE_CAP_PCI_DEVICE:
235 case PIPE_CAP_PCI_FUNCTION:
236 case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT:
237 case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR:
238 case PIPE_CAP_CULL_DISTANCE:
239 case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES:
240 case PIPE_CAP_TGSI_VOTE:
241 case PIPE_CAP_MAX_WINDOW_RECTANGLES:
242 case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED:
243 case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS:
244 case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
245 case PIPE_CAP_TGSI_CAN_READ_OUTPUTS:
246 case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
247 case PIPE_CAP_TGSI_FS_FBFETCH:
248 case PIPE_CAP_TGSI_MUL_ZERO_WINS:
249 case PIPE_CAP_INT64:
250 case PIPE_CAP_INT64_DIVMOD:
251 case PIPE_CAP_TGSI_TEX_TXF_LZ:
252 case PIPE_CAP_TGSI_CLOCK:
253 case PIPE_CAP_POLYGON_MODE_FILL_RECTANGLE:
254 case PIPE_CAP_SPARSE_BUFFER_PAGE_SIZE:
255 case PIPE_CAP_TGSI_BALLOT:
256 case PIPE_CAP_DOUBLES:
257 case PIPE_CAP_TGSI_TES_LAYER_VIEWPORT:
258 case PIPE_CAP_CAN_BIND_CONST_BUFFER_AS_VERTEX:
259 case PIPE_CAP_ALLOW_MAPPED_BUFFERS_DURING_EXECUTION:
260 case PIPE_CAP_POST_DEPTH_COVERAGE:
261 case PIPE_CAP_BINDLESS_TEXTURE:
262 case PIPE_CAP_NIR_SAMPLERS_AS_DEREF:
263 case PIPE_CAP_QUERY_SO_OVERFLOW:
264 case PIPE_CAP_MEMOBJ:
265 case PIPE_CAP_LOAD_CONSTBUF:
266 case PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS:
267 case PIPE_CAP_TILE_RASTER_ORDER:
268 case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
269 case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
270 case PIPE_CAP_CONTEXT_PRIORITY_MASK:
271 return 0;
272 case PIPE_CAP_VENDOR_ID:
273 return 0x1af4;
274 case PIPE_CAP_DEVICE_ID:
275 return 0x1010;
276 case PIPE_CAP_ACCELERATED:
277 return 1;
278 case PIPE_CAP_UMA:
279 case PIPE_CAP_VIDEO_MEMORY:
280 return 0;
281 case PIPE_CAP_NATIVE_FENCE_FD:
282 return 0;
283 }
284 /* should only get here on unhandled cases */
285 debug_printf("Unexpected PIPE_CAP %d query\n", param);
286 return 0;
287 }
288
289 static int
290 virgl_get_shader_param(struct pipe_screen *screen,
291 enum pipe_shader_type shader,
292 enum pipe_shader_cap param)
293 {
294 struct virgl_screen *vscreen = virgl_screen(screen);
295 switch(shader)
296 {
297 case PIPE_SHADER_FRAGMENT:
298 case PIPE_SHADER_VERTEX:
299 case PIPE_SHADER_GEOMETRY:
300 switch (param) {
301 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
302 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
303 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
304 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
305 return INT_MAX;
306 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
307 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
308 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
309 return 1;
310 case PIPE_SHADER_CAP_MAX_INPUTS:
311 if (vscreen->caps.caps.v1.glsl_level < 150)
312 return 16;
313 return (shader == PIPE_SHADER_VERTEX ||
314 shader == PIPE_SHADER_GEOMETRY) ? 16 : 32;
315 case PIPE_SHADER_CAP_MAX_OUTPUTS:
316 return 32;
317 // case PIPE_SHADER_CAP_MAX_CONSTS:
318 // return 4096;
319 case PIPE_SHADER_CAP_MAX_TEMPS:
320 return 256;
321 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
322 return vscreen->caps.caps.v1.max_uniform_blocks;
323 // case PIPE_SHADER_CAP_MAX_ADDRS:
324 // return 1;
325 case PIPE_SHADER_CAP_SUBROUTINES:
326 return 1;
327 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
328 return 16;
329 case PIPE_SHADER_CAP_INTEGERS:
330 return vscreen->caps.caps.v1.glsl_level >= 130;
331 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
332 return 32;
333 case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
334 return 4096 * sizeof(float[4]);
335 case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
336 case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
337 case PIPE_SHADER_CAP_INT64_ATOMICS:
338 case PIPE_SHADER_CAP_FP16:
339 case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
340 case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
341 default:
342 return 0;
343 }
344 default:
345 return 0;
346 }
347 }
348
349 static float
350 virgl_get_paramf(struct pipe_screen *screen, enum pipe_capf param)
351 {
352 switch (param) {
353 case PIPE_CAPF_MAX_LINE_WIDTH:
354 /* fall-through */
355 case PIPE_CAPF_MAX_LINE_WIDTH_AA:
356 return 255.0; /* arbitrary */
357 case PIPE_CAPF_MAX_POINT_WIDTH:
358 /* fall-through */
359 case PIPE_CAPF_MAX_POINT_WIDTH_AA:
360 return 255.0; /* arbitrary */
361 case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
362 return 16.0;
363 case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
364 return 16.0; /* arbitrary */
365 case PIPE_CAPF_GUARD_BAND_LEFT:
366 case PIPE_CAPF_GUARD_BAND_TOP:
367 case PIPE_CAPF_GUARD_BAND_RIGHT:
368 case PIPE_CAPF_GUARD_BAND_BOTTOM:
369 return 0.0;
370 }
371 /* should only get here on unhandled cases */
372 debug_printf("Unexpected PIPE_CAPF %d query\n", param);
373 return 0.0;
374 }
375
376 static boolean
377 virgl_is_vertex_format_supported(struct pipe_screen *screen,
378 enum pipe_format format)
379 {
380 struct virgl_screen *vscreen = virgl_screen(screen);
381 const struct util_format_description *format_desc;
382 int i;
383
384 format_desc = util_format_description(format);
385 if (!format_desc)
386 return FALSE;
387
388 if (format == PIPE_FORMAT_R11G11B10_FLOAT) {
389 int vformat = VIRGL_FORMAT_R11G11B10_FLOAT;
390 int big = vformat / 32;
391 int small = vformat % 32;
392 if (!(vscreen->caps.caps.v1.vertexbuffer.bitmask[big] & (1 << small)))
393 return FALSE;
394 return TRUE;
395 }
396
397 /* Find the first non-VOID channel. */
398 for (i = 0; i < 4; i++) {
399 if (format_desc->channel[i].type != UTIL_FORMAT_TYPE_VOID) {
400 break;
401 }
402 }
403
404 if (i == 4)
405 return FALSE;
406
407 if (format_desc->layout != UTIL_FORMAT_LAYOUT_PLAIN)
408 return FALSE;
409
410 if (format_desc->channel[i].type == UTIL_FORMAT_TYPE_FIXED)
411 return FALSE;
412 return TRUE;
413 }
414
415 /**
416 * Query format support for creating a texture, drawing surface, etc.
417 * \param format the format to test
418 * \param type one of PIPE_TEXTURE, PIPE_SURFACE
419 */
420 static boolean
421 virgl_is_format_supported( struct pipe_screen *screen,
422 enum pipe_format format,
423 enum pipe_texture_target target,
424 unsigned sample_count,
425 unsigned bind)
426 {
427 struct virgl_screen *vscreen = virgl_screen(screen);
428 const struct util_format_description *format_desc;
429 int i;
430
431 assert(target == PIPE_BUFFER ||
432 target == PIPE_TEXTURE_1D ||
433 target == PIPE_TEXTURE_1D_ARRAY ||
434 target == PIPE_TEXTURE_2D ||
435 target == PIPE_TEXTURE_2D_ARRAY ||
436 target == PIPE_TEXTURE_RECT ||
437 target == PIPE_TEXTURE_3D ||
438 target == PIPE_TEXTURE_CUBE ||
439 target == PIPE_TEXTURE_CUBE_ARRAY);
440
441 format_desc = util_format_description(format);
442 if (!format_desc)
443 return FALSE;
444
445 if (util_format_is_intensity(format))
446 return FALSE;
447
448 if (sample_count > 1) {
449 if (!vscreen->caps.caps.v1.bset.texture_multisample)
450 return FALSE;
451 if (sample_count > vscreen->caps.caps.v1.max_samples)
452 return FALSE;
453 }
454
455 if (bind & PIPE_BIND_VERTEX_BUFFER) {
456 return virgl_is_vertex_format_supported(screen, format);
457 }
458
459 if (bind & PIPE_BIND_RENDER_TARGET) {
460 if (format_desc->colorspace == UTIL_FORMAT_COLORSPACE_ZS)
461 return FALSE;
462
463 /*
464 * Although possible, it is unnatural to render into compressed or YUV
465 * surfaces. So disable these here to avoid going into weird paths
466 * inside the state trackers.
467 */
468 if (format_desc->block.width != 1 ||
469 format_desc->block.height != 1)
470 return FALSE;
471
472 {
473 int big = format / 32;
474 int small = format % 32;
475 if (!(vscreen->caps.caps.v1.render.bitmask[big] & (1 << small)))
476 return FALSE;
477 }
478 }
479
480 if (bind & PIPE_BIND_DEPTH_STENCIL) {
481 if (format_desc->colorspace != UTIL_FORMAT_COLORSPACE_ZS)
482 return FALSE;
483 }
484
485 /*
486 * All other operations (sampling, transfer, etc).
487 */
488
489 if (format_desc->layout == UTIL_FORMAT_LAYOUT_S3TC) {
490 goto out_lookup;
491 }
492 if (format_desc->layout == UTIL_FORMAT_LAYOUT_RGTC) {
493 goto out_lookup;
494 }
495 if (format_desc->layout == UTIL_FORMAT_LAYOUT_BPTC) {
496 goto out_lookup;
497 }
498
499 if (format == PIPE_FORMAT_R11G11B10_FLOAT) {
500 goto out_lookup;
501 } else if (format == PIPE_FORMAT_R9G9B9E5_FLOAT) {
502 goto out_lookup;
503 }
504
505 /* Find the first non-VOID channel. */
506 for (i = 0; i < 4; i++) {
507 if (format_desc->channel[i].type != UTIL_FORMAT_TYPE_VOID) {
508 break;
509 }
510 }
511
512 if (i == 4)
513 return FALSE;
514
515 /* no L4A4 */
516 if (format_desc->nr_channels < 4 && format_desc->channel[i].size == 4)
517 return FALSE;
518
519 out_lookup:
520 {
521 int big = format / 32;
522 int small = format % 32;
523 if (!(vscreen->caps.caps.v1.sampler.bitmask[big] & (1 << small)))
524 return FALSE;
525 }
526 /*
527 * Everything else should be supported by u_format.
528 */
529 return TRUE;
530 }
531
532 static void virgl_flush_frontbuffer(struct pipe_screen *screen,
533 struct pipe_resource *res,
534 unsigned level, unsigned layer,
535 void *winsys_drawable_handle, struct pipe_box *sub_box)
536 {
537 struct virgl_screen *vscreen = virgl_screen(screen);
538 struct virgl_winsys *vws = vscreen->vws;
539 struct virgl_resource *vres = virgl_resource(res);
540
541 if (vws->flush_frontbuffer)
542 vws->flush_frontbuffer(vws, vres->hw_res, level, layer, winsys_drawable_handle,
543 sub_box);
544 }
545
546 static void virgl_fence_reference(struct pipe_screen *screen,
547 struct pipe_fence_handle **ptr,
548 struct pipe_fence_handle *fence)
549 {
550 struct virgl_screen *vscreen = virgl_screen(screen);
551 struct virgl_winsys *vws = vscreen->vws;
552
553 vws->fence_reference(vws, ptr, fence);
554 }
555
556 static boolean virgl_fence_finish(struct pipe_screen *screen,
557 struct pipe_context *ctx,
558 struct pipe_fence_handle *fence,
559 uint64_t timeout)
560 {
561 struct virgl_screen *vscreen = virgl_screen(screen);
562 struct virgl_winsys *vws = vscreen->vws;
563
564 return vws->fence_wait(vws, fence, timeout);
565 }
566
567 static uint64_t
568 virgl_get_timestamp(struct pipe_screen *_screen)
569 {
570 return os_time_get_nano();
571 }
572
573 static void
574 virgl_destroy_screen(struct pipe_screen *screen)
575 {
576 struct virgl_screen *vscreen = virgl_screen(screen);
577 struct virgl_winsys *vws = vscreen->vws;
578
579 slab_destroy_parent(&vscreen->texture_transfer_pool);
580
581 if (vws)
582 vws->destroy(vws);
583 FREE(vscreen);
584 }
585
586 struct pipe_screen *
587 virgl_create_screen(struct virgl_winsys *vws)
588 {
589 struct virgl_screen *screen = CALLOC_STRUCT(virgl_screen);
590
591 if (!screen)
592 return NULL;
593
594 screen->vws = vws;
595 screen->base.get_name = virgl_get_name;
596 screen->base.get_vendor = virgl_get_vendor;
597 screen->base.get_param = virgl_get_param;
598 screen->base.get_shader_param = virgl_get_shader_param;
599 screen->base.get_paramf = virgl_get_paramf;
600 screen->base.is_format_supported = virgl_is_format_supported;
601 screen->base.destroy = virgl_destroy_screen;
602 screen->base.context_create = virgl_context_create;
603 screen->base.flush_frontbuffer = virgl_flush_frontbuffer;
604 screen->base.get_timestamp = virgl_get_timestamp;
605 screen->base.fence_reference = virgl_fence_reference;
606 //screen->base.fence_signalled = virgl_fence_signalled;
607 screen->base.fence_finish = virgl_fence_finish;
608
609 virgl_init_screen_resource_functions(&screen->base);
610
611 vws->get_caps(vws, &screen->caps);
612
613 screen->refcnt = 1;
614
615 slab_create_parent(&screen->texture_transfer_pool, sizeof(struct virgl_transfer), 16);
616
617 return &screen->base;
618 }