virgl: add shader offset alignment to to v2 caps struct
[mesa.git] / src / gallium / drivers / virgl / virgl_screen.c
1 /*
2 * Copyright 2014, 2015 Red Hat.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 */
23 #include "util/u_memory.h"
24 #include "util/u_format.h"
25 #include "util/u_format_s3tc.h"
26 #include "util/u_video.h"
27 #include "util/os_time.h"
28 #include "pipe/p_defines.h"
29 #include "pipe/p_screen.h"
30
31 #include "tgsi/tgsi_exec.h"
32
33 #include "virgl_screen.h"
34 #include "virgl_resource.h"
35 #include "virgl_public.h"
36 #include "virgl_context.h"
37
38 #define SP_MAX_TEXTURE_2D_LEVELS 15 /* 16K x 16K */
39 #define SP_MAX_TEXTURE_3D_LEVELS 9 /* 512 x 512 x 512 */
40 #define SP_MAX_TEXTURE_CUBE_LEVELS 13 /* 4K x 4K */
41
42 static const char *
43 virgl_get_vendor(struct pipe_screen *screen)
44 {
45 return "Red Hat";
46 }
47
48
49 static const char *
50 virgl_get_name(struct pipe_screen *screen)
51 {
52 return "virgl";
53 }
54
55 static int
56 virgl_get_param(struct pipe_screen *screen, enum pipe_cap param)
57 {
58 struct virgl_screen *vscreen = virgl_screen(screen);
59 switch (param) {
60 case PIPE_CAP_NPOT_TEXTURES:
61 return 1;
62 case PIPE_CAP_SM3:
63 return 1;
64 case PIPE_CAP_ANISOTROPIC_FILTER:
65 return 1;
66 case PIPE_CAP_POINT_SPRITE:
67 return 1;
68 case PIPE_CAP_MAX_RENDER_TARGETS:
69 return vscreen->caps.caps.v1.max_render_targets;
70 case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
71 return vscreen->caps.caps.v1.max_dual_source_render_targets;
72 case PIPE_CAP_OCCLUSION_QUERY:
73 return vscreen->caps.caps.v1.bset.occlusion_query;
74 case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
75 return vscreen->caps.caps.v1.bset.mirror_clamp;
76 case PIPE_CAP_TEXTURE_SWIZZLE:
77 return 1;
78 case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
79 return SP_MAX_TEXTURE_2D_LEVELS;
80 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
81 return SP_MAX_TEXTURE_3D_LEVELS;
82 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
83 return SP_MAX_TEXTURE_CUBE_LEVELS;
84 case PIPE_CAP_BLEND_EQUATION_SEPARATE:
85 return 1;
86 case PIPE_CAP_INDEP_BLEND_ENABLE:
87 return vscreen->caps.caps.v1.bset.indep_blend_enable;
88 case PIPE_CAP_INDEP_BLEND_FUNC:
89 return vscreen->caps.caps.v1.bset.indep_blend_func;
90 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
91 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
92 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
93 return 1;
94 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
95 return vscreen->caps.caps.v1.bset.fragment_coord_conventions;
96 case PIPE_CAP_DEPTH_CLIP_DISABLE:
97 return vscreen->caps.caps.v1.bset.depth_clip_disable;
98 case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
99 return vscreen->caps.caps.v1.max_streamout_buffers;
100 case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
101 case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
102 return 16*4;
103 case PIPE_CAP_PRIMITIVE_RESTART:
104 return vscreen->caps.caps.v1.bset.primitive_restart;
105 case PIPE_CAP_SHADER_STENCIL_EXPORT:
106 return vscreen->caps.caps.v1.bset.shader_stencil_export;
107 case PIPE_CAP_TGSI_INSTANCEID:
108 case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
109 return 1;
110 case PIPE_CAP_SEAMLESS_CUBE_MAP:
111 return vscreen->caps.caps.v1.bset.seamless_cube_map;
112 case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
113 return vscreen->caps.caps.v1.bset.seamless_cube_map_per_texture;
114 case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
115 return vscreen->caps.caps.v1.max_texture_array_layers;
116 case PIPE_CAP_MIN_TEXEL_OFFSET:
117 return vscreen->caps.caps.v2.min_texel_offset;
118 case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
119 return vscreen->caps.caps.v2.min_texture_gather_offset;
120 case PIPE_CAP_MAX_TEXEL_OFFSET:
121 return vscreen->caps.caps.v2.max_texel_offset;
122 case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
123 return vscreen->caps.caps.v2.max_texture_gather_offset;
124 case PIPE_CAP_CONDITIONAL_RENDER:
125 return vscreen->caps.caps.v1.bset.conditional_render;
126 case PIPE_CAP_TEXTURE_BARRIER:
127 return 0;
128 case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
129 return 1;
130 case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
131 case PIPE_CAP_VERTEX_COLOR_CLAMPED:
132 return vscreen->caps.caps.v1.bset.color_clamping;
133 case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
134 return 1;
135 case PIPE_CAP_GLSL_FEATURE_LEVEL:
136 return vscreen->caps.caps.v1.glsl_level;
137 case PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY:
138 return MIN2(vscreen->caps.caps.v1.glsl_level, 140);
139 case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
140 return 0;
141 case PIPE_CAP_COMPUTE:
142 return 0;
143 case PIPE_CAP_USER_VERTEX_BUFFERS:
144 return 0;
145 case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
146 return vscreen->caps.caps.v2.uniform_buffer_offset_alignment;
147 case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
148 case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS:
149 return vscreen->caps.caps.v1.bset.streamout_pause_resume;
150 case PIPE_CAP_START_INSTANCE:
151 return vscreen->caps.caps.v1.bset.start_instance;
152 case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
153 case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
154 case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
155 case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
156 case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
157 return 0;
158 case PIPE_CAP_QUERY_TIMESTAMP:
159 return 1;
160 case PIPE_CAP_QUERY_TIME_ELAPSED:
161 return 0;
162 case PIPE_CAP_TGSI_TEXCOORD:
163 return 0;
164 case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
165 return VIRGL_MAP_BUFFER_ALIGNMENT;
166 case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
167 return vscreen->caps.caps.v1.max_tbo_size > 0;
168 case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
169 return vscreen->caps.caps.v2.texture_buffer_offset_alignment;
170 case PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY:
171 return 0;
172 case PIPE_CAP_CUBE_MAP_ARRAY:
173 return vscreen->caps.caps.v1.bset.cube_map_array;
174 case PIPE_CAP_TEXTURE_MULTISAMPLE:
175 return vscreen->caps.caps.v1.bset.texture_multisample;
176 case PIPE_CAP_MAX_VIEWPORTS:
177 return vscreen->caps.caps.v1.max_viewports;
178 case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
179 return vscreen->caps.caps.v1.max_tbo_size;
180 case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
181 case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
182 case PIPE_CAP_ENDIANNESS:
183 return 0;
184 case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
185 case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
186 return 1;
187 case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
188 return 0;
189 case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
190 return vscreen->caps.caps.v2.max_geom_output_vertices;
191 case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
192 return vscreen->caps.caps.v2.max_geom_total_output_components;
193 case PIPE_CAP_TEXTURE_QUERY_LOD:
194 return vscreen->caps.caps.v1.bset.texture_query_lod;
195 case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
196 return vscreen->caps.caps.v1.max_texture_gather_components;
197 case PIPE_CAP_DRAW_INDIRECT:
198 return vscreen->caps.caps.v1.bset.has_indirect_draw;
199 case PIPE_CAP_SAMPLE_SHADING:
200 case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
201 return vscreen->caps.caps.v1.bset.has_sample_shading;
202 case PIPE_CAP_CULL_DISTANCE:
203 return vscreen->caps.caps.v1.bset.has_cull;
204 case PIPE_CAP_MAX_VERTEX_STREAMS:
205 return vscreen->caps.caps.v1.glsl_level >= 400 ? 4 : 1;
206 case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
207 return vscreen->caps.caps.v1.bset.conditional_render_inverted;
208 case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
209 return vscreen->caps.caps.v1.bset.derivative_control;
210 case PIPE_CAP_POLYGON_OFFSET_CLAMP:
211 return vscreen->caps.caps.v1.bset.polygon_offset_clamp;
212 case PIPE_CAP_QUERY_SO_OVERFLOW:
213 return vscreen->caps.caps.v1.bset.transform_feedback_overflow_query;
214 case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
215 return vscreen->caps.caps.v2.shader_buffer_offset_alignment;
216 case PIPE_CAP_TEXTURE_GATHER_SM5:
217 case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
218 case PIPE_CAP_FAKE_SW_MSAA:
219 case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
220 case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
221 case PIPE_CAP_MULTI_DRAW_INDIRECT:
222 case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS:
223 case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
224 case PIPE_CAP_SAMPLER_VIEW_TARGET:
225 case PIPE_CAP_CLIP_HALFZ:
226 case PIPE_CAP_VERTEXID_NOBASE:
227 case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
228 case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
229 case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
230 case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
231 case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
232 case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
233 case PIPE_CAP_DEPTH_BOUNDS_TEST:
234 case PIPE_CAP_TGSI_TXQS:
235 case PIPE_CAP_SHAREABLE_SHADERS:
236 case PIPE_CAP_CLEAR_TEXTURE:
237 case PIPE_CAP_DRAW_PARAMETERS:
238 case PIPE_CAP_TGSI_PACK_HALF_FLOAT:
239 case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
240 case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
241 case PIPE_CAP_INVALIDATE_BUFFER:
242 case PIPE_CAP_GENERATE_MIPMAP:
243 case PIPE_CAP_SURFACE_REINTERPRET_BLOCKS:
244 case PIPE_CAP_QUERY_BUFFER_OBJECT:
245 case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
246 case PIPE_CAP_STRING_MARKER:
247 case PIPE_CAP_QUERY_MEMORY_INFO:
248 case PIPE_CAP_PCI_GROUP:
249 case PIPE_CAP_PCI_BUS:
250 case PIPE_CAP_PCI_DEVICE:
251 case PIPE_CAP_PCI_FUNCTION:
252 case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT:
253 case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR:
254 case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES:
255 case PIPE_CAP_TGSI_VOTE:
256 case PIPE_CAP_MAX_WINDOW_RECTANGLES:
257 case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED:
258 case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS:
259 case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
260 case PIPE_CAP_TGSI_CAN_READ_OUTPUTS:
261 case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
262 case PIPE_CAP_TGSI_FS_FBFETCH:
263 case PIPE_CAP_TGSI_MUL_ZERO_WINS:
264 case PIPE_CAP_INT64:
265 case PIPE_CAP_INT64_DIVMOD:
266 case PIPE_CAP_TGSI_TEX_TXF_LZ:
267 case PIPE_CAP_TGSI_CLOCK:
268 case PIPE_CAP_POLYGON_MODE_FILL_RECTANGLE:
269 case PIPE_CAP_SPARSE_BUFFER_PAGE_SIZE:
270 case PIPE_CAP_TGSI_BALLOT:
271 case PIPE_CAP_DOUBLES:
272 case PIPE_CAP_TGSI_TES_LAYER_VIEWPORT:
273 case PIPE_CAP_CAN_BIND_CONST_BUFFER_AS_VERTEX:
274 case PIPE_CAP_ALLOW_MAPPED_BUFFERS_DURING_EXECUTION:
275 case PIPE_CAP_POST_DEPTH_COVERAGE:
276 case PIPE_CAP_BINDLESS_TEXTURE:
277 case PIPE_CAP_NIR_SAMPLERS_AS_DEREF:
278 case PIPE_CAP_MEMOBJ:
279 case PIPE_CAP_LOAD_CONSTBUF:
280 case PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS:
281 case PIPE_CAP_TILE_RASTER_ORDER:
282 case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
283 case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
284 case PIPE_CAP_CONTEXT_PRIORITY_MASK:
285 case PIPE_CAP_FENCE_SIGNAL:
286 case PIPE_CAP_CONSTBUF0_FLAGS:
287 case PIPE_CAP_PACKED_UNIFORMS:
288 case PIPE_CAP_CONSERVATIVE_RASTER_POST_SNAP_TRIANGLES:
289 case PIPE_CAP_CONSERVATIVE_RASTER_POST_SNAP_POINTS_LINES:
290 case PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_TRIANGLES:
291 case PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_POINTS_LINES:
292 case PIPE_CAP_CONSERVATIVE_RASTER_POST_DEPTH_COVERAGE:
293 case PIPE_CAP_MAX_CONSERVATIVE_RASTER_SUBPIXEL_PRECISION_BIAS:
294 return 0;
295 case PIPE_CAP_VENDOR_ID:
296 return 0x1af4;
297 case PIPE_CAP_DEVICE_ID:
298 return 0x1010;
299 case PIPE_CAP_ACCELERATED:
300 return 1;
301 case PIPE_CAP_UMA:
302 case PIPE_CAP_VIDEO_MEMORY:
303 return 0;
304 case PIPE_CAP_NATIVE_FENCE_FD:
305 return 0;
306 }
307 /* should only get here on unhandled cases */
308 debug_printf("Unexpected PIPE_CAP %d query\n", param);
309 return 0;
310 }
311
312 static int
313 virgl_get_shader_param(struct pipe_screen *screen,
314 enum pipe_shader_type shader,
315 enum pipe_shader_cap param)
316 {
317 struct virgl_screen *vscreen = virgl_screen(screen);
318 switch(shader)
319 {
320 case PIPE_SHADER_FRAGMENT:
321 case PIPE_SHADER_VERTEX:
322 case PIPE_SHADER_GEOMETRY:
323 switch (param) {
324 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
325 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
326 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
327 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
328 return INT_MAX;
329 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
330 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
331 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
332 return 1;
333 case PIPE_SHADER_CAP_MAX_INPUTS:
334 if (vscreen->caps.caps.v1.glsl_level < 150)
335 return vscreen->caps.caps.v2.max_vertex_attribs;
336 return (shader == PIPE_SHADER_VERTEX ||
337 shader == PIPE_SHADER_GEOMETRY) ? vscreen->caps.caps.v2.max_vertex_attribs : 32;
338 case PIPE_SHADER_CAP_MAX_OUTPUTS:
339 if (shader == PIPE_SHADER_FRAGMENT)
340 return vscreen->caps.caps.v1.max_render_targets;
341 return vscreen->caps.caps.v2.max_vertex_outputs;
342 // case PIPE_SHADER_CAP_MAX_CONSTS:
343 // return 4096;
344 case PIPE_SHADER_CAP_MAX_TEMPS:
345 return 256;
346 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
347 return vscreen->caps.caps.v1.max_uniform_blocks;
348 // case PIPE_SHADER_CAP_MAX_ADDRS:
349 // return 1;
350 case PIPE_SHADER_CAP_SUBROUTINES:
351 return 1;
352 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
353 return 16;
354 case PIPE_SHADER_CAP_INTEGERS:
355 return vscreen->caps.caps.v1.glsl_level >= 130;
356 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
357 return 32;
358 case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
359 return 4096 * sizeof(float[4]);
360 case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
361 case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
362 case PIPE_SHADER_CAP_INT64_ATOMICS:
363 case PIPE_SHADER_CAP_FP16:
364 case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
365 case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
366 default:
367 return 0;
368 }
369 default:
370 return 0;
371 }
372 }
373
374 static float
375 virgl_get_paramf(struct pipe_screen *screen, enum pipe_capf param)
376 {
377 struct virgl_screen *vscreen = virgl_screen(screen);
378 switch (param) {
379 case PIPE_CAPF_MAX_LINE_WIDTH:
380 return vscreen->caps.caps.v2.max_aliased_line_width;
381 case PIPE_CAPF_MAX_LINE_WIDTH_AA:
382 return vscreen->caps.caps.v2.max_smooth_line_width;
383 case PIPE_CAPF_MAX_POINT_WIDTH:
384 return vscreen->caps.caps.v2.max_aliased_point_size;
385 case PIPE_CAPF_MAX_POINT_WIDTH_AA:
386 return vscreen->caps.caps.v2.max_smooth_point_size;
387 case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
388 return 16.0;
389 case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
390 return vscreen->caps.caps.v2.max_texture_lod_bias;
391 case PIPE_CAPF_MIN_CONSERVATIVE_RASTER_DILATE:
392 case PIPE_CAPF_MAX_CONSERVATIVE_RASTER_DILATE:
393 case PIPE_CAPF_CONSERVATIVE_RASTER_DILATE_GRANULARITY:
394 return 0.0f;
395 }
396 /* should only get here on unhandled cases */
397 debug_printf("Unexpected PIPE_CAPF %d query\n", param);
398 return 0.0;
399 }
400
401 static boolean
402 virgl_is_vertex_format_supported(struct pipe_screen *screen,
403 enum pipe_format format)
404 {
405 struct virgl_screen *vscreen = virgl_screen(screen);
406 const struct util_format_description *format_desc;
407 int i;
408
409 format_desc = util_format_description(format);
410 if (!format_desc)
411 return FALSE;
412
413 if (format == PIPE_FORMAT_R11G11B10_FLOAT) {
414 int vformat = VIRGL_FORMAT_R11G11B10_FLOAT;
415 int big = vformat / 32;
416 int small = vformat % 32;
417 if (!(vscreen->caps.caps.v1.vertexbuffer.bitmask[big] & (1 << small)))
418 return FALSE;
419 return TRUE;
420 }
421
422 /* Find the first non-VOID channel. */
423 for (i = 0; i < 4; i++) {
424 if (format_desc->channel[i].type != UTIL_FORMAT_TYPE_VOID) {
425 break;
426 }
427 }
428
429 if (i == 4)
430 return FALSE;
431
432 if (format_desc->layout != UTIL_FORMAT_LAYOUT_PLAIN)
433 return FALSE;
434
435 if (format_desc->channel[i].type == UTIL_FORMAT_TYPE_FIXED)
436 return FALSE;
437 return TRUE;
438 }
439
440 /**
441 * Query format support for creating a texture, drawing surface, etc.
442 * \param format the format to test
443 * \param type one of PIPE_TEXTURE, PIPE_SURFACE
444 */
445 static boolean
446 virgl_is_format_supported( struct pipe_screen *screen,
447 enum pipe_format format,
448 enum pipe_texture_target target,
449 unsigned sample_count,
450 unsigned bind)
451 {
452 struct virgl_screen *vscreen = virgl_screen(screen);
453 const struct util_format_description *format_desc;
454 int i;
455
456 assert(target == PIPE_BUFFER ||
457 target == PIPE_TEXTURE_1D ||
458 target == PIPE_TEXTURE_1D_ARRAY ||
459 target == PIPE_TEXTURE_2D ||
460 target == PIPE_TEXTURE_2D_ARRAY ||
461 target == PIPE_TEXTURE_RECT ||
462 target == PIPE_TEXTURE_3D ||
463 target == PIPE_TEXTURE_CUBE ||
464 target == PIPE_TEXTURE_CUBE_ARRAY);
465
466 format_desc = util_format_description(format);
467 if (!format_desc)
468 return FALSE;
469
470 if (util_format_is_intensity(format))
471 return FALSE;
472
473 if (sample_count > 1) {
474 if (!vscreen->caps.caps.v1.bset.texture_multisample)
475 return FALSE;
476 if (sample_count > vscreen->caps.caps.v1.max_samples)
477 return FALSE;
478 }
479
480 if (bind & PIPE_BIND_VERTEX_BUFFER) {
481 return virgl_is_vertex_format_supported(screen, format);
482 }
483
484 if (bind & PIPE_BIND_RENDER_TARGET) {
485 if (format_desc->colorspace == UTIL_FORMAT_COLORSPACE_ZS)
486 return FALSE;
487
488 /*
489 * Although possible, it is unnatural to render into compressed or YUV
490 * surfaces. So disable these here to avoid going into weird paths
491 * inside the state trackers.
492 */
493 if (format_desc->block.width != 1 ||
494 format_desc->block.height != 1)
495 return FALSE;
496
497 {
498 int big = format / 32;
499 int small = format % 32;
500 if (!(vscreen->caps.caps.v1.render.bitmask[big] & (1 << small)))
501 return FALSE;
502 }
503 }
504
505 if (bind & PIPE_BIND_DEPTH_STENCIL) {
506 if (format_desc->colorspace != UTIL_FORMAT_COLORSPACE_ZS)
507 return FALSE;
508 }
509
510 /*
511 * All other operations (sampling, transfer, etc).
512 */
513
514 if (format_desc->layout == UTIL_FORMAT_LAYOUT_S3TC) {
515 goto out_lookup;
516 }
517 if (format_desc->layout == UTIL_FORMAT_LAYOUT_RGTC) {
518 goto out_lookup;
519 }
520 if (format_desc->layout == UTIL_FORMAT_LAYOUT_BPTC) {
521 goto out_lookup;
522 }
523
524 if (format == PIPE_FORMAT_R11G11B10_FLOAT) {
525 goto out_lookup;
526 } else if (format == PIPE_FORMAT_R9G9B9E5_FLOAT) {
527 goto out_lookup;
528 }
529
530 /* Find the first non-VOID channel. */
531 for (i = 0; i < 4; i++) {
532 if (format_desc->channel[i].type != UTIL_FORMAT_TYPE_VOID) {
533 break;
534 }
535 }
536
537 if (i == 4)
538 return FALSE;
539
540 /* no L4A4 */
541 if (format_desc->nr_channels < 4 && format_desc->channel[i].size == 4)
542 return FALSE;
543
544 out_lookup:
545 {
546 int big = format / 32;
547 int small = format % 32;
548 if (!(vscreen->caps.caps.v1.sampler.bitmask[big] & (1 << small)))
549 return FALSE;
550 }
551 /*
552 * Everything else should be supported by u_format.
553 */
554 return TRUE;
555 }
556
557 static void virgl_flush_frontbuffer(struct pipe_screen *screen,
558 struct pipe_resource *res,
559 unsigned level, unsigned layer,
560 void *winsys_drawable_handle, struct pipe_box *sub_box)
561 {
562 struct virgl_screen *vscreen = virgl_screen(screen);
563 struct virgl_winsys *vws = vscreen->vws;
564 struct virgl_resource *vres = virgl_resource(res);
565
566 if (vws->flush_frontbuffer)
567 vws->flush_frontbuffer(vws, vres->hw_res, level, layer, winsys_drawable_handle,
568 sub_box);
569 }
570
571 static void virgl_fence_reference(struct pipe_screen *screen,
572 struct pipe_fence_handle **ptr,
573 struct pipe_fence_handle *fence)
574 {
575 struct virgl_screen *vscreen = virgl_screen(screen);
576 struct virgl_winsys *vws = vscreen->vws;
577
578 vws->fence_reference(vws, ptr, fence);
579 }
580
581 static boolean virgl_fence_finish(struct pipe_screen *screen,
582 struct pipe_context *ctx,
583 struct pipe_fence_handle *fence,
584 uint64_t timeout)
585 {
586 struct virgl_screen *vscreen = virgl_screen(screen);
587 struct virgl_winsys *vws = vscreen->vws;
588
589 return vws->fence_wait(vws, fence, timeout);
590 }
591
592 static uint64_t
593 virgl_get_timestamp(struct pipe_screen *_screen)
594 {
595 return os_time_get_nano();
596 }
597
598 static void
599 virgl_destroy_screen(struct pipe_screen *screen)
600 {
601 struct virgl_screen *vscreen = virgl_screen(screen);
602 struct virgl_winsys *vws = vscreen->vws;
603
604 slab_destroy_parent(&vscreen->texture_transfer_pool);
605
606 if (vws)
607 vws->destroy(vws);
608 FREE(vscreen);
609 }
610
611 struct pipe_screen *
612 virgl_create_screen(struct virgl_winsys *vws)
613 {
614 struct virgl_screen *screen = CALLOC_STRUCT(virgl_screen);
615
616 if (!screen)
617 return NULL;
618
619 screen->vws = vws;
620 screen->base.get_name = virgl_get_name;
621 screen->base.get_vendor = virgl_get_vendor;
622 screen->base.get_param = virgl_get_param;
623 screen->base.get_shader_param = virgl_get_shader_param;
624 screen->base.get_paramf = virgl_get_paramf;
625 screen->base.is_format_supported = virgl_is_format_supported;
626 screen->base.destroy = virgl_destroy_screen;
627 screen->base.context_create = virgl_context_create;
628 screen->base.flush_frontbuffer = virgl_flush_frontbuffer;
629 screen->base.get_timestamp = virgl_get_timestamp;
630 screen->base.fence_reference = virgl_fence_reference;
631 //screen->base.fence_signalled = virgl_fence_signalled;
632 screen->base.fence_finish = virgl_fence_finish;
633
634 virgl_init_screen_resource_functions(&screen->base);
635
636 vws->get_caps(vws, &screen->caps);
637
638 screen->refcnt = 1;
639
640 slab_create_parent(&screen->texture_transfer_pool, sizeof(struct virgl_transfer), 16);
641
642 return &screen->base;
643 }