Merge remote-tracking branch 'public/master' into vulkan
[mesa.git] / src / gallium / drivers / virgl / virgl_screen.c
1 /*
2 * Copyright 2014, 2015 Red Hat.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 */
23 #include "util/u_memory.h"
24 #include "util/u_format.h"
25 #include "util/u_format_s3tc.h"
26 #include "util/u_video.h"
27 #include "os/os_time.h"
28 #include "pipe/p_defines.h"
29 #include "pipe/p_screen.h"
30 #include "draw/draw_context.h"
31
32 #include "tgsi/tgsi_exec.h"
33
34 #include "virgl_screen.h"
35 #include "virgl_resource.h"
36 #include "virgl_public.h"
37 #include "virgl_context.h"
38
39 #define SP_MAX_TEXTURE_2D_LEVELS 15 /* 16K x 16K */
40 #define SP_MAX_TEXTURE_3D_LEVELS 9 /* 512 x 512 x 512 */
41 #define SP_MAX_TEXTURE_CUBE_LEVELS 13 /* 4K x 4K */
42
43 static const char *
44 virgl_get_vendor(struct pipe_screen *screen)
45 {
46 return "Red Hat";
47 }
48
49
50 static const char *
51 virgl_get_name(struct pipe_screen *screen)
52 {
53 return "virgl";
54 }
55
56 static int
57 virgl_get_param(struct pipe_screen *screen, enum pipe_cap param)
58 {
59 struct virgl_screen *vscreen = virgl_screen(screen);
60 switch (param) {
61 case PIPE_CAP_NPOT_TEXTURES:
62 return 1;
63 case PIPE_CAP_TWO_SIDED_STENCIL:
64 return 1;
65 case PIPE_CAP_SM3:
66 return 1;
67 case PIPE_CAP_ANISOTROPIC_FILTER:
68 return 1;
69 case PIPE_CAP_POINT_SPRITE:
70 return 1;
71 case PIPE_CAP_MAX_RENDER_TARGETS:
72 return vscreen->caps.caps.v1.max_render_targets;
73 case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
74 return vscreen->caps.caps.v1.max_dual_source_render_targets;
75 case PIPE_CAP_OCCLUSION_QUERY:
76 return vscreen->caps.caps.v1.bset.occlusion_query;
77 case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
78 return vscreen->caps.caps.v1.bset.mirror_clamp;
79 case PIPE_CAP_TEXTURE_SHADOW_MAP:
80 return 1;
81 case PIPE_CAP_TEXTURE_SWIZZLE:
82 return 1;
83 case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
84 return SP_MAX_TEXTURE_2D_LEVELS;
85 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
86 return SP_MAX_TEXTURE_3D_LEVELS;
87 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
88 return SP_MAX_TEXTURE_CUBE_LEVELS;
89 case PIPE_CAP_BLEND_EQUATION_SEPARATE:
90 return 1;
91 case PIPE_CAP_INDEP_BLEND_ENABLE:
92 return vscreen->caps.caps.v1.bset.indep_blend_enable;
93 case PIPE_CAP_INDEP_BLEND_FUNC:
94 return vscreen->caps.caps.v1.bset.indep_blend_func;
95 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
96 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
97 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
98 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
99 return vscreen->caps.caps.v1.bset.fragment_coord_conventions;
100 case PIPE_CAP_DEPTH_CLIP_DISABLE:
101 return vscreen->caps.caps.v1.bset.depth_clip_disable;
102 case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
103 return vscreen->caps.caps.v1.max_streamout_buffers;
104 case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
105 case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
106 return 16*4;
107 case PIPE_CAP_PRIMITIVE_RESTART:
108 return vscreen->caps.caps.v1.bset.primitive_restart;
109 case PIPE_CAP_SHADER_STENCIL_EXPORT:
110 return vscreen->caps.caps.v1.bset.shader_stencil_export;
111 case PIPE_CAP_TGSI_INSTANCEID:
112 case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
113 return 1;
114 case PIPE_CAP_SEAMLESS_CUBE_MAP:
115 return vscreen->caps.caps.v1.bset.seamless_cube_map;
116 case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
117 return vscreen->caps.caps.v1.bset.seamless_cube_map_per_texture;
118 case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
119 return vscreen->caps.caps.v1.max_texture_array_layers;
120 case PIPE_CAP_MIN_TEXEL_OFFSET:
121 case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
122 return -8;
123 case PIPE_CAP_MAX_TEXEL_OFFSET:
124 case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
125 return 7;
126 case PIPE_CAP_CONDITIONAL_RENDER:
127 return vscreen->caps.caps.v1.bset.conditional_render;
128 case PIPE_CAP_TEXTURE_BARRIER:
129 return 0;
130 case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
131 return 1;
132 case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
133 case PIPE_CAP_VERTEX_COLOR_CLAMPED:
134 return vscreen->caps.caps.v1.bset.color_clamping;
135 case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
136 return 1;
137 case PIPE_CAP_GLSL_FEATURE_LEVEL:
138 return vscreen->caps.caps.v1.glsl_level;
139 case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
140 return 0;
141 case PIPE_CAP_COMPUTE:
142 return 0;
143 case PIPE_CAP_USER_VERTEX_BUFFERS:
144 return 0;
145 case PIPE_CAP_USER_INDEX_BUFFERS:
146 case PIPE_CAP_USER_CONSTANT_BUFFERS:
147 return 1;
148 case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
149 return 16;
150 case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
151 return vscreen->caps.caps.v1.bset.streamout_pause_resume;
152 case PIPE_CAP_START_INSTANCE:
153 return vscreen->caps.caps.v1.bset.start_instance;
154 case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
155 case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
156 case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
157 case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
158 case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
159 return 0;
160 case PIPE_CAP_QUERY_TIMESTAMP:
161 return 1;
162 case PIPE_CAP_QUERY_TIME_ELAPSED:
163 return 0;
164 case PIPE_CAP_TGSI_TEXCOORD:
165 return 0;
166 case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
167 return VIRGL_MAP_BUFFER_ALIGNMENT;
168 case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
169 return vscreen->caps.caps.v1.max_tbo_size > 0;
170 case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
171 return 0;
172 case PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY:
173 return 0;
174 case PIPE_CAP_CUBE_MAP_ARRAY:
175 return vscreen->caps.caps.v1.bset.cube_map_array;
176 case PIPE_CAP_TEXTURE_MULTISAMPLE:
177 return vscreen->caps.caps.v1.bset.texture_multisample;
178 case PIPE_CAP_MAX_VIEWPORTS:
179 return vscreen->caps.caps.v1.max_viewports;
180 case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
181 return vscreen->caps.caps.v1.max_tbo_size;
182 case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
183 case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
184 case PIPE_CAP_ENDIANNESS:
185 return 0;
186 case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
187 return 1;
188 case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
189 return 0;
190 case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
191 return 1024;
192 case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
193 return 16384;
194 case PIPE_CAP_TEXTURE_QUERY_LOD:
195 return vscreen->caps.caps.v1.bset.texture_query_lod;
196 case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
197 return vscreen->caps.caps.v1.max_texture_gather_components;
198 case PIPE_CAP_TEXTURE_GATHER_SM5:
199 case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
200 case PIPE_CAP_SAMPLE_SHADING:
201 case PIPE_CAP_FAKE_SW_MSAA:
202 case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
203 case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
204 case PIPE_CAP_MAX_VERTEX_STREAMS:
205 case PIPE_CAP_DRAW_INDIRECT:
206 case PIPE_CAP_MULTI_DRAW_INDIRECT:
207 case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS:
208 case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
209 case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
210 case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
211 case PIPE_CAP_SAMPLER_VIEW_TARGET:
212 case PIPE_CAP_CLIP_HALFZ:
213 case PIPE_CAP_VERTEXID_NOBASE:
214 case PIPE_CAP_POLYGON_OFFSET_CLAMP:
215 case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
216 case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
217 case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
218 case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
219 case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
220 case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
221 case PIPE_CAP_DEPTH_BOUNDS_TEST:
222 case PIPE_CAP_TGSI_TXQS:
223 case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
224 case PIPE_CAP_SHAREABLE_SHADERS:
225 case PIPE_CAP_CLEAR_TEXTURE:
226 case PIPE_CAP_DRAW_PARAMETERS:
227 case PIPE_CAP_TGSI_PACK_HALF_FLOAT:
228 case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
229 case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
230 case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
231 case PIPE_CAP_INVALIDATE_BUFFER:
232 case PIPE_CAP_GENERATE_MIPMAP:
233 case PIPE_CAP_SURFACE_REINTERPRET_BLOCKS:
234 case PIPE_CAP_QUERY_BUFFER_OBJECT:
235 case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
236 case PIPE_CAP_STRING_MARKER:
237 case PIPE_CAP_QUERY_MEMORY_INFO:
238 case PIPE_CAP_PCI_GROUP:
239 case PIPE_CAP_PCI_BUS:
240 case PIPE_CAP_PCI_DEVICE:
241 case PIPE_CAP_PCI_FUNCTION:
242 return 0;
243 case PIPE_CAP_VENDOR_ID:
244 return 0x1af4;
245 case PIPE_CAP_DEVICE_ID:
246 return 0x1010;
247 case PIPE_CAP_ACCELERATED:
248 return 1;
249 case PIPE_CAP_UMA:
250 case PIPE_CAP_VIDEO_MEMORY:
251 return 0;
252 }
253 /* should only get here on unhandled cases */
254 debug_printf("Unexpected PIPE_CAP %d query\n", param);
255 return 0;
256 }
257
258 static int
259 virgl_get_shader_param(struct pipe_screen *screen, unsigned shader, enum pipe_shader_cap param)
260 {
261 struct virgl_screen *vscreen = virgl_screen(screen);
262 switch(shader)
263 {
264 case PIPE_SHADER_FRAGMENT:
265 case PIPE_SHADER_VERTEX:
266 case PIPE_SHADER_GEOMETRY:
267 switch (param) {
268 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
269 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
270 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
271 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
272 return INT_MAX;
273 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
274 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
275 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
276 return 1;
277 case PIPE_SHADER_CAP_MAX_INPUTS:
278 if (vscreen->caps.caps.v1.glsl_level < 150)
279 return 16;
280 return shader == PIPE_SHADER_VERTEX ? 16 : 32;
281 case PIPE_SHADER_CAP_MAX_OUTPUTS:
282 return 128;
283 // case PIPE_SHADER_CAP_MAX_CONSTS:
284 // return 4096;
285 case PIPE_SHADER_CAP_MAX_TEMPS:
286 return 256;
287 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
288 return vscreen->caps.caps.v1.max_uniform_blocks;
289 // case PIPE_SHADER_CAP_MAX_ADDRS:
290 // return 1;
291 case PIPE_SHADER_CAP_MAX_PREDS:
292 return 0;
293 case PIPE_SHADER_CAP_SUBROUTINES:
294 return 1;
295 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
296 return 16;
297 case PIPE_SHADER_CAP_INTEGERS:
298 return vscreen->caps.caps.v1.glsl_level >= 130;
299 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
300 return 32;
301 case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
302 return 4096 * sizeof(float[4]);
303 default:
304 return 0;
305 }
306 default:
307 return 0;
308 }
309 }
310
311 static float
312 virgl_get_paramf(struct pipe_screen *screen, enum pipe_capf param)
313 {
314 switch (param) {
315 case PIPE_CAPF_MAX_LINE_WIDTH:
316 /* fall-through */
317 case PIPE_CAPF_MAX_LINE_WIDTH_AA:
318 return 255.0; /* arbitrary */
319 case PIPE_CAPF_MAX_POINT_WIDTH:
320 /* fall-through */
321 case PIPE_CAPF_MAX_POINT_WIDTH_AA:
322 return 255.0; /* arbitrary */
323 case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
324 return 16.0;
325 case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
326 return 16.0; /* arbitrary */
327 case PIPE_CAPF_GUARD_BAND_LEFT:
328 case PIPE_CAPF_GUARD_BAND_TOP:
329 case PIPE_CAPF_GUARD_BAND_RIGHT:
330 case PIPE_CAPF_GUARD_BAND_BOTTOM:
331 return 0.0;
332 }
333 /* should only get here on unhandled cases */
334 debug_printf("Unexpected PIPE_CAPF %d query\n", param);
335 return 0.0;
336 }
337
338 static boolean
339 virgl_is_vertex_format_supported(struct pipe_screen *screen,
340 enum pipe_format format)
341 {
342 struct virgl_screen *vscreen = virgl_screen(screen);
343 const struct util_format_description *format_desc;
344 int i;
345
346 format_desc = util_format_description(format);
347 if (!format_desc)
348 return FALSE;
349
350 if (format == PIPE_FORMAT_R11G11B10_FLOAT) {
351 int vformat = VIRGL_FORMAT_R11G11B10_FLOAT;
352 int big = vformat / 32;
353 int small = vformat % 32;
354 if (!(vscreen->caps.caps.v1.vertexbuffer.bitmask[big] & (1 << small)))
355 return FALSE;
356 return TRUE;
357 }
358
359 /* Find the first non-VOID channel. */
360 for (i = 0; i < 4; i++) {
361 if (format_desc->channel[i].type != UTIL_FORMAT_TYPE_VOID) {
362 break;
363 }
364 }
365
366 if (i == 4)
367 return FALSE;
368
369 if (format_desc->layout != UTIL_FORMAT_LAYOUT_PLAIN)
370 return FALSE;
371
372 if (format_desc->channel[i].type == UTIL_FORMAT_TYPE_FIXED)
373 return FALSE;
374 return TRUE;
375 }
376
377 /**
378 * Query format support for creating a texture, drawing surface, etc.
379 * \param format the format to test
380 * \param type one of PIPE_TEXTURE, PIPE_SURFACE
381 */
382 static boolean
383 virgl_is_format_supported( struct pipe_screen *screen,
384 enum pipe_format format,
385 enum pipe_texture_target target,
386 unsigned sample_count,
387 unsigned bind)
388 {
389 struct virgl_screen *vscreen = virgl_screen(screen);
390 const struct util_format_description *format_desc;
391 int i;
392
393 assert(target == PIPE_BUFFER ||
394 target == PIPE_TEXTURE_1D ||
395 target == PIPE_TEXTURE_1D_ARRAY ||
396 target == PIPE_TEXTURE_2D ||
397 target == PIPE_TEXTURE_2D_ARRAY ||
398 target == PIPE_TEXTURE_RECT ||
399 target == PIPE_TEXTURE_3D ||
400 target == PIPE_TEXTURE_CUBE ||
401 target == PIPE_TEXTURE_CUBE_ARRAY);
402
403 format_desc = util_format_description(format);
404 if (!format_desc)
405 return FALSE;
406
407 if (util_format_is_intensity(format))
408 return FALSE;
409
410 if (sample_count > 1) {
411 if (!vscreen->caps.caps.v1.bset.texture_multisample)
412 return FALSE;
413 if (sample_count > vscreen->caps.caps.v1.max_samples)
414 return FALSE;
415 }
416
417 if (bind & PIPE_BIND_VERTEX_BUFFER) {
418 return virgl_is_vertex_format_supported(screen, format);
419 }
420
421 if (bind & PIPE_BIND_RENDER_TARGET) {
422 if (format_desc->colorspace == UTIL_FORMAT_COLORSPACE_ZS)
423 return FALSE;
424
425 /*
426 * Although possible, it is unnatural to render into compressed or YUV
427 * surfaces. So disable these here to avoid going into weird paths
428 * inside the state trackers.
429 */
430 if (format_desc->block.width != 1 ||
431 format_desc->block.height != 1)
432 return FALSE;
433
434 {
435 int big = format / 32;
436 int small = format % 32;
437 if (!(vscreen->caps.caps.v1.render.bitmask[big] & (1 << small)))
438 return FALSE;
439 }
440 }
441
442 if (bind & PIPE_BIND_DEPTH_STENCIL) {
443 if (format_desc->colorspace != UTIL_FORMAT_COLORSPACE_ZS)
444 return FALSE;
445 }
446
447 /*
448 * All other operations (sampling, transfer, etc).
449 */
450
451 if (format_desc->layout == UTIL_FORMAT_LAYOUT_S3TC) {
452 if (util_format_s3tc_enabled)
453 goto out_lookup;
454 return FALSE;
455 }
456 if (format_desc->layout == UTIL_FORMAT_LAYOUT_RGTC) {
457 goto out_lookup;
458 }
459
460 if (format == PIPE_FORMAT_R11G11B10_FLOAT) {
461 goto out_lookup;
462 } else if (format == PIPE_FORMAT_R9G9B9E5_FLOAT) {
463 goto out_lookup;
464 }
465
466 /* Find the first non-VOID channel. */
467 for (i = 0; i < 4; i++) {
468 if (format_desc->channel[i].type != UTIL_FORMAT_TYPE_VOID) {
469 break;
470 }
471 }
472
473 if (i == 4)
474 return FALSE;
475
476 /* no L4A4 */
477 if (format_desc->nr_channels < 4 && format_desc->channel[i].size == 4)
478 return FALSE;
479
480 out_lookup:
481 {
482 int big = format / 32;
483 int small = format % 32;
484 if (!(vscreen->caps.caps.v1.sampler.bitmask[big] & (1 << small)))
485 return FALSE;
486 }
487 /*
488 * Everything else should be supported by u_format.
489 */
490 return TRUE;
491 }
492
493 static void virgl_flush_frontbuffer(struct pipe_screen *screen,
494 struct pipe_resource *res,
495 unsigned level, unsigned layer,
496 void *winsys_drawable_handle, struct pipe_box *sub_box)
497 {
498 struct virgl_screen *vscreen = virgl_screen(screen);
499 struct virgl_winsys *vws = vscreen->vws;
500 struct virgl_resource *vres = virgl_resource(res);
501
502 if (vws->flush_frontbuffer)
503 vws->flush_frontbuffer(vws, vres->hw_res, level, layer, winsys_drawable_handle,
504 sub_box);
505 }
506
507 static void virgl_fence_reference(struct pipe_screen *screen,
508 struct pipe_fence_handle **ptr,
509 struct pipe_fence_handle *fence)
510 {
511 struct virgl_screen *vscreen = virgl_screen(screen);
512 struct virgl_winsys *vws = vscreen->vws;
513
514 vws->fence_reference(vws, ptr, fence);
515 }
516
517 static boolean virgl_fence_finish(struct pipe_screen *screen,
518 struct pipe_fence_handle *fence,
519 uint64_t timeout)
520 {
521 struct virgl_screen *vscreen = virgl_screen(screen);
522 struct virgl_winsys *vws = vscreen->vws;
523
524 return vws->fence_wait(vws, fence, timeout);
525 }
526
527 static uint64_t
528 virgl_get_timestamp(struct pipe_screen *_screen)
529 {
530 return os_time_get_nano();
531 }
532
533 static void
534 virgl_destroy_screen(struct pipe_screen *screen)
535 {
536 struct virgl_screen *vscreen = virgl_screen(screen);
537 struct virgl_winsys *vws = vscreen->vws;
538
539 if (vws)
540 vws->destroy(vws);
541 FREE(vscreen);
542 }
543
544 struct pipe_screen *
545 virgl_create_screen(struct virgl_winsys *vws)
546 {
547 struct virgl_screen *screen = CALLOC_STRUCT(virgl_screen);
548
549 if (!screen)
550 return NULL;
551
552 screen->vws = vws;
553 screen->base.get_name = virgl_get_name;
554 screen->base.get_vendor = virgl_get_vendor;
555 screen->base.get_param = virgl_get_param;
556 screen->base.get_shader_param = virgl_get_shader_param;
557 screen->base.get_paramf = virgl_get_paramf;
558 screen->base.is_format_supported = virgl_is_format_supported;
559 screen->base.destroy = virgl_destroy_screen;
560 screen->base.context_create = virgl_context_create;
561 screen->base.flush_frontbuffer = virgl_flush_frontbuffer;
562 screen->base.get_timestamp = virgl_get_timestamp;
563 screen->base.fence_reference = virgl_fence_reference;
564 //screen->base.fence_signalled = virgl_fence_signalled;
565 screen->base.fence_finish = virgl_fence_finish;
566
567 virgl_init_screen_resource_functions(&screen->base);
568
569 vws->get_caps(vws, &screen->caps);
570
571 screen->refcnt = 1;
572
573 util_format_s3tc_init();
574 return &screen->base;
575 }