2 * Copyright 2014, 2015 Red Hat.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
23 #include "util/u_memory.h"
24 #include "util/u_format.h"
25 #include "util/u_format_s3tc.h"
26 #include "util/u_video.h"
27 #include "util/u_math.h"
28 #include "util/os_time.h"
29 #include "pipe/p_defines.h"
30 #include "pipe/p_screen.h"
32 #include "tgsi/tgsi_exec.h"
34 #include "virgl_screen.h"
35 #include "virgl_resource.h"
36 #include "virgl_public.h"
37 #include "virgl_context.h"
40 virgl_get_vendor(struct pipe_screen
*screen
)
47 virgl_get_name(struct pipe_screen
*screen
)
53 virgl_get_param(struct pipe_screen
*screen
, enum pipe_cap param
)
55 struct virgl_screen
*vscreen
= virgl_screen(screen
);
57 case PIPE_CAP_NPOT_TEXTURES
:
61 case PIPE_CAP_ANISOTROPIC_FILTER
:
63 case PIPE_CAP_POINT_SPRITE
:
65 case PIPE_CAP_MAX_RENDER_TARGETS
:
66 return vscreen
->caps
.caps
.v1
.max_render_targets
;
67 case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS
:
68 return vscreen
->caps
.caps
.v1
.max_dual_source_render_targets
;
69 case PIPE_CAP_OCCLUSION_QUERY
:
70 return vscreen
->caps
.caps
.v1
.bset
.occlusion_query
;
71 case PIPE_CAP_TEXTURE_MIRROR_CLAMP
:
72 return vscreen
->caps
.caps
.v1
.bset
.mirror_clamp
;
73 case PIPE_CAP_TEXTURE_SWIZZLE
:
75 case PIPE_CAP_MAX_TEXTURE_2D_LEVELS
:
76 if (vscreen
->caps
.caps
.v2
.max_texture_2d_size
)
77 return 1 + util_logbase2(vscreen
->caps
.caps
.v2
.max_texture_2d_size
);
78 return 15; /* 16K x 16K */
79 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS
:
80 if (vscreen
->caps
.caps
.v2
.max_texture_3d_size
)
81 return 1 + util_logbase2(vscreen
->caps
.caps
.v2
.max_texture_3d_size
);
82 return 9; /* 256 x 256 x 256 */
83 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS
:
84 if (vscreen
->caps
.caps
.v2
.max_texture_cube_size
)
85 return 1 + util_logbase2(vscreen
->caps
.caps
.v2
.max_texture_cube_size
);
86 return 13; /* 4K x 4K */
87 case PIPE_CAP_BLEND_EQUATION_SEPARATE
:
89 case PIPE_CAP_INDEP_BLEND_ENABLE
:
90 return vscreen
->caps
.caps
.v1
.bset
.indep_blend_enable
;
91 case PIPE_CAP_INDEP_BLEND_FUNC
:
92 return vscreen
->caps
.caps
.v1
.bset
.indep_blend_func
;
93 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT
:
94 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER
:
95 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER
:
97 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT
:
98 return vscreen
->caps
.caps
.v1
.bset
.fragment_coord_conventions
;
99 case PIPE_CAP_DEPTH_CLIP_DISABLE
:
100 return vscreen
->caps
.caps
.v1
.bset
.depth_clip_disable
;
101 case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS
:
102 return vscreen
->caps
.caps
.v1
.max_streamout_buffers
;
103 case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS
:
104 case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS
:
106 case PIPE_CAP_PRIMITIVE_RESTART
:
107 return vscreen
->caps
.caps
.v1
.bset
.primitive_restart
;
108 case PIPE_CAP_SHADER_STENCIL_EXPORT
:
109 return vscreen
->caps
.caps
.v1
.bset
.shader_stencil_export
;
110 case PIPE_CAP_TGSI_INSTANCEID
:
111 case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR
:
113 case PIPE_CAP_SEAMLESS_CUBE_MAP
:
114 return vscreen
->caps
.caps
.v1
.bset
.seamless_cube_map
;
115 case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE
:
116 return vscreen
->caps
.caps
.v1
.bset
.seamless_cube_map_per_texture
;
117 case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS
:
118 return vscreen
->caps
.caps
.v1
.max_texture_array_layers
;
119 case PIPE_CAP_MIN_TEXEL_OFFSET
:
120 return vscreen
->caps
.caps
.v2
.min_texel_offset
;
121 case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET
:
122 return vscreen
->caps
.caps
.v2
.min_texture_gather_offset
;
123 case PIPE_CAP_MAX_TEXEL_OFFSET
:
124 return vscreen
->caps
.caps
.v2
.max_texel_offset
;
125 case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET
:
126 return vscreen
->caps
.caps
.v2
.max_texture_gather_offset
;
127 case PIPE_CAP_CONDITIONAL_RENDER
:
128 return vscreen
->caps
.caps
.v1
.bset
.conditional_render
;
129 case PIPE_CAP_TEXTURE_BARRIER
:
130 return vscreen
->caps
.caps
.v2
.capability_bits
& VIRGL_CAP_TEXTURE_BARRIER
;
131 case PIPE_CAP_VERTEX_COLOR_UNCLAMPED
:
133 case PIPE_CAP_FRAGMENT_COLOR_CLAMPED
:
134 case PIPE_CAP_VERTEX_COLOR_CLAMPED
:
135 return vscreen
->caps
.caps
.v1
.bset
.color_clamping
;
136 case PIPE_CAP_MIXED_COLORBUFFER_FORMATS
:
138 case PIPE_CAP_GLSL_FEATURE_LEVEL
:
139 return vscreen
->caps
.caps
.v1
.glsl_level
;
140 case PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY
:
141 return MIN2(vscreen
->caps
.caps
.v1
.glsl_level
, 140);
142 case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION
:
144 case PIPE_CAP_COMPUTE
:
145 return vscreen
->caps
.caps
.v2
.capability_bits
& VIRGL_CAP_COMPUTE_SHADER
;
146 case PIPE_CAP_USER_VERTEX_BUFFERS
:
148 case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT
:
149 return vscreen
->caps
.caps
.v2
.uniform_buffer_offset_alignment
;
150 case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME
:
151 case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS
:
152 return vscreen
->caps
.caps
.v1
.bset
.streamout_pause_resume
;
153 case PIPE_CAP_START_INSTANCE
:
154 return vscreen
->caps
.caps
.v1
.bset
.start_instance
;
155 case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS
:
156 case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY
:
157 case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY
:
158 case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY
:
159 case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER
:
161 case PIPE_CAP_QUERY_TIMESTAMP
:
163 case PIPE_CAP_QUERY_TIME_ELAPSED
:
165 case PIPE_CAP_TGSI_TEXCOORD
:
167 case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT
:
168 return VIRGL_MAP_BUFFER_ALIGNMENT
;
169 case PIPE_CAP_TEXTURE_BUFFER_OBJECTS
:
170 return vscreen
->caps
.caps
.v1
.max_tbo_size
> 0;
171 case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT
:
172 return vscreen
->caps
.caps
.v2
.texture_buffer_offset_alignment
;
173 case PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY
:
175 case PIPE_CAP_CUBE_MAP_ARRAY
:
176 return vscreen
->caps
.caps
.v1
.bset
.cube_map_array
;
177 case PIPE_CAP_TEXTURE_MULTISAMPLE
:
178 return vscreen
->caps
.caps
.v1
.bset
.texture_multisample
;
179 case PIPE_CAP_MAX_VIEWPORTS
:
180 return vscreen
->caps
.caps
.v1
.max_viewports
;
181 case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE
:
182 return vscreen
->caps
.caps
.v1
.max_tbo_size
;
183 case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK
:
184 case PIPE_CAP_QUERY_PIPELINE_STATISTICS
:
185 case PIPE_CAP_ENDIANNESS
:
187 case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES
:
188 case PIPE_CAP_MIXED_COLOR_DEPTH_BITS
:
190 case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT
:
192 case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES
:
193 return vscreen
->caps
.caps
.v2
.max_geom_output_vertices
;
194 case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS
:
195 return vscreen
->caps
.caps
.v2
.max_geom_total_output_components
;
196 case PIPE_CAP_TEXTURE_QUERY_LOD
:
197 return vscreen
->caps
.caps
.v1
.bset
.texture_query_lod
;
198 case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS
:
199 return vscreen
->caps
.caps
.v1
.max_texture_gather_components
;
200 case PIPE_CAP_DRAW_INDIRECT
:
201 return vscreen
->caps
.caps
.v1
.bset
.has_indirect_draw
;
202 case PIPE_CAP_SAMPLE_SHADING
:
203 case PIPE_CAP_FORCE_PERSAMPLE_INTERP
:
204 return vscreen
->caps
.caps
.v1
.bset
.has_sample_shading
;
205 case PIPE_CAP_CULL_DISTANCE
:
206 return vscreen
->caps
.caps
.v1
.bset
.has_cull
;
207 case PIPE_CAP_MAX_VERTEX_STREAMS
:
208 return vscreen
->caps
.caps
.v1
.glsl_level
>= 400 ? 4 : 1;
209 case PIPE_CAP_CONDITIONAL_RENDER_INVERTED
:
210 return vscreen
->caps
.caps
.v1
.bset
.conditional_render_inverted
;
211 case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE
:
212 return vscreen
->caps
.caps
.v1
.bset
.derivative_control
;
213 case PIPE_CAP_POLYGON_OFFSET_CLAMP
:
214 return vscreen
->caps
.caps
.v1
.bset
.polygon_offset_clamp
;
215 case PIPE_CAP_QUERY_SO_OVERFLOW
:
216 return vscreen
->caps
.caps
.v1
.bset
.transform_feedback_overflow_query
;
217 case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT
:
218 return vscreen
->caps
.caps
.v2
.shader_buffer_offset_alignment
;
219 case PIPE_CAP_DOUBLES
:
220 return vscreen
->caps
.caps
.v1
.bset
.has_fp64
;
221 case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS
:
222 return vscreen
->caps
.caps
.v2
.max_shader_patch_varyings
;
223 case PIPE_CAP_SAMPLER_VIEW_TARGET
:
224 return vscreen
->caps
.caps
.v2
.capability_bits
& VIRGL_CAP_TEXTURE_VIEW
;
225 case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE
:
226 return vscreen
->caps
.caps
.v2
.max_vertex_attrib_stride
;
227 case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS
:
228 return vscreen
->caps
.caps
.v2
.capability_bits
& VIRGL_CAP_COPY_IMAGE
;
229 case PIPE_CAP_TGSI_TXQS
:
230 return vscreen
->caps
.caps
.v2
.capability_bits
& VIRGL_CAP_TXQS
;
231 case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT
:
232 return vscreen
->caps
.caps
.v2
.capability_bits
& VIRGL_CAP_FB_NO_ATTACH
;
233 case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR
:
234 return vscreen
->caps
.caps
.v2
.capability_bits
& VIRGL_CAP_ROBUST_BUFFER_ACCESS
;
235 case PIPE_CAP_TGSI_FS_FBFETCH
:
236 return vscreen
->caps
.caps
.v2
.capability_bits
& VIRGL_CAP_TGSI_FBFETCH
;
237 case PIPE_CAP_TGSI_CLOCK
:
238 return vscreen
->caps
.caps
.v2
.capability_bits
& VIRGL_CAP_SHADER_CLOCK
;
239 case PIPE_CAP_TGSI_ARRAY_COMPONENTS
:
240 return vscreen
->caps
.caps
.v2
.capability_bits
& VIRGL_CAP_TGSI_COMPONENTS
;
241 case PIPE_CAP_TEXTURE_GATHER_SM5
:
242 case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT
:
243 case PIPE_CAP_FAKE_SW_MSAA
:
244 case PIPE_CAP_TEXTURE_GATHER_OFFSETS
:
245 case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION
:
246 case PIPE_CAP_MULTI_DRAW_INDIRECT
:
247 case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS
:
248 case PIPE_CAP_CLIP_HALFZ
:
249 case PIPE_CAP_VERTEXID_NOBASE
:
250 case PIPE_CAP_MULTISAMPLE_Z_RESOLVE
:
251 case PIPE_CAP_RESOURCE_FROM_USER_MEMORY
:
252 case PIPE_CAP_DEVICE_RESET_STATUS_QUERY
:
253 case PIPE_CAP_TEXTURE_FLOAT_LINEAR
:
254 case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR
:
255 case PIPE_CAP_DEPTH_BOUNDS_TEST
:
256 case PIPE_CAP_SHAREABLE_SHADERS
:
257 case PIPE_CAP_CLEAR_TEXTURE
:
258 case PIPE_CAP_DRAW_PARAMETERS
:
259 case PIPE_CAP_TGSI_PACK_HALF_FLOAT
:
260 case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL
:
261 case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL
:
262 case PIPE_CAP_INVALIDATE_BUFFER
:
263 case PIPE_CAP_GENERATE_MIPMAP
:
264 case PIPE_CAP_SURFACE_REINTERPRET_BLOCKS
:
265 case PIPE_CAP_QUERY_BUFFER_OBJECT
:
266 case PIPE_CAP_STRING_MARKER
:
267 case PIPE_CAP_QUERY_MEMORY_INFO
:
268 case PIPE_CAP_PCI_GROUP
:
269 case PIPE_CAP_PCI_BUS
:
270 case PIPE_CAP_PCI_DEVICE
:
271 case PIPE_CAP_PCI_FUNCTION
:
272 case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES
:
273 case PIPE_CAP_TGSI_VOTE
:
274 case PIPE_CAP_MAX_WINDOW_RECTANGLES
:
275 case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED
:
276 case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS
:
277 case PIPE_CAP_TGSI_CAN_READ_OUTPUTS
:
278 case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY
:
279 case PIPE_CAP_TGSI_MUL_ZERO_WINS
:
281 case PIPE_CAP_INT64_DIVMOD
:
282 case PIPE_CAP_TGSI_TEX_TXF_LZ
:
283 case PIPE_CAP_POLYGON_MODE_FILL_RECTANGLE
:
284 case PIPE_CAP_SPARSE_BUFFER_PAGE_SIZE
:
285 case PIPE_CAP_TGSI_BALLOT
:
286 case PIPE_CAP_TGSI_TES_LAYER_VIEWPORT
:
287 case PIPE_CAP_CAN_BIND_CONST_BUFFER_AS_VERTEX
:
288 case PIPE_CAP_ALLOW_MAPPED_BUFFERS_DURING_EXECUTION
:
289 case PIPE_CAP_POST_DEPTH_COVERAGE
:
290 case PIPE_CAP_BINDLESS_TEXTURE
:
291 case PIPE_CAP_NIR_SAMPLERS_AS_DEREF
:
292 case PIPE_CAP_MEMOBJ
:
293 case PIPE_CAP_LOAD_CONSTBUF
:
294 case PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS
:
295 case PIPE_CAP_TILE_RASTER_ORDER
:
296 case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES
:
297 case PIPE_CAP_FRAMEBUFFER_MSAA_CONSTRAINTS
:
298 case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET
:
299 case PIPE_CAP_CONTEXT_PRIORITY_MASK
:
300 case PIPE_CAP_FENCE_SIGNAL
:
301 case PIPE_CAP_CONSTBUF0_FLAGS
:
302 case PIPE_CAP_PACKED_UNIFORMS
:
303 case PIPE_CAP_CONSERVATIVE_RASTER_POST_SNAP_TRIANGLES
:
304 case PIPE_CAP_CONSERVATIVE_RASTER_POST_SNAP_POINTS_LINES
:
305 case PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_TRIANGLES
:
306 case PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_POINTS_LINES
:
307 case PIPE_CAP_CONSERVATIVE_RASTER_POST_DEPTH_COVERAGE
:
308 case PIPE_CAP_MAX_CONSERVATIVE_RASTER_SUBPIXEL_PRECISION_BIAS
:
309 case PIPE_CAP_PROGRAMMABLE_SAMPLE_LOCATIONS
:
311 case PIPE_CAP_MAX_GS_INVOCATIONS
:
313 case PIPE_CAP_MAX_SHADER_BUFFER_SIZE
:
315 case PIPE_CAP_VENDOR_ID
:
317 case PIPE_CAP_DEVICE_ID
:
319 case PIPE_CAP_ACCELERATED
:
322 case PIPE_CAP_VIDEO_MEMORY
:
324 case PIPE_CAP_NATIVE_FENCE_FD
:
327 /* should only get here on unhandled cases */
328 debug_printf("Unexpected PIPE_CAP %d query\n", param
);
333 virgl_get_shader_param(struct pipe_screen
*screen
,
334 enum pipe_shader_type shader
,
335 enum pipe_shader_cap param
)
337 struct virgl_screen
*vscreen
= virgl_screen(screen
);
339 if ((shader
== PIPE_SHADER_TESS_CTRL
|| shader
== PIPE_SHADER_TESS_EVAL
) &&
340 !vscreen
->caps
.caps
.v1
.bset
.has_tessellation_shaders
)
343 if (shader
== PIPE_SHADER_COMPUTE
&&
344 !(vscreen
->caps
.caps
.v2
.capability_bits
& VIRGL_CAP_COMPUTE_SHADER
))
349 case PIPE_SHADER_FRAGMENT
:
350 case PIPE_SHADER_VERTEX
:
351 case PIPE_SHADER_GEOMETRY
:
352 case PIPE_SHADER_TESS_CTRL
:
353 case PIPE_SHADER_TESS_EVAL
:
354 case PIPE_SHADER_COMPUTE
:
356 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS
:
357 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS
:
358 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS
:
359 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS
:
361 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR
:
362 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR
:
363 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR
:
365 case PIPE_SHADER_CAP_MAX_INPUTS
:
366 if (vscreen
->caps
.caps
.v1
.glsl_level
< 150)
367 return vscreen
->caps
.caps
.v2
.max_vertex_attribs
;
368 return (shader
== PIPE_SHADER_VERTEX
||
369 shader
== PIPE_SHADER_GEOMETRY
) ? vscreen
->caps
.caps
.v2
.max_vertex_attribs
: 32;
370 case PIPE_SHADER_CAP_MAX_OUTPUTS
:
371 if (shader
== PIPE_SHADER_FRAGMENT
)
372 return vscreen
->caps
.caps
.v1
.max_render_targets
;
373 return vscreen
->caps
.caps
.v2
.max_vertex_outputs
;
374 // case PIPE_SHADER_CAP_MAX_CONSTS:
376 case PIPE_SHADER_CAP_MAX_TEMPS
:
378 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS
:
379 return vscreen
->caps
.caps
.v1
.max_uniform_blocks
;
380 // case PIPE_SHADER_CAP_MAX_ADDRS:
382 case PIPE_SHADER_CAP_SUBROUTINES
:
384 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS
:
386 case PIPE_SHADER_CAP_INTEGERS
:
387 return vscreen
->caps
.caps
.v1
.glsl_level
>= 130;
388 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH
:
390 case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE
:
391 return 4096 * sizeof(float[4]);
392 case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS
:
393 if (shader
== PIPE_SHADER_FRAGMENT
|| shader
== PIPE_SHADER_COMPUTE
)
394 return vscreen
->caps
.caps
.v2
.max_shader_buffer_frag_compute
;
396 return vscreen
->caps
.caps
.v2
.max_shader_buffer_other_stages
;
397 case PIPE_SHADER_CAP_MAX_SHADER_IMAGES
:
398 if (shader
== PIPE_SHADER_FRAGMENT
|| shader
== PIPE_SHADER_COMPUTE
)
399 return vscreen
->caps
.caps
.v2
.max_shader_image_frag_compute
;
401 return vscreen
->caps
.caps
.v2
.max_shader_image_other_stages
;
402 case PIPE_SHADER_CAP_SUPPORTED_IRS
:
403 return (1 << PIPE_SHADER_IR_TGSI
);
404 case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD
:
405 case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS
:
406 case PIPE_SHADER_CAP_INT64_ATOMICS
:
407 case PIPE_SHADER_CAP_FP16
:
408 case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS
:
409 case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS
:
411 case PIPE_SHADER_CAP_SCALAR_ISA
:
422 virgl_get_paramf(struct pipe_screen
*screen
, enum pipe_capf param
)
424 struct virgl_screen
*vscreen
= virgl_screen(screen
);
426 case PIPE_CAPF_MAX_LINE_WIDTH
:
427 return vscreen
->caps
.caps
.v2
.max_aliased_line_width
;
428 case PIPE_CAPF_MAX_LINE_WIDTH_AA
:
429 return vscreen
->caps
.caps
.v2
.max_smooth_line_width
;
430 case PIPE_CAPF_MAX_POINT_WIDTH
:
431 return vscreen
->caps
.caps
.v2
.max_aliased_point_size
;
432 case PIPE_CAPF_MAX_POINT_WIDTH_AA
:
433 return vscreen
->caps
.caps
.v2
.max_smooth_point_size
;
434 case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY
:
436 case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS
:
437 return vscreen
->caps
.caps
.v2
.max_texture_lod_bias
;
438 case PIPE_CAPF_MIN_CONSERVATIVE_RASTER_DILATE
:
439 case PIPE_CAPF_MAX_CONSERVATIVE_RASTER_DILATE
:
440 case PIPE_CAPF_CONSERVATIVE_RASTER_DILATE_GRANULARITY
:
443 /* should only get here on unhandled cases */
444 debug_printf("Unexpected PIPE_CAPF %d query\n", param
);
449 virgl_get_compute_param(struct pipe_screen
*screen
,
450 enum pipe_shader_ir ir_type
,
451 enum pipe_compute_cap param
,
454 struct virgl_screen
*vscreen
= virgl_screen(screen
);
455 if (!(vscreen
->caps
.caps
.v2
.capability_bits
& VIRGL_CAP_COMPUTE_SHADER
))
458 case PIPE_COMPUTE_CAP_MAX_GRID_SIZE
:
460 uint64_t *grid_size
= ret
;
461 grid_size
[0] = vscreen
->caps
.caps
.v2
.max_compute_grid_size
[0];
462 grid_size
[1] = vscreen
->caps
.caps
.v2
.max_compute_grid_size
[1];
463 grid_size
[2] = vscreen
->caps
.caps
.v2
.max_compute_grid_size
[2];
465 return 3 * sizeof(uint64_t) ;
466 case PIPE_COMPUTE_CAP_MAX_BLOCK_SIZE
:
468 uint64_t *block_size
= ret
;
469 block_size
[0] = vscreen
->caps
.caps
.v2
.max_compute_block_size
[0];
470 block_size
[1] = vscreen
->caps
.caps
.v2
.max_compute_block_size
[1];
471 block_size
[2] = vscreen
->caps
.caps
.v2
.max_compute_block_size
[2];
473 return 3 * sizeof(uint64_t);
474 case PIPE_COMPUTE_CAP_MAX_THREADS_PER_BLOCK
:
476 uint64_t *max_threads_per_block
= ret
;
477 *max_threads_per_block
= vscreen
->caps
.caps
.v2
.max_compute_work_group_invocations
;
479 return sizeof(uint64_t);
480 case PIPE_COMPUTE_CAP_MAX_LOCAL_SIZE
:
482 uint64_t *max_local_size
= ret
;
483 /* Value reported by the closed source driver. */
484 *max_local_size
= vscreen
->caps
.caps
.v2
.max_compute_shared_memory_size
;
486 return sizeof(uint64_t);
494 virgl_is_vertex_format_supported(struct pipe_screen
*screen
,
495 enum pipe_format format
)
497 struct virgl_screen
*vscreen
= virgl_screen(screen
);
498 const struct util_format_description
*format_desc
;
501 format_desc
= util_format_description(format
);
505 if (format
== PIPE_FORMAT_R11G11B10_FLOAT
) {
506 int vformat
= VIRGL_FORMAT_R11G11B10_FLOAT
;
507 int big
= vformat
/ 32;
508 int small
= vformat
% 32;
509 if (!(vscreen
->caps
.caps
.v1
.vertexbuffer
.bitmask
[big
] & (1 << small
)))
514 /* Find the first non-VOID channel. */
515 for (i
= 0; i
< 4; i
++) {
516 if (format_desc
->channel
[i
].type
!= UTIL_FORMAT_TYPE_VOID
) {
524 if (format_desc
->layout
!= UTIL_FORMAT_LAYOUT_PLAIN
)
527 if (format_desc
->channel
[i
].type
== UTIL_FORMAT_TYPE_FIXED
)
533 * Query format support for creating a texture, drawing surface, etc.
534 * \param format the format to test
535 * \param type one of PIPE_TEXTURE, PIPE_SURFACE
538 virgl_is_format_supported( struct pipe_screen
*screen
,
539 enum pipe_format format
,
540 enum pipe_texture_target target
,
541 unsigned sample_count
,
542 unsigned storage_sample_count
,
545 struct virgl_screen
*vscreen
= virgl_screen(screen
);
546 const struct util_format_description
*format_desc
;
549 if (MAX2(1, sample_count
) != MAX2(1, storage_sample_count
))
552 assert(target
== PIPE_BUFFER
||
553 target
== PIPE_TEXTURE_1D
||
554 target
== PIPE_TEXTURE_1D_ARRAY
||
555 target
== PIPE_TEXTURE_2D
||
556 target
== PIPE_TEXTURE_2D_ARRAY
||
557 target
== PIPE_TEXTURE_RECT
||
558 target
== PIPE_TEXTURE_3D
||
559 target
== PIPE_TEXTURE_CUBE
||
560 target
== PIPE_TEXTURE_CUBE_ARRAY
);
562 format_desc
= util_format_description(format
);
566 if (util_format_is_intensity(format
))
569 if (sample_count
> 1) {
570 if (!vscreen
->caps
.caps
.v1
.bset
.texture_multisample
)
573 if (bind
& PIPE_BIND_SHADER_IMAGE
) {
574 if (sample_count
> vscreen
->caps
.caps
.v2
.max_image_samples
)
578 if (sample_count
> vscreen
->caps
.caps
.v1
.max_samples
)
582 if (bind
& PIPE_BIND_VERTEX_BUFFER
) {
583 return virgl_is_vertex_format_supported(screen
, format
);
586 /* Allow 3-comp 32 bit textures only for TBOs (needed for ARB_tbo_rgb32) */
587 if ((format
== PIPE_FORMAT_R32G32B32_FLOAT
||
588 format
== PIPE_FORMAT_R32G32B32_SINT
||
589 format
== PIPE_FORMAT_R32G32B32_UINT
) &&
590 target
!= PIPE_BUFFER
)
593 if (bind
& PIPE_BIND_RENDER_TARGET
) {
594 /* For ARB_framebuffer_no_attachments. */
595 if (format
== PIPE_FORMAT_NONE
)
598 if (format_desc
->colorspace
== UTIL_FORMAT_COLORSPACE_ZS
)
602 * Although possible, it is unnatural to render into compressed or YUV
603 * surfaces. So disable these here to avoid going into weird paths
604 * inside the state trackers.
606 if (format_desc
->block
.width
!= 1 ||
607 format_desc
->block
.height
!= 1)
611 int big
= format
/ 32;
612 int small
= format
% 32;
613 if (!(vscreen
->caps
.caps
.v1
.render
.bitmask
[big
] & (1 << small
)))
618 if (bind
& PIPE_BIND_DEPTH_STENCIL
) {
619 if (format_desc
->colorspace
!= UTIL_FORMAT_COLORSPACE_ZS
)
624 * All other operations (sampling, transfer, etc).
627 if (format_desc
->layout
== UTIL_FORMAT_LAYOUT_S3TC
) {
630 if (format_desc
->layout
== UTIL_FORMAT_LAYOUT_RGTC
) {
633 if (format_desc
->layout
== UTIL_FORMAT_LAYOUT_BPTC
) {
637 if (format
== PIPE_FORMAT_R11G11B10_FLOAT
) {
639 } else if (format
== PIPE_FORMAT_R9G9B9E5_FLOAT
) {
643 /* Find the first non-VOID channel. */
644 for (i
= 0; i
< 4; i
++) {
645 if (format_desc
->channel
[i
].type
!= UTIL_FORMAT_TYPE_VOID
) {
654 if (format_desc
->nr_channels
< 4 && format_desc
->channel
[i
].size
== 4)
659 int big
= format
/ 32;
660 int small
= format
% 32;
661 if (!(vscreen
->caps
.caps
.v1
.sampler
.bitmask
[big
] & (1 << small
)))
665 * Everything else should be supported by u_format.
670 static void virgl_flush_frontbuffer(struct pipe_screen
*screen
,
671 struct pipe_resource
*res
,
672 unsigned level
, unsigned layer
,
673 void *winsys_drawable_handle
, struct pipe_box
*sub_box
)
675 struct virgl_screen
*vscreen
= virgl_screen(screen
);
676 struct virgl_winsys
*vws
= vscreen
->vws
;
677 struct virgl_resource
*vres
= virgl_resource(res
);
679 if (vws
->flush_frontbuffer
)
680 vws
->flush_frontbuffer(vws
, vres
->hw_res
, level
, layer
, winsys_drawable_handle
,
684 static void virgl_fence_reference(struct pipe_screen
*screen
,
685 struct pipe_fence_handle
**ptr
,
686 struct pipe_fence_handle
*fence
)
688 struct virgl_screen
*vscreen
= virgl_screen(screen
);
689 struct virgl_winsys
*vws
= vscreen
->vws
;
691 vws
->fence_reference(vws
, ptr
, fence
);
694 static boolean
virgl_fence_finish(struct pipe_screen
*screen
,
695 struct pipe_context
*ctx
,
696 struct pipe_fence_handle
*fence
,
699 struct virgl_screen
*vscreen
= virgl_screen(screen
);
700 struct virgl_winsys
*vws
= vscreen
->vws
;
702 return vws
->fence_wait(vws
, fence
, timeout
);
706 virgl_get_timestamp(struct pipe_screen
*_screen
)
708 return os_time_get_nano();
712 virgl_destroy_screen(struct pipe_screen
*screen
)
714 struct virgl_screen
*vscreen
= virgl_screen(screen
);
715 struct virgl_winsys
*vws
= vscreen
->vws
;
717 slab_destroy_parent(&vscreen
->texture_transfer_pool
);
725 virgl_create_screen(struct virgl_winsys
*vws
)
727 struct virgl_screen
*screen
= CALLOC_STRUCT(virgl_screen
);
733 screen
->base
.get_name
= virgl_get_name
;
734 screen
->base
.get_vendor
= virgl_get_vendor
;
735 screen
->base
.get_param
= virgl_get_param
;
736 screen
->base
.get_shader_param
= virgl_get_shader_param
;
737 screen
->base
.get_compute_param
= virgl_get_compute_param
;
738 screen
->base
.get_paramf
= virgl_get_paramf
;
739 screen
->base
.is_format_supported
= virgl_is_format_supported
;
740 screen
->base
.destroy
= virgl_destroy_screen
;
741 screen
->base
.context_create
= virgl_context_create
;
742 screen
->base
.flush_frontbuffer
= virgl_flush_frontbuffer
;
743 screen
->base
.get_timestamp
= virgl_get_timestamp
;
744 screen
->base
.fence_reference
= virgl_fence_reference
;
745 //screen->base.fence_signalled = virgl_fence_signalled;
746 screen
->base
.fence_finish
= virgl_fence_finish
;
748 virgl_init_screen_resource_functions(&screen
->base
);
750 vws
->get_caps(vws
, &screen
->caps
);
754 slab_create_parent(&screen
->texture_transfer_pool
, sizeof(struct virgl_transfer
), 16);
756 return &screen
->base
;