virgl: use hw-atomics instead of in-ssbo ones
[mesa.git] / src / gallium / drivers / virgl / virgl_screen.c
1 /*
2 * Copyright 2014, 2015 Red Hat.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 */
23 #include "util/u_memory.h"
24 #include "util/u_format.h"
25 #include "util/u_format_s3tc.h"
26 #include "util/u_screen.h"
27 #include "util/u_video.h"
28 #include "util/u_math.h"
29 #include "util/os_time.h"
30 #include "pipe/p_defines.h"
31 #include "pipe/p_screen.h"
32
33 #include "tgsi/tgsi_exec.h"
34
35 #include "virgl_screen.h"
36 #include "virgl_resource.h"
37 #include "virgl_public.h"
38 #include "virgl_context.h"
39
40 int virgl_debug = 0;
41 static const struct debug_named_value debug_options[] = {
42 { "verbose", VIRGL_DEBUG_VERBOSE, NULL },
43 { "tgsi", VIRGL_DEBUG_TGSI, NULL },
44 DEBUG_NAMED_VALUE_END
45 };
46 DEBUG_GET_ONCE_FLAGS_OPTION(virgl_debug, "VIRGL_DEBUG", debug_options, 0)
47
48 static const char *
49 virgl_get_vendor(struct pipe_screen *screen)
50 {
51 return "Red Hat";
52 }
53
54
55 static const char *
56 virgl_get_name(struct pipe_screen *screen)
57 {
58 return "virgl";
59 }
60
61 static int
62 virgl_get_param(struct pipe_screen *screen, enum pipe_cap param)
63 {
64 struct virgl_screen *vscreen = virgl_screen(screen);
65 switch (param) {
66 case PIPE_CAP_NPOT_TEXTURES:
67 return 1;
68 case PIPE_CAP_SM3:
69 return 1;
70 case PIPE_CAP_ANISOTROPIC_FILTER:
71 return 1;
72 case PIPE_CAP_POINT_SPRITE:
73 return 1;
74 case PIPE_CAP_MAX_RENDER_TARGETS:
75 return vscreen->caps.caps.v1.max_render_targets;
76 case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
77 return vscreen->caps.caps.v1.max_dual_source_render_targets;
78 case PIPE_CAP_OCCLUSION_QUERY:
79 return vscreen->caps.caps.v1.bset.occlusion_query;
80 case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
81 case PIPE_CAP_TEXTURE_MIRROR_CLAMP_TO_EDGE:
82 return vscreen->caps.caps.v1.bset.mirror_clamp;
83 case PIPE_CAP_TEXTURE_SWIZZLE:
84 return 1;
85 case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
86 if (vscreen->caps.caps.v2.max_texture_2d_size)
87 return 1 + util_logbase2(vscreen->caps.caps.v2.max_texture_2d_size);
88 return 15; /* 16K x 16K */
89 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
90 if (vscreen->caps.caps.v2.max_texture_3d_size)
91 return 1 + util_logbase2(vscreen->caps.caps.v2.max_texture_3d_size);
92 return 9; /* 256 x 256 x 256 */
93 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
94 if (vscreen->caps.caps.v2.max_texture_cube_size)
95 return 1 + util_logbase2(vscreen->caps.caps.v2.max_texture_cube_size);
96 return 13; /* 4K x 4K */
97 case PIPE_CAP_BLEND_EQUATION_SEPARATE:
98 return 1;
99 case PIPE_CAP_INDEP_BLEND_ENABLE:
100 return vscreen->caps.caps.v1.bset.indep_blend_enable;
101 case PIPE_CAP_INDEP_BLEND_FUNC:
102 return vscreen->caps.caps.v1.bset.indep_blend_func;
103 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
104 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
105 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
106 return 1;
107 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
108 return vscreen->caps.caps.v1.bset.fragment_coord_conventions;
109 case PIPE_CAP_DEPTH_CLIP_DISABLE:
110 return vscreen->caps.caps.v1.bset.depth_clip_disable;
111 case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
112 return vscreen->caps.caps.v1.max_streamout_buffers;
113 case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
114 case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
115 return 16*4;
116 case PIPE_CAP_PRIMITIVE_RESTART:
117 return vscreen->caps.caps.v1.bset.primitive_restart;
118 case PIPE_CAP_SHADER_STENCIL_EXPORT:
119 return vscreen->caps.caps.v1.bset.shader_stencil_export;
120 case PIPE_CAP_TGSI_INSTANCEID:
121 case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
122 return 1;
123 case PIPE_CAP_SEAMLESS_CUBE_MAP:
124 return vscreen->caps.caps.v1.bset.seamless_cube_map;
125 case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
126 return vscreen->caps.caps.v1.bset.seamless_cube_map_per_texture;
127 case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
128 return vscreen->caps.caps.v1.max_texture_array_layers;
129 case PIPE_CAP_MIN_TEXEL_OFFSET:
130 return vscreen->caps.caps.v2.min_texel_offset;
131 case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
132 return vscreen->caps.caps.v2.min_texture_gather_offset;
133 case PIPE_CAP_MAX_TEXEL_OFFSET:
134 return vscreen->caps.caps.v2.max_texel_offset;
135 case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
136 return vscreen->caps.caps.v2.max_texture_gather_offset;
137 case PIPE_CAP_CONDITIONAL_RENDER:
138 return vscreen->caps.caps.v1.bset.conditional_render;
139 case PIPE_CAP_TEXTURE_BARRIER:
140 return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_TEXTURE_BARRIER;
141 case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
142 return 1;
143 case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
144 case PIPE_CAP_VERTEX_COLOR_CLAMPED:
145 return vscreen->caps.caps.v1.bset.color_clamping;
146 case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
147 return 1;
148 case PIPE_CAP_GLSL_FEATURE_LEVEL:
149 return vscreen->caps.caps.v1.glsl_level;
150 case PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY:
151 return MIN2(vscreen->caps.caps.v1.glsl_level, 140);
152 case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
153 return 0;
154 case PIPE_CAP_COMPUTE:
155 return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_COMPUTE_SHADER;
156 case PIPE_CAP_USER_VERTEX_BUFFERS:
157 return 0;
158 case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
159 return vscreen->caps.caps.v2.uniform_buffer_offset_alignment;
160 case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
161 case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS:
162 return vscreen->caps.caps.v1.bset.streamout_pause_resume;
163 case PIPE_CAP_START_INSTANCE:
164 return vscreen->caps.caps.v1.bset.start_instance;
165 case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
166 case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
167 case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
168 case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
169 case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
170 return 0;
171 case PIPE_CAP_QUERY_TIMESTAMP:
172 return 1;
173 case PIPE_CAP_QUERY_TIME_ELAPSED:
174 return 0;
175 case PIPE_CAP_TGSI_TEXCOORD:
176 return 0;
177 case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
178 return VIRGL_MAP_BUFFER_ALIGNMENT;
179 case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
180 return vscreen->caps.caps.v1.max_tbo_size > 0;
181 case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
182 return vscreen->caps.caps.v2.texture_buffer_offset_alignment;
183 case PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY:
184 return 0;
185 case PIPE_CAP_CUBE_MAP_ARRAY:
186 return vscreen->caps.caps.v1.bset.cube_map_array;
187 case PIPE_CAP_TEXTURE_MULTISAMPLE:
188 return vscreen->caps.caps.v1.bset.texture_multisample;
189 case PIPE_CAP_MAX_VIEWPORTS:
190 return vscreen->caps.caps.v1.max_viewports;
191 case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
192 return vscreen->caps.caps.v1.max_tbo_size;
193 case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
194 case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
195 case PIPE_CAP_ENDIANNESS:
196 return 0;
197 case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
198 case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
199 return 1;
200 case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
201 return 0;
202 case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
203 return vscreen->caps.caps.v2.max_geom_output_vertices;
204 case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
205 return vscreen->caps.caps.v2.max_geom_total_output_components;
206 case PIPE_CAP_TEXTURE_QUERY_LOD:
207 return vscreen->caps.caps.v1.bset.texture_query_lod;
208 case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
209 return vscreen->caps.caps.v1.max_texture_gather_components;
210 case PIPE_CAP_DRAW_INDIRECT:
211 return vscreen->caps.caps.v1.bset.has_indirect_draw;
212 case PIPE_CAP_SAMPLE_SHADING:
213 case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
214 return vscreen->caps.caps.v1.bset.has_sample_shading;
215 case PIPE_CAP_CULL_DISTANCE:
216 return vscreen->caps.caps.v1.bset.has_cull;
217 case PIPE_CAP_MAX_VERTEX_STREAMS:
218 return vscreen->caps.caps.v1.glsl_level >= 400 ? 4 : 1;
219 case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
220 return vscreen->caps.caps.v1.bset.conditional_render_inverted;
221 case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
222 return vscreen->caps.caps.v1.bset.derivative_control;
223 case PIPE_CAP_POLYGON_OFFSET_CLAMP:
224 return vscreen->caps.caps.v1.bset.polygon_offset_clamp;
225 case PIPE_CAP_QUERY_SO_OVERFLOW:
226 return vscreen->caps.caps.v1.bset.transform_feedback_overflow_query;
227 case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
228 return vscreen->caps.caps.v2.shader_buffer_offset_alignment;
229 case PIPE_CAP_DOUBLES:
230 return vscreen->caps.caps.v1.bset.has_fp64;
231 case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
232 return vscreen->caps.caps.v2.max_shader_patch_varyings;
233 case PIPE_CAP_SAMPLER_VIEW_TARGET:
234 return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_TEXTURE_VIEW;
235 case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
236 return vscreen->caps.caps.v2.max_vertex_attrib_stride;
237 case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
238 return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_COPY_IMAGE;
239 case PIPE_CAP_TGSI_TXQS:
240 return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_TXQS;
241 case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT:
242 return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_FB_NO_ATTACH;
243 case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR:
244 return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_ROBUST_BUFFER_ACCESS;
245 case PIPE_CAP_TGSI_FS_FBFETCH:
246 return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_TGSI_FBFETCH;
247 case PIPE_CAP_TGSI_CLOCK:
248 return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_SHADER_CLOCK;
249 case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
250 return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_TGSI_COMPONENTS;
251 case PIPE_CAP_MAX_COMBINED_SHADER_BUFFERS:
252 return vscreen->caps.caps.v2.max_combined_shader_buffers;
253 case PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTERS:
254 return vscreen->caps.caps.v2.max_combined_atomic_counters;
255 case PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTER_BUFFERS:
256 return vscreen->caps.caps.v2.max_combined_atomic_counter_buffers;
257 case PIPE_CAP_TEXTURE_GATHER_SM5:
258 case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
259 case PIPE_CAP_FAKE_SW_MSAA:
260 case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
261 case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
262 case PIPE_CAP_MULTI_DRAW_INDIRECT:
263 case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS:
264 case PIPE_CAP_CLIP_HALFZ:
265 case PIPE_CAP_VERTEXID_NOBASE:
266 case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
267 case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
268 case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
269 case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
270 case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
271 case PIPE_CAP_DEPTH_BOUNDS_TEST:
272 case PIPE_CAP_SHAREABLE_SHADERS:
273 case PIPE_CAP_CLEAR_TEXTURE:
274 case PIPE_CAP_DRAW_PARAMETERS:
275 case PIPE_CAP_TGSI_PACK_HALF_FLOAT:
276 case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
277 case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
278 case PIPE_CAP_INVALIDATE_BUFFER:
279 case PIPE_CAP_GENERATE_MIPMAP:
280 case PIPE_CAP_SURFACE_REINTERPRET_BLOCKS:
281 case PIPE_CAP_QUERY_BUFFER_OBJECT:
282 case PIPE_CAP_STRING_MARKER:
283 case PIPE_CAP_QUERY_MEMORY_INFO:
284 case PIPE_CAP_PCI_GROUP:
285 case PIPE_CAP_PCI_BUS:
286 case PIPE_CAP_PCI_DEVICE:
287 case PIPE_CAP_PCI_FUNCTION:
288 case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES:
289 case PIPE_CAP_TGSI_VOTE:
290 case PIPE_CAP_MAX_WINDOW_RECTANGLES:
291 case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED:
292 case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS:
293 case PIPE_CAP_TGSI_CAN_READ_OUTPUTS:
294 case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
295 case PIPE_CAP_TGSI_MUL_ZERO_WINS:
296 case PIPE_CAP_INT64:
297 case PIPE_CAP_INT64_DIVMOD:
298 case PIPE_CAP_TGSI_TEX_TXF_LZ:
299 case PIPE_CAP_POLYGON_MODE_FILL_RECTANGLE:
300 case PIPE_CAP_SPARSE_BUFFER_PAGE_SIZE:
301 case PIPE_CAP_TGSI_BALLOT:
302 case PIPE_CAP_TGSI_TES_LAYER_VIEWPORT:
303 case PIPE_CAP_CAN_BIND_CONST_BUFFER_AS_VERTEX:
304 case PIPE_CAP_ALLOW_MAPPED_BUFFERS_DURING_EXECUTION:
305 case PIPE_CAP_POST_DEPTH_COVERAGE:
306 case PIPE_CAP_BINDLESS_TEXTURE:
307 case PIPE_CAP_NIR_SAMPLERS_AS_DEREF:
308 case PIPE_CAP_MEMOBJ:
309 case PIPE_CAP_LOAD_CONSTBUF:
310 case PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS:
311 case PIPE_CAP_TILE_RASTER_ORDER:
312 case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
313 case PIPE_CAP_FRAMEBUFFER_MSAA_CONSTRAINTS:
314 case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
315 case PIPE_CAP_CONTEXT_PRIORITY_MASK:
316 case PIPE_CAP_FENCE_SIGNAL:
317 case PIPE_CAP_CONSTBUF0_FLAGS:
318 case PIPE_CAP_PACKED_UNIFORMS:
319 case PIPE_CAP_CONSERVATIVE_RASTER_POST_SNAP_TRIANGLES:
320 case PIPE_CAP_CONSERVATIVE_RASTER_POST_SNAP_POINTS_LINES:
321 case PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_TRIANGLES:
322 case PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_POINTS_LINES:
323 case PIPE_CAP_CONSERVATIVE_RASTER_POST_DEPTH_COVERAGE:
324 case PIPE_CAP_MAX_CONSERVATIVE_RASTER_SUBPIXEL_PRECISION_BIAS:
325 case PIPE_CAP_PROGRAMMABLE_SAMPLE_LOCATIONS:
326 return 0;
327 case PIPE_CAP_MAX_GS_INVOCATIONS:
328 return 32;
329 case PIPE_CAP_MAX_SHADER_BUFFER_SIZE:
330 return 1 << 27;
331 case PIPE_CAP_VENDOR_ID:
332 return 0x1af4;
333 case PIPE_CAP_DEVICE_ID:
334 return 0x1010;
335 case PIPE_CAP_ACCELERATED:
336 return 1;
337 case PIPE_CAP_UMA:
338 case PIPE_CAP_VIDEO_MEMORY:
339 return 0;
340 case PIPE_CAP_NATIVE_FENCE_FD:
341 return 0;
342 default:
343 return u_pipe_screen_get_param_defaults(screen, param);
344 }
345 }
346
347 static int
348 virgl_get_shader_param(struct pipe_screen *screen,
349 enum pipe_shader_type shader,
350 enum pipe_shader_cap param)
351 {
352 struct virgl_screen *vscreen = virgl_screen(screen);
353
354 if ((shader == PIPE_SHADER_TESS_CTRL || shader == PIPE_SHADER_TESS_EVAL) &&
355 !vscreen->caps.caps.v1.bset.has_tessellation_shaders)
356 return 0;
357
358 if (shader == PIPE_SHADER_COMPUTE &&
359 !(vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_COMPUTE_SHADER))
360 return 0;
361
362 switch(shader)
363 {
364 case PIPE_SHADER_FRAGMENT:
365 case PIPE_SHADER_VERTEX:
366 case PIPE_SHADER_GEOMETRY:
367 case PIPE_SHADER_TESS_CTRL:
368 case PIPE_SHADER_TESS_EVAL:
369 case PIPE_SHADER_COMPUTE:
370 switch (param) {
371 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
372 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
373 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
374 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
375 return INT_MAX;
376 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
377 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
378 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
379 return 1;
380 case PIPE_SHADER_CAP_MAX_INPUTS:
381 if (vscreen->caps.caps.v1.glsl_level < 150)
382 return vscreen->caps.caps.v2.max_vertex_attribs;
383 return (shader == PIPE_SHADER_VERTEX ||
384 shader == PIPE_SHADER_GEOMETRY) ? vscreen->caps.caps.v2.max_vertex_attribs : 32;
385 case PIPE_SHADER_CAP_MAX_OUTPUTS:
386 if (shader == PIPE_SHADER_FRAGMENT)
387 return vscreen->caps.caps.v1.max_render_targets;
388 return vscreen->caps.caps.v2.max_vertex_outputs;
389 // case PIPE_SHADER_CAP_MAX_CONSTS:
390 // return 4096;
391 case PIPE_SHADER_CAP_MAX_TEMPS:
392 return 256;
393 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
394 return vscreen->caps.caps.v1.max_uniform_blocks;
395 // case PIPE_SHADER_CAP_MAX_ADDRS:
396 // return 1;
397 case PIPE_SHADER_CAP_SUBROUTINES:
398 return 1;
399 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
400 return 16;
401 case PIPE_SHADER_CAP_INTEGERS:
402 return vscreen->caps.caps.v1.glsl_level >= 130;
403 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
404 return 32;
405 case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
406 return 4096 * sizeof(float[4]);
407 case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
408 if (shader == PIPE_SHADER_FRAGMENT || shader == PIPE_SHADER_COMPUTE)
409 return vscreen->caps.caps.v2.max_shader_buffer_frag_compute;
410 else
411 return vscreen->caps.caps.v2.max_shader_buffer_other_stages;
412 case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
413 if (shader == PIPE_SHADER_FRAGMENT || shader == PIPE_SHADER_COMPUTE)
414 return vscreen->caps.caps.v2.max_shader_image_frag_compute;
415 else
416 return vscreen->caps.caps.v2.max_shader_image_other_stages;
417 case PIPE_SHADER_CAP_SUPPORTED_IRS:
418 return (1 << PIPE_SHADER_IR_TGSI);
419 case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
420 return vscreen->caps.caps.v2.max_atomic_counters[shader];
421 case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
422 return vscreen->caps.caps.v2.max_atomic_counter_buffers[shader];
423 case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
424 case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
425 case PIPE_SHADER_CAP_INT64_ATOMICS:
426 case PIPE_SHADER_CAP_FP16:
427 return 0;
428 case PIPE_SHADER_CAP_SCALAR_ISA:
429 return 1;
430 default:
431 return 0;
432 }
433 default:
434 return 0;
435 }
436 }
437
438 static float
439 virgl_get_paramf(struct pipe_screen *screen, enum pipe_capf param)
440 {
441 struct virgl_screen *vscreen = virgl_screen(screen);
442 switch (param) {
443 case PIPE_CAPF_MAX_LINE_WIDTH:
444 return vscreen->caps.caps.v2.max_aliased_line_width;
445 case PIPE_CAPF_MAX_LINE_WIDTH_AA:
446 return vscreen->caps.caps.v2.max_smooth_line_width;
447 case PIPE_CAPF_MAX_POINT_WIDTH:
448 return vscreen->caps.caps.v2.max_aliased_point_size;
449 case PIPE_CAPF_MAX_POINT_WIDTH_AA:
450 return vscreen->caps.caps.v2.max_smooth_point_size;
451 case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
452 return 16.0;
453 case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
454 return vscreen->caps.caps.v2.max_texture_lod_bias;
455 case PIPE_CAPF_MIN_CONSERVATIVE_RASTER_DILATE:
456 case PIPE_CAPF_MAX_CONSERVATIVE_RASTER_DILATE:
457 case PIPE_CAPF_CONSERVATIVE_RASTER_DILATE_GRANULARITY:
458 return 0.0f;
459 }
460 /* should only get here on unhandled cases */
461 debug_printf("Unexpected PIPE_CAPF %d query\n", param);
462 return 0.0;
463 }
464
465 static int
466 virgl_get_compute_param(struct pipe_screen *screen,
467 enum pipe_shader_ir ir_type,
468 enum pipe_compute_cap param,
469 void *ret)
470 {
471 struct virgl_screen *vscreen = virgl_screen(screen);
472 if (!(vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_COMPUTE_SHADER))
473 return 0;
474 switch (param) {
475 case PIPE_COMPUTE_CAP_MAX_GRID_SIZE:
476 if (ret) {
477 uint64_t *grid_size = ret;
478 grid_size[0] = vscreen->caps.caps.v2.max_compute_grid_size[0];
479 grid_size[1] = vscreen->caps.caps.v2.max_compute_grid_size[1];
480 grid_size[2] = vscreen->caps.caps.v2.max_compute_grid_size[2];
481 }
482 return 3 * sizeof(uint64_t) ;
483 case PIPE_COMPUTE_CAP_MAX_BLOCK_SIZE:
484 if (ret) {
485 uint64_t *block_size = ret;
486 block_size[0] = vscreen->caps.caps.v2.max_compute_block_size[0];
487 block_size[1] = vscreen->caps.caps.v2.max_compute_block_size[1];
488 block_size[2] = vscreen->caps.caps.v2.max_compute_block_size[2];
489 }
490 return 3 * sizeof(uint64_t);
491 case PIPE_COMPUTE_CAP_MAX_THREADS_PER_BLOCK:
492 if (ret) {
493 uint64_t *max_threads_per_block = ret;
494 *max_threads_per_block = vscreen->caps.caps.v2.max_compute_work_group_invocations;
495 }
496 return sizeof(uint64_t);
497 case PIPE_COMPUTE_CAP_MAX_LOCAL_SIZE:
498 if (ret) {
499 uint64_t *max_local_size = ret;
500 /* Value reported by the closed source driver. */
501 *max_local_size = vscreen->caps.caps.v2.max_compute_shared_memory_size;
502 }
503 return sizeof(uint64_t);
504 default:
505 break;
506 }
507 return 0;
508 }
509
510 static boolean
511 virgl_is_vertex_format_supported(struct pipe_screen *screen,
512 enum pipe_format format)
513 {
514 struct virgl_screen *vscreen = virgl_screen(screen);
515 const struct util_format_description *format_desc;
516 int i;
517
518 format_desc = util_format_description(format);
519 if (!format_desc)
520 return FALSE;
521
522 if (format == PIPE_FORMAT_R11G11B10_FLOAT) {
523 int vformat = VIRGL_FORMAT_R11G11B10_FLOAT;
524 int big = vformat / 32;
525 int small = vformat % 32;
526 if (!(vscreen->caps.caps.v1.vertexbuffer.bitmask[big] & (1 << small)))
527 return FALSE;
528 return TRUE;
529 }
530
531 /* Find the first non-VOID channel. */
532 for (i = 0; i < 4; i++) {
533 if (format_desc->channel[i].type != UTIL_FORMAT_TYPE_VOID) {
534 break;
535 }
536 }
537
538 if (i == 4)
539 return FALSE;
540
541 if (format_desc->layout != UTIL_FORMAT_LAYOUT_PLAIN)
542 return FALSE;
543
544 if (format_desc->channel[i].type == UTIL_FORMAT_TYPE_FIXED)
545 return FALSE;
546 return TRUE;
547 }
548
549 /**
550 * Query format support for creating a texture, drawing surface, etc.
551 * \param format the format to test
552 * \param type one of PIPE_TEXTURE, PIPE_SURFACE
553 */
554 static boolean
555 virgl_is_format_supported( struct pipe_screen *screen,
556 enum pipe_format format,
557 enum pipe_texture_target target,
558 unsigned sample_count,
559 unsigned storage_sample_count,
560 unsigned bind)
561 {
562 struct virgl_screen *vscreen = virgl_screen(screen);
563 const struct util_format_description *format_desc;
564 int i;
565
566 if (MAX2(1, sample_count) != MAX2(1, storage_sample_count))
567 return false;
568
569 assert(target == PIPE_BUFFER ||
570 target == PIPE_TEXTURE_1D ||
571 target == PIPE_TEXTURE_1D_ARRAY ||
572 target == PIPE_TEXTURE_2D ||
573 target == PIPE_TEXTURE_2D_ARRAY ||
574 target == PIPE_TEXTURE_RECT ||
575 target == PIPE_TEXTURE_3D ||
576 target == PIPE_TEXTURE_CUBE ||
577 target == PIPE_TEXTURE_CUBE_ARRAY);
578
579 format_desc = util_format_description(format);
580 if (!format_desc)
581 return FALSE;
582
583 if (util_format_is_intensity(format))
584 return FALSE;
585
586 if (sample_count > 1) {
587 if (!vscreen->caps.caps.v1.bset.texture_multisample)
588 return FALSE;
589
590 if (bind & PIPE_BIND_SHADER_IMAGE) {
591 if (sample_count > vscreen->caps.caps.v2.max_image_samples)
592 return FALSE;
593 }
594
595 if (sample_count > vscreen->caps.caps.v1.max_samples)
596 return FALSE;
597 }
598
599 if (bind & PIPE_BIND_VERTEX_BUFFER) {
600 return virgl_is_vertex_format_supported(screen, format);
601 }
602
603 /* Allow 3-comp 32 bit textures only for TBOs (needed for ARB_tbo_rgb32) */
604 if ((format == PIPE_FORMAT_R32G32B32_FLOAT ||
605 format == PIPE_FORMAT_R32G32B32_SINT ||
606 format == PIPE_FORMAT_R32G32B32_UINT) &&
607 target != PIPE_BUFFER)
608 return FALSE;
609
610 if (bind & PIPE_BIND_RENDER_TARGET) {
611 /* For ARB_framebuffer_no_attachments. */
612 if (format == PIPE_FORMAT_NONE)
613 return TRUE;
614
615 if (format_desc->colorspace == UTIL_FORMAT_COLORSPACE_ZS)
616 return FALSE;
617
618 /*
619 * Although possible, it is unnatural to render into compressed or YUV
620 * surfaces. So disable these here to avoid going into weird paths
621 * inside the state trackers.
622 */
623 if (format_desc->block.width != 1 ||
624 format_desc->block.height != 1)
625 return FALSE;
626
627 {
628 int big = format / 32;
629 int small = format % 32;
630 if (!(vscreen->caps.caps.v1.render.bitmask[big] & (1 << small)))
631 return FALSE;
632 }
633 }
634
635 if (bind & PIPE_BIND_DEPTH_STENCIL) {
636 if (format_desc->colorspace != UTIL_FORMAT_COLORSPACE_ZS)
637 return FALSE;
638 }
639
640 /*
641 * All other operations (sampling, transfer, etc).
642 */
643
644 if (format_desc->layout == UTIL_FORMAT_LAYOUT_S3TC) {
645 goto out_lookup;
646 }
647 if (format_desc->layout == UTIL_FORMAT_LAYOUT_RGTC) {
648 goto out_lookup;
649 }
650 if (format_desc->layout == UTIL_FORMAT_LAYOUT_BPTC) {
651 goto out_lookup;
652 }
653
654 if (format == PIPE_FORMAT_R11G11B10_FLOAT) {
655 goto out_lookup;
656 } else if (format == PIPE_FORMAT_R9G9B9E5_FLOAT) {
657 goto out_lookup;
658 }
659
660 /* Find the first non-VOID channel. */
661 for (i = 0; i < 4; i++) {
662 if (format_desc->channel[i].type != UTIL_FORMAT_TYPE_VOID) {
663 break;
664 }
665 }
666
667 if (i == 4)
668 return FALSE;
669
670 /* no L4A4 */
671 if (format_desc->nr_channels < 4 && format_desc->channel[i].size == 4)
672 return FALSE;
673
674 out_lookup:
675 {
676 int big = format / 32;
677 int small = format % 32;
678 if (!(vscreen->caps.caps.v1.sampler.bitmask[big] & (1 << small)))
679 return FALSE;
680 }
681 /*
682 * Everything else should be supported by u_format.
683 */
684 return TRUE;
685 }
686
687 static void virgl_flush_frontbuffer(struct pipe_screen *screen,
688 struct pipe_resource *res,
689 unsigned level, unsigned layer,
690 void *winsys_drawable_handle, struct pipe_box *sub_box)
691 {
692 struct virgl_screen *vscreen = virgl_screen(screen);
693 struct virgl_winsys *vws = vscreen->vws;
694 struct virgl_resource *vres = virgl_resource(res);
695
696 if (vws->flush_frontbuffer)
697 vws->flush_frontbuffer(vws, vres->hw_res, level, layer, winsys_drawable_handle,
698 sub_box);
699 }
700
701 static void virgl_fence_reference(struct pipe_screen *screen,
702 struct pipe_fence_handle **ptr,
703 struct pipe_fence_handle *fence)
704 {
705 struct virgl_screen *vscreen = virgl_screen(screen);
706 struct virgl_winsys *vws = vscreen->vws;
707
708 vws->fence_reference(vws, ptr, fence);
709 }
710
711 static boolean virgl_fence_finish(struct pipe_screen *screen,
712 struct pipe_context *ctx,
713 struct pipe_fence_handle *fence,
714 uint64_t timeout)
715 {
716 struct virgl_screen *vscreen = virgl_screen(screen);
717 struct virgl_winsys *vws = vscreen->vws;
718
719 return vws->fence_wait(vws, fence, timeout);
720 }
721
722 static uint64_t
723 virgl_get_timestamp(struct pipe_screen *_screen)
724 {
725 return os_time_get_nano();
726 }
727
728 static void
729 virgl_destroy_screen(struct pipe_screen *screen)
730 {
731 struct virgl_screen *vscreen = virgl_screen(screen);
732 struct virgl_winsys *vws = vscreen->vws;
733
734 slab_destroy_parent(&vscreen->texture_transfer_pool);
735
736 if (vws)
737 vws->destroy(vws);
738 FREE(vscreen);
739 }
740
741 struct pipe_screen *
742 virgl_create_screen(struct virgl_winsys *vws)
743 {
744 struct virgl_screen *screen = CALLOC_STRUCT(virgl_screen);
745
746 if (!screen)
747 return NULL;
748
749 virgl_debug = debug_get_option_virgl_debug();
750
751 screen->vws = vws;
752 screen->base.get_name = virgl_get_name;
753 screen->base.get_vendor = virgl_get_vendor;
754 screen->base.get_param = virgl_get_param;
755 screen->base.get_shader_param = virgl_get_shader_param;
756 screen->base.get_compute_param = virgl_get_compute_param;
757 screen->base.get_paramf = virgl_get_paramf;
758 screen->base.is_format_supported = virgl_is_format_supported;
759 screen->base.destroy = virgl_destroy_screen;
760 screen->base.context_create = virgl_context_create;
761 screen->base.flush_frontbuffer = virgl_flush_frontbuffer;
762 screen->base.get_timestamp = virgl_get_timestamp;
763 screen->base.fence_reference = virgl_fence_reference;
764 //screen->base.fence_signalled = virgl_fence_signalled;
765 screen->base.fence_finish = virgl_fence_finish;
766
767 virgl_init_screen_resource_functions(&screen->base);
768
769 vws->get_caps(vws, &screen->caps);
770
771 screen->refcnt = 1;
772
773 slab_create_parent(&screen->texture_transfer_pool, sizeof(struct virgl_transfer), 16);
774
775 return &screen->base;
776 }