virgl: do not allow compressed formats for buffers
[mesa.git] / src / gallium / drivers / virgl / virgl_screen.c
1 /*
2 * Copyright 2014, 2015 Red Hat.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 */
23 #include "util/u_memory.h"
24 #include "util/u_format.h"
25 #include "util/u_format_s3tc.h"
26 #include "util/u_screen.h"
27 #include "util/u_video.h"
28 #include "util/u_math.h"
29 #include "util/os_time.h"
30 #include "pipe/p_defines.h"
31 #include "pipe/p_screen.h"
32
33 #include "tgsi/tgsi_exec.h"
34
35 #include "virgl_screen.h"
36 #include "virgl_resource.h"
37 #include "virgl_public.h"
38 #include "virgl_context.h"
39
40 int virgl_debug = 0;
41 static const struct debug_named_value debug_options[] = {
42 { "verbose", VIRGL_DEBUG_VERBOSE, NULL },
43 { "tgsi", VIRGL_DEBUG_TGSI, NULL },
44 DEBUG_NAMED_VALUE_END
45 };
46 DEBUG_GET_ONCE_FLAGS_OPTION(virgl_debug, "VIRGL_DEBUG", debug_options, 0)
47
48 static const char *
49 virgl_get_vendor(struct pipe_screen *screen)
50 {
51 return "Red Hat";
52 }
53
54
55 static const char *
56 virgl_get_name(struct pipe_screen *screen)
57 {
58 return "virgl";
59 }
60
61 static int
62 virgl_get_param(struct pipe_screen *screen, enum pipe_cap param)
63 {
64 struct virgl_screen *vscreen = virgl_screen(screen);
65 switch (param) {
66 case PIPE_CAP_NPOT_TEXTURES:
67 return 1;
68 case PIPE_CAP_SM3:
69 return 1;
70 case PIPE_CAP_ANISOTROPIC_FILTER:
71 return 1;
72 case PIPE_CAP_POINT_SPRITE:
73 return 1;
74 case PIPE_CAP_MAX_RENDER_TARGETS:
75 return vscreen->caps.caps.v1.max_render_targets;
76 case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
77 return vscreen->caps.caps.v1.max_dual_source_render_targets;
78 case PIPE_CAP_OCCLUSION_QUERY:
79 return vscreen->caps.caps.v1.bset.occlusion_query;
80 case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
81 case PIPE_CAP_TEXTURE_MIRROR_CLAMP_TO_EDGE:
82 return vscreen->caps.caps.v1.bset.mirror_clamp;
83 case PIPE_CAP_TEXTURE_SWIZZLE:
84 return 1;
85 case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
86 if (vscreen->caps.caps.v2.max_texture_2d_size)
87 return 1 + util_logbase2(vscreen->caps.caps.v2.max_texture_2d_size);
88 return 15; /* 16K x 16K */
89 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
90 if (vscreen->caps.caps.v2.max_texture_3d_size)
91 return 1 + util_logbase2(vscreen->caps.caps.v2.max_texture_3d_size);
92 return 9; /* 256 x 256 x 256 */
93 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
94 if (vscreen->caps.caps.v2.max_texture_cube_size)
95 return 1 + util_logbase2(vscreen->caps.caps.v2.max_texture_cube_size);
96 return 13; /* 4K x 4K */
97 case PIPE_CAP_BLEND_EQUATION_SEPARATE:
98 return 1;
99 case PIPE_CAP_INDEP_BLEND_ENABLE:
100 return vscreen->caps.caps.v1.bset.indep_blend_enable;
101 case PIPE_CAP_INDEP_BLEND_FUNC:
102 return vscreen->caps.caps.v1.bset.indep_blend_func;
103 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
104 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
105 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
106 return 1;
107 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
108 return vscreen->caps.caps.v1.bset.fragment_coord_conventions;
109 case PIPE_CAP_DEPTH_CLIP_DISABLE:
110 return vscreen->caps.caps.v1.bset.depth_clip_disable;
111 case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
112 return vscreen->caps.caps.v1.max_streamout_buffers;
113 case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
114 case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
115 return 16*4;
116 case PIPE_CAP_PRIMITIVE_RESTART:
117 return vscreen->caps.caps.v1.bset.primitive_restart;
118 case PIPE_CAP_SHADER_STENCIL_EXPORT:
119 return vscreen->caps.caps.v1.bset.shader_stencil_export;
120 case PIPE_CAP_TGSI_INSTANCEID:
121 case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
122 return 1;
123 case PIPE_CAP_SEAMLESS_CUBE_MAP:
124 return vscreen->caps.caps.v1.bset.seamless_cube_map;
125 case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
126 return vscreen->caps.caps.v1.bset.seamless_cube_map_per_texture;
127 case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
128 return vscreen->caps.caps.v1.max_texture_array_layers;
129 case PIPE_CAP_MIN_TEXEL_OFFSET:
130 return vscreen->caps.caps.v2.min_texel_offset;
131 case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
132 return vscreen->caps.caps.v2.min_texture_gather_offset;
133 case PIPE_CAP_MAX_TEXEL_OFFSET:
134 return vscreen->caps.caps.v2.max_texel_offset;
135 case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
136 return vscreen->caps.caps.v2.max_texture_gather_offset;
137 case PIPE_CAP_CONDITIONAL_RENDER:
138 return vscreen->caps.caps.v1.bset.conditional_render;
139 case PIPE_CAP_TEXTURE_BARRIER:
140 return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_TEXTURE_BARRIER;
141 case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
142 return 1;
143 case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
144 case PIPE_CAP_VERTEX_COLOR_CLAMPED:
145 return vscreen->caps.caps.v1.bset.color_clamping;
146 case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
147 return (vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_FBO_MIXED_COLOR_FORMATS) ||
148 (vscreen->caps.caps.v2.host_feature_check_version < 1);
149 case PIPE_CAP_GLSL_FEATURE_LEVEL:
150 return vscreen->caps.caps.v1.glsl_level;
151 case PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY:
152 return MIN2(vscreen->caps.caps.v1.glsl_level, 140);
153 case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
154 case PIPE_CAP_DEPTH_CLIP_DISABLE_SEPARATE:
155 return 0;
156 case PIPE_CAP_COMPUTE:
157 return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_COMPUTE_SHADER;
158 case PIPE_CAP_USER_VERTEX_BUFFERS:
159 return 0;
160 case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
161 return vscreen->caps.caps.v2.uniform_buffer_offset_alignment;
162 case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
163 case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS:
164 return vscreen->caps.caps.v1.bset.streamout_pause_resume;
165 case PIPE_CAP_START_INSTANCE:
166 return vscreen->caps.caps.v1.bset.start_instance;
167 case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
168 case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
169 case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
170 case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
171 case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
172 return 0;
173 case PIPE_CAP_QUERY_TIMESTAMP:
174 return 1;
175 case PIPE_CAP_QUERY_TIME_ELAPSED:
176 return 1;
177 case PIPE_CAP_TGSI_TEXCOORD:
178 return 0;
179 case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
180 return VIRGL_MAP_BUFFER_ALIGNMENT;
181 case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
182 return vscreen->caps.caps.v1.max_tbo_size > 0;
183 case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
184 return vscreen->caps.caps.v2.texture_buffer_offset_alignment;
185 case PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY:
186 return 0;
187 case PIPE_CAP_CUBE_MAP_ARRAY:
188 return vscreen->caps.caps.v1.bset.cube_map_array;
189 case PIPE_CAP_TEXTURE_MULTISAMPLE:
190 return vscreen->caps.caps.v1.bset.texture_multisample;
191 case PIPE_CAP_MAX_VIEWPORTS:
192 return vscreen->caps.caps.v1.max_viewports;
193 case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
194 return vscreen->caps.caps.v1.max_tbo_size;
195 case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
196 case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
197 case PIPE_CAP_ENDIANNESS:
198 return 0;
199 case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
200 case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
201 return 1;
202 case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
203 return 0;
204 case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
205 return vscreen->caps.caps.v2.max_geom_output_vertices;
206 case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
207 return vscreen->caps.caps.v2.max_geom_total_output_components;
208 case PIPE_CAP_TEXTURE_QUERY_LOD:
209 return vscreen->caps.caps.v1.bset.texture_query_lod;
210 case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
211 return vscreen->caps.caps.v1.max_texture_gather_components;
212 case PIPE_CAP_DRAW_INDIRECT:
213 return vscreen->caps.caps.v1.bset.has_indirect_draw;
214 case PIPE_CAP_SAMPLE_SHADING:
215 case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
216 return vscreen->caps.caps.v1.bset.has_sample_shading;
217 case PIPE_CAP_CULL_DISTANCE:
218 return vscreen->caps.caps.v1.bset.has_cull;
219 case PIPE_CAP_MAX_VERTEX_STREAMS:
220 return vscreen->caps.caps.v1.glsl_level >= 400 ? 4 : 1;
221 case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
222 return vscreen->caps.caps.v1.bset.conditional_render_inverted;
223 case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
224 return vscreen->caps.caps.v1.bset.derivative_control;
225 case PIPE_CAP_POLYGON_OFFSET_CLAMP:
226 return vscreen->caps.caps.v1.bset.polygon_offset_clamp;
227 case PIPE_CAP_QUERY_SO_OVERFLOW:
228 return vscreen->caps.caps.v1.bset.transform_feedback_overflow_query;
229 case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
230 return vscreen->caps.caps.v2.shader_buffer_offset_alignment;
231 case PIPE_CAP_DOUBLES:
232 return vscreen->caps.caps.v1.bset.has_fp64 ||
233 (vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_FAKE_FP64);
234 case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
235 return vscreen->caps.caps.v2.max_shader_patch_varyings;
236 case PIPE_CAP_SAMPLER_VIEW_TARGET:
237 return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_TEXTURE_VIEW;
238 case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
239 return vscreen->caps.caps.v2.max_vertex_attrib_stride;
240 case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
241 return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_COPY_IMAGE;
242 case PIPE_CAP_TGSI_TXQS:
243 return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_TXQS;
244 case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT:
245 return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_FB_NO_ATTACH;
246 case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR:
247 return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_ROBUST_BUFFER_ACCESS;
248 case PIPE_CAP_TGSI_FS_FBFETCH:
249 return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_TGSI_FBFETCH;
250 case PIPE_CAP_TGSI_CLOCK:
251 return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_SHADER_CLOCK;
252 case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
253 return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_TGSI_COMPONENTS;
254 case PIPE_CAP_MAX_COMBINED_SHADER_BUFFERS:
255 return vscreen->caps.caps.v2.max_combined_shader_buffers;
256 case PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTERS:
257 return vscreen->caps.caps.v2.max_combined_atomic_counters;
258 case PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTER_BUFFERS:
259 return vscreen->caps.caps.v2.max_combined_atomic_counter_buffers;
260 case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
261 case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
262 return 1; /* TODO: need to introduce a hw-cap for this */
263 case PIPE_CAP_QUERY_BUFFER_OBJECT:
264 return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_QBO;
265 case PIPE_CAP_MAX_VARYINGS:
266 if (vscreen->caps.caps.v1.glsl_level < 150)
267 return vscreen->caps.caps.v2.max_vertex_attribs;
268 return 32;
269 case PIPE_CAP_FAKE_SW_MSAA:
270 /* If the host supports only one sample (e.g., if it is using softpipe),
271 * fake multisampling to able to advertise higher GL versions. */
272 return (vscreen->caps.caps.v1.max_samples == 1) ? 1 : 0;
273 case PIPE_CAP_TEXTURE_GATHER_SM5:
274 case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
275 case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
276 case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
277 case PIPE_CAP_MULTI_DRAW_INDIRECT:
278 case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS:
279 case PIPE_CAP_CLIP_HALFZ:
280 case PIPE_CAP_VERTEXID_NOBASE:
281 case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
282 case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
283 case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
284 case PIPE_CAP_DEPTH_BOUNDS_TEST:
285 case PIPE_CAP_SHAREABLE_SHADERS:
286 case PIPE_CAP_CLEAR_TEXTURE:
287 case PIPE_CAP_DRAW_PARAMETERS:
288 case PIPE_CAP_TGSI_PACK_HALF_FLOAT:
289 case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
290 case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
291 case PIPE_CAP_INVALIDATE_BUFFER:
292 case PIPE_CAP_GENERATE_MIPMAP:
293 case PIPE_CAP_SURFACE_REINTERPRET_BLOCKS:
294 case PIPE_CAP_STRING_MARKER:
295 case PIPE_CAP_QUERY_MEMORY_INFO:
296 case PIPE_CAP_PCI_GROUP:
297 case PIPE_CAP_PCI_BUS:
298 case PIPE_CAP_PCI_DEVICE:
299 case PIPE_CAP_PCI_FUNCTION:
300 case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES:
301 case PIPE_CAP_TGSI_VOTE:
302 case PIPE_CAP_MAX_WINDOW_RECTANGLES:
303 case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED:
304 case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS:
305 case PIPE_CAP_TGSI_CAN_READ_OUTPUTS:
306 case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
307 case PIPE_CAP_TGSI_MUL_ZERO_WINS:
308 case PIPE_CAP_INT64:
309 case PIPE_CAP_INT64_DIVMOD:
310 case PIPE_CAP_TGSI_TEX_TXF_LZ:
311 case PIPE_CAP_POLYGON_MODE_FILL_RECTANGLE:
312 case PIPE_CAP_SPARSE_BUFFER_PAGE_SIZE:
313 case PIPE_CAP_TGSI_BALLOT:
314 case PIPE_CAP_TGSI_TES_LAYER_VIEWPORT:
315 case PIPE_CAP_CAN_BIND_CONST_BUFFER_AS_VERTEX:
316 case PIPE_CAP_ALLOW_MAPPED_BUFFERS_DURING_EXECUTION:
317 case PIPE_CAP_POST_DEPTH_COVERAGE:
318 case PIPE_CAP_BINDLESS_TEXTURE:
319 case PIPE_CAP_NIR_SAMPLERS_AS_DEREF:
320 case PIPE_CAP_MEMOBJ:
321 case PIPE_CAP_LOAD_CONSTBUF:
322 case PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS:
323 case PIPE_CAP_TILE_RASTER_ORDER:
324 case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
325 case PIPE_CAP_FRAMEBUFFER_MSAA_CONSTRAINTS:
326 case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
327 case PIPE_CAP_CONTEXT_PRIORITY_MASK:
328 case PIPE_CAP_FENCE_SIGNAL:
329 case PIPE_CAP_CONSTBUF0_FLAGS:
330 case PIPE_CAP_PACKED_UNIFORMS:
331 case PIPE_CAP_CONSERVATIVE_RASTER_POST_SNAP_TRIANGLES:
332 case PIPE_CAP_CONSERVATIVE_RASTER_POST_SNAP_POINTS_LINES:
333 case PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_TRIANGLES:
334 case PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_POINTS_LINES:
335 case PIPE_CAP_CONSERVATIVE_RASTER_POST_DEPTH_COVERAGE:
336 case PIPE_CAP_MAX_CONSERVATIVE_RASTER_SUBPIXEL_PRECISION_BIAS:
337 case PIPE_CAP_PROGRAMMABLE_SAMPLE_LOCATIONS:
338 case PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET:
339 return 0;
340 case PIPE_CAP_MAX_GS_INVOCATIONS:
341 return 32;
342 case PIPE_CAP_MAX_SHADER_BUFFER_SIZE:
343 return 1 << 27;
344 case PIPE_CAP_VENDOR_ID:
345 return 0x1af4;
346 case PIPE_CAP_DEVICE_ID:
347 return 0x1010;
348 case PIPE_CAP_ACCELERATED:
349 return 1;
350 case PIPE_CAP_UMA:
351 case PIPE_CAP_VIDEO_MEMORY:
352 return 0;
353 case PIPE_CAP_NATIVE_FENCE_FD:
354 return vscreen->vws->supports_fences;
355 case PIPE_CAP_DEST_SURFACE_SRGB_CONTROL:
356 return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_SRGB_WRITE_CONTROL;
357 default:
358 return u_pipe_screen_get_param_defaults(screen, param);
359 }
360 }
361
362 static int
363 virgl_get_shader_param(struct pipe_screen *screen,
364 enum pipe_shader_type shader,
365 enum pipe_shader_cap param)
366 {
367 struct virgl_screen *vscreen = virgl_screen(screen);
368
369 if ((shader == PIPE_SHADER_TESS_CTRL || shader == PIPE_SHADER_TESS_EVAL) &&
370 !vscreen->caps.caps.v1.bset.has_tessellation_shaders)
371 return 0;
372
373 if (shader == PIPE_SHADER_COMPUTE &&
374 !(vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_COMPUTE_SHADER))
375 return 0;
376
377 switch(shader)
378 {
379 case PIPE_SHADER_FRAGMENT:
380 case PIPE_SHADER_VERTEX:
381 case PIPE_SHADER_GEOMETRY:
382 case PIPE_SHADER_TESS_CTRL:
383 case PIPE_SHADER_TESS_EVAL:
384 case PIPE_SHADER_COMPUTE:
385 switch (param) {
386 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
387 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
388 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
389 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
390 return INT_MAX;
391 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
392 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
393 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
394 return 1;
395 case PIPE_SHADER_CAP_MAX_INPUTS:
396 if (vscreen->caps.caps.v1.glsl_level < 150)
397 return vscreen->caps.caps.v2.max_vertex_attribs;
398 return (shader == PIPE_SHADER_VERTEX ||
399 shader == PIPE_SHADER_GEOMETRY) ? vscreen->caps.caps.v2.max_vertex_attribs : 32;
400 case PIPE_SHADER_CAP_MAX_OUTPUTS:
401 if (shader == PIPE_SHADER_FRAGMENT)
402 return vscreen->caps.caps.v1.max_render_targets;
403 return vscreen->caps.caps.v2.max_vertex_outputs;
404 // case PIPE_SHADER_CAP_MAX_CONSTS:
405 // return 4096;
406 case PIPE_SHADER_CAP_MAX_TEMPS:
407 return 256;
408 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
409 return vscreen->caps.caps.v1.max_uniform_blocks;
410 // case PIPE_SHADER_CAP_MAX_ADDRS:
411 // return 1;
412 case PIPE_SHADER_CAP_SUBROUTINES:
413 return 1;
414 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
415 return 16;
416 case PIPE_SHADER_CAP_INTEGERS:
417 return vscreen->caps.caps.v1.glsl_level >= 130;
418 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
419 return 32;
420 case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
421 return 4096 * sizeof(float[4]);
422 case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
423 if (shader == PIPE_SHADER_FRAGMENT || shader == PIPE_SHADER_COMPUTE)
424 return vscreen->caps.caps.v2.max_shader_buffer_frag_compute;
425 else
426 return vscreen->caps.caps.v2.max_shader_buffer_other_stages;
427 case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
428 if (shader == PIPE_SHADER_FRAGMENT || shader == PIPE_SHADER_COMPUTE)
429 return vscreen->caps.caps.v2.max_shader_image_frag_compute;
430 else
431 return vscreen->caps.caps.v2.max_shader_image_other_stages;
432 case PIPE_SHADER_CAP_SUPPORTED_IRS:
433 return (1 << PIPE_SHADER_IR_TGSI);
434 case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
435 return vscreen->caps.caps.v2.max_atomic_counters[shader];
436 case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
437 return vscreen->caps.caps.v2.max_atomic_counter_buffers[shader];
438 case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
439 case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
440 case PIPE_SHADER_CAP_INT64_ATOMICS:
441 case PIPE_SHADER_CAP_FP16:
442 return 0;
443 case PIPE_SHADER_CAP_SCALAR_ISA:
444 return 1;
445 default:
446 return 0;
447 }
448 default:
449 return 0;
450 }
451 }
452
453 static float
454 virgl_get_paramf(struct pipe_screen *screen, enum pipe_capf param)
455 {
456 struct virgl_screen *vscreen = virgl_screen(screen);
457 switch (param) {
458 case PIPE_CAPF_MAX_LINE_WIDTH:
459 return vscreen->caps.caps.v2.max_aliased_line_width;
460 case PIPE_CAPF_MAX_LINE_WIDTH_AA:
461 return vscreen->caps.caps.v2.max_smooth_line_width;
462 case PIPE_CAPF_MAX_POINT_WIDTH:
463 return vscreen->caps.caps.v2.max_aliased_point_size;
464 case PIPE_CAPF_MAX_POINT_WIDTH_AA:
465 return vscreen->caps.caps.v2.max_smooth_point_size;
466 case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
467 return 16.0;
468 case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
469 return vscreen->caps.caps.v2.max_texture_lod_bias;
470 case PIPE_CAPF_MIN_CONSERVATIVE_RASTER_DILATE:
471 case PIPE_CAPF_MAX_CONSERVATIVE_RASTER_DILATE:
472 case PIPE_CAPF_CONSERVATIVE_RASTER_DILATE_GRANULARITY:
473 return 0.0f;
474 }
475 /* should only get here on unhandled cases */
476 debug_printf("Unexpected PIPE_CAPF %d query\n", param);
477 return 0.0;
478 }
479
480 static int
481 virgl_get_compute_param(struct pipe_screen *screen,
482 enum pipe_shader_ir ir_type,
483 enum pipe_compute_cap param,
484 void *ret)
485 {
486 struct virgl_screen *vscreen = virgl_screen(screen);
487 if (!(vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_COMPUTE_SHADER))
488 return 0;
489 switch (param) {
490 case PIPE_COMPUTE_CAP_MAX_GRID_SIZE:
491 if (ret) {
492 uint64_t *grid_size = ret;
493 grid_size[0] = vscreen->caps.caps.v2.max_compute_grid_size[0];
494 grid_size[1] = vscreen->caps.caps.v2.max_compute_grid_size[1];
495 grid_size[2] = vscreen->caps.caps.v2.max_compute_grid_size[2];
496 }
497 return 3 * sizeof(uint64_t) ;
498 case PIPE_COMPUTE_CAP_MAX_BLOCK_SIZE:
499 if (ret) {
500 uint64_t *block_size = ret;
501 block_size[0] = vscreen->caps.caps.v2.max_compute_block_size[0];
502 block_size[1] = vscreen->caps.caps.v2.max_compute_block_size[1];
503 block_size[2] = vscreen->caps.caps.v2.max_compute_block_size[2];
504 }
505 return 3 * sizeof(uint64_t);
506 case PIPE_COMPUTE_CAP_MAX_THREADS_PER_BLOCK:
507 if (ret) {
508 uint64_t *max_threads_per_block = ret;
509 *max_threads_per_block = vscreen->caps.caps.v2.max_compute_work_group_invocations;
510 }
511 return sizeof(uint64_t);
512 case PIPE_COMPUTE_CAP_MAX_LOCAL_SIZE:
513 if (ret) {
514 uint64_t *max_local_size = ret;
515 /* Value reported by the closed source driver. */
516 *max_local_size = vscreen->caps.caps.v2.max_compute_shared_memory_size;
517 }
518 return sizeof(uint64_t);
519 default:
520 break;
521 }
522 return 0;
523 }
524
525 static boolean
526 virgl_is_vertex_format_supported(struct pipe_screen *screen,
527 enum pipe_format format)
528 {
529 struct virgl_screen *vscreen = virgl_screen(screen);
530 const struct util_format_description *format_desc;
531 int i;
532
533 format_desc = util_format_description(format);
534 if (!format_desc)
535 return FALSE;
536
537 if (format == PIPE_FORMAT_R11G11B10_FLOAT) {
538 int vformat = VIRGL_FORMAT_R11G11B10_FLOAT;
539 int big = vformat / 32;
540 int small = vformat % 32;
541 if (!(vscreen->caps.caps.v1.vertexbuffer.bitmask[big] & (1 << small)))
542 return FALSE;
543 return TRUE;
544 }
545
546 /* Find the first non-VOID channel. */
547 for (i = 0; i < 4; i++) {
548 if (format_desc->channel[i].type != UTIL_FORMAT_TYPE_VOID) {
549 break;
550 }
551 }
552
553 if (i == 4)
554 return FALSE;
555
556 if (format_desc->layout != UTIL_FORMAT_LAYOUT_PLAIN)
557 return FALSE;
558
559 if (format_desc->channel[i].type == UTIL_FORMAT_TYPE_FIXED)
560 return FALSE;
561 return TRUE;
562 }
563
564 /**
565 * Query format support for creating a texture, drawing surface, etc.
566 * \param format the format to test
567 * \param type one of PIPE_TEXTURE, PIPE_SURFACE
568 */
569 static boolean
570 virgl_is_format_supported( struct pipe_screen *screen,
571 enum pipe_format format,
572 enum pipe_texture_target target,
573 unsigned sample_count,
574 unsigned storage_sample_count,
575 unsigned bind)
576 {
577 struct virgl_screen *vscreen = virgl_screen(screen);
578 const struct util_format_description *format_desc;
579 int i;
580
581 if (MAX2(1, sample_count) != MAX2(1, storage_sample_count))
582 return false;
583
584 assert(target == PIPE_BUFFER ||
585 target == PIPE_TEXTURE_1D ||
586 target == PIPE_TEXTURE_1D_ARRAY ||
587 target == PIPE_TEXTURE_2D ||
588 target == PIPE_TEXTURE_2D_ARRAY ||
589 target == PIPE_TEXTURE_RECT ||
590 target == PIPE_TEXTURE_3D ||
591 target == PIPE_TEXTURE_CUBE ||
592 target == PIPE_TEXTURE_CUBE_ARRAY);
593
594 format_desc = util_format_description(format);
595 if (!format_desc)
596 return FALSE;
597
598 if (util_format_is_intensity(format))
599 return FALSE;
600
601 if (sample_count > 1) {
602 if (!vscreen->caps.caps.v1.bset.texture_multisample)
603 return FALSE;
604
605 if (bind & PIPE_BIND_SHADER_IMAGE) {
606 if (sample_count > vscreen->caps.caps.v2.max_image_samples)
607 return FALSE;
608 }
609
610 if (sample_count > vscreen->caps.caps.v1.max_samples)
611 return FALSE;
612 }
613
614 if (bind & PIPE_BIND_VERTEX_BUFFER) {
615 return virgl_is_vertex_format_supported(screen, format);
616 }
617
618 if (util_format_is_compressed(format) && target == PIPE_BUFFER)
619 return FALSE;
620
621 /* Allow 3-comp 32 bit textures only for TBOs (needed for ARB_tbo_rgb32) */
622 if ((format == PIPE_FORMAT_R32G32B32_FLOAT ||
623 format == PIPE_FORMAT_R32G32B32_SINT ||
624 format == PIPE_FORMAT_R32G32B32_UINT) &&
625 target != PIPE_BUFFER)
626 return FALSE;
627
628 if (bind & PIPE_BIND_RENDER_TARGET) {
629 /* For ARB_framebuffer_no_attachments. */
630 if (format == PIPE_FORMAT_NONE)
631 return TRUE;
632
633 if (format_desc->colorspace == UTIL_FORMAT_COLORSPACE_ZS)
634 return FALSE;
635
636 /*
637 * Although possible, it is unnatural to render into compressed or YUV
638 * surfaces. So disable these here to avoid going into weird paths
639 * inside the state trackers.
640 */
641 if (format_desc->block.width != 1 ||
642 format_desc->block.height != 1)
643 return FALSE;
644
645 {
646 int big = format / 32;
647 int small = format % 32;
648 if (!(vscreen->caps.caps.v1.render.bitmask[big] & (1 << small)))
649 return FALSE;
650 }
651 }
652
653 if (bind & PIPE_BIND_DEPTH_STENCIL) {
654 if (format_desc->colorspace != UTIL_FORMAT_COLORSPACE_ZS)
655 return FALSE;
656 }
657
658 /*
659 * All other operations (sampling, transfer, etc).
660 */
661
662 if (format_desc->layout == UTIL_FORMAT_LAYOUT_S3TC) {
663 goto out_lookup;
664 }
665 if (format_desc->layout == UTIL_FORMAT_LAYOUT_RGTC) {
666 goto out_lookup;
667 }
668 if (format_desc->layout == UTIL_FORMAT_LAYOUT_BPTC) {
669 goto out_lookup;
670 }
671
672 if (format == PIPE_FORMAT_R11G11B10_FLOAT) {
673 goto out_lookup;
674 } else if (format == PIPE_FORMAT_R9G9B9E5_FLOAT) {
675 goto out_lookup;
676 }
677
678 /* Find the first non-VOID channel. */
679 for (i = 0; i < 4; i++) {
680 if (format_desc->channel[i].type != UTIL_FORMAT_TYPE_VOID) {
681 break;
682 }
683 }
684
685 if (i == 4)
686 return FALSE;
687
688 /* no L4A4 */
689 if (format_desc->nr_channels < 4 && format_desc->channel[i].size == 4)
690 return FALSE;
691
692 out_lookup:
693 {
694 int big = format / 32;
695 int small = format % 32;
696 if (!(vscreen->caps.caps.v1.sampler.bitmask[big] & (1 << small)))
697 return FALSE;
698 }
699 /*
700 * Everything else should be supported by u_format.
701 */
702 return TRUE;
703 }
704
705 static void virgl_flush_frontbuffer(struct pipe_screen *screen,
706 struct pipe_resource *res,
707 unsigned level, unsigned layer,
708 void *winsys_drawable_handle, struct pipe_box *sub_box)
709 {
710 struct virgl_screen *vscreen = virgl_screen(screen);
711 struct virgl_winsys *vws = vscreen->vws;
712 struct virgl_resource *vres = virgl_resource(res);
713
714 if (vws->flush_frontbuffer)
715 vws->flush_frontbuffer(vws, vres->hw_res, level, layer, winsys_drawable_handle,
716 sub_box);
717 }
718
719 static void virgl_fence_reference(struct pipe_screen *screen,
720 struct pipe_fence_handle **ptr,
721 struct pipe_fence_handle *fence)
722 {
723 struct virgl_screen *vscreen = virgl_screen(screen);
724 struct virgl_winsys *vws = vscreen->vws;
725
726 vws->fence_reference(vws, ptr, fence);
727 }
728
729 static boolean virgl_fence_finish(struct pipe_screen *screen,
730 struct pipe_context *ctx,
731 struct pipe_fence_handle *fence,
732 uint64_t timeout)
733 {
734 struct virgl_screen *vscreen = virgl_screen(screen);
735 struct virgl_winsys *vws = vscreen->vws;
736
737 return vws->fence_wait(vws, fence, timeout);
738 }
739
740 static int virgl_fence_get_fd(struct pipe_screen *screen,
741 struct pipe_fence_handle *fence)
742 {
743 struct virgl_screen *vscreen = virgl_screen(screen);
744 struct virgl_winsys *vws = vscreen->vws;
745
746 return vws->fence_get_fd(vws, fence);
747 }
748
749 static uint64_t
750 virgl_get_timestamp(struct pipe_screen *_screen)
751 {
752 return os_time_get_nano();
753 }
754
755 static void
756 virgl_destroy_screen(struct pipe_screen *screen)
757 {
758 struct virgl_screen *vscreen = virgl_screen(screen);
759 struct virgl_winsys *vws = vscreen->vws;
760
761 slab_destroy_parent(&vscreen->transfer_pool);
762
763 if (vws)
764 vws->destroy(vws);
765 FREE(vscreen);
766 }
767
768 struct pipe_screen *
769 virgl_create_screen(struct virgl_winsys *vws)
770 {
771 struct virgl_screen *screen = CALLOC_STRUCT(virgl_screen);
772
773 if (!screen)
774 return NULL;
775
776 virgl_debug = debug_get_option_virgl_debug();
777
778 screen->vws = vws;
779 screen->base.get_name = virgl_get_name;
780 screen->base.get_vendor = virgl_get_vendor;
781 screen->base.get_param = virgl_get_param;
782 screen->base.get_shader_param = virgl_get_shader_param;
783 screen->base.get_compute_param = virgl_get_compute_param;
784 screen->base.get_paramf = virgl_get_paramf;
785 screen->base.is_format_supported = virgl_is_format_supported;
786 screen->base.destroy = virgl_destroy_screen;
787 screen->base.context_create = virgl_context_create;
788 screen->base.flush_frontbuffer = virgl_flush_frontbuffer;
789 screen->base.get_timestamp = virgl_get_timestamp;
790 screen->base.fence_reference = virgl_fence_reference;
791 //screen->base.fence_signalled = virgl_fence_signalled;
792 screen->base.fence_finish = virgl_fence_finish;
793 screen->base.fence_get_fd = virgl_fence_get_fd;
794
795 virgl_init_screen_resource_functions(&screen->base);
796
797 vws->get_caps(vws, &screen->caps);
798
799 screen->refcnt = 1;
800
801 slab_create_parent(&screen->transfer_pool, sizeof(struct virgl_transfer), 16);
802
803 return &screen->base;
804 }