src/gallium/drivers/virgl/virgl_screen.c

   1 /*
   2  * Copyright 2014, 2015 Red Hat.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * on the rights to use, copy, modify, merge, publish, distribute, sub
   8  * license, and/or sell copies of the Software, and to permit persons to whom
   9  * the Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  21  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  22  */
  23 #include "util/u_memory.h"
  24 #include "util/u_format.h"
  25 #include "util/u_format_s3tc.h"
  26 #include "util/u_screen.h"
  27 #include "util/u_video.h"
  28 #include "util/u_math.h"
  29 #include "util/os_time.h"
  30 #include "pipe/p_defines.h"
  31 #include "pipe/p_screen.h"
  32
  33 #include "tgsi/tgsi_exec.h"
  34
  35 #include "virgl_screen.h"
  36 #include "virgl_resource.h"
  37 #include "virgl_public.h"
  38 #include "virgl_context.h"
  39
  40 int virgl_debug = 0;
  41 static const struct debug_named_value debug_options[] = {
  42    { "verbose", VIRGL_DEBUG_VERBOSE, NULL },
  43    { "tgsi", VIRGL_DEBUG_TGSI, NULL },
  44    DEBUG_NAMED_VALUE_END
  45 };
  46 DEBUG_GET_ONCE_FLAGS_OPTION(virgl_debug, "VIRGL_DEBUG", debug_options, 0)
  47
  48 static const char *
  49 virgl_get_vendor(struct pipe_screen *screen)
  50 {
  51    return "Red Hat";
  52 }
  53
  54
  55 static const char *
  56 virgl_get_name(struct pipe_screen *screen)
  57 {
  58    return "virgl";
  59 }
  60
  61 static int
  62 virgl_get_param(struct pipe_screen *screen, enum pipe_cap param)
  63 {
  64    struct virgl_screen *vscreen = virgl_screen(screen);
  65    switch (param) {
  66    case PIPE_CAP_NPOT_TEXTURES:
  67       return 1;
  68    case PIPE_CAP_SM3:
  69       return 1;
  70    case PIPE_CAP_ANISOTROPIC_FILTER:
  71       return 1;
  72    case PIPE_CAP_POINT_SPRITE:
  73       return 1;
  74    case PIPE_CAP_MAX_RENDER_TARGETS:
  75       return vscreen->caps.caps.v1.max_render_targets;
  76    case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
  77       return vscreen->caps.caps.v1.max_dual_source_render_targets;
  78    case PIPE_CAP_OCCLUSION_QUERY:
  79       return vscreen->caps.caps.v1.bset.occlusion_query;
  80    case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
  81    case PIPE_CAP_TEXTURE_MIRROR_CLAMP_TO_EDGE:
  82       return vscreen->caps.caps.v1.bset.mirror_clamp;
  83    case PIPE_CAP_TEXTURE_SWIZZLE:
  84       return 1;
  85    case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
  86       if (vscreen->caps.caps.v2.max_texture_2d_size)
  87          return 1 + util_logbase2(vscreen->caps.caps.v2.max_texture_2d_size);
  88       return 15; /* 16K x 16K */
  89    case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
  90       if (vscreen->caps.caps.v2.max_texture_3d_size)
  91          return 1 + util_logbase2(vscreen->caps.caps.v2.max_texture_3d_size);
  92       return 9; /* 256 x 256 x 256 */
  93    case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
  94       if (vscreen->caps.caps.v2.max_texture_cube_size)
  95          return 1 + util_logbase2(vscreen->caps.caps.v2.max_texture_cube_size);
  96       return 13; /* 4K x 4K */
  97    case PIPE_CAP_BLEND_EQUATION_SEPARATE:
  98       return 1;
  99    case PIPE_CAP_INDEP_BLEND_ENABLE:
 100       return vscreen->caps.caps.v1.bset.indep_blend_enable;
 101    case PIPE_CAP_INDEP_BLEND_FUNC:
 102       return vscreen->caps.caps.v1.bset.indep_blend_func;
 103    case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
 104    case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
 105    case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
 106       return 1;
 107    case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
 108       return vscreen->caps.caps.v1.bset.fragment_coord_conventions;
 109    case PIPE_CAP_DEPTH_CLIP_DISABLE:
 110       return vscreen->caps.caps.v1.bset.depth_clip_disable;
 111    case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
 112       return vscreen->caps.caps.v1.max_streamout_buffers;
 113    case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
 114    case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
 115       return 16*4;
 116    case PIPE_CAP_PRIMITIVE_RESTART:
 117       return vscreen->caps.caps.v1.bset.primitive_restart;
 118    case PIPE_CAP_SHADER_STENCIL_EXPORT:
 119       return vscreen->caps.caps.v1.bset.shader_stencil_export;
 120    case PIPE_CAP_TGSI_INSTANCEID:
 121    case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
 122       return 1;
 123    case PIPE_CAP_SEAMLESS_CUBE_MAP:
 124       return vscreen->caps.caps.v1.bset.seamless_cube_map;
 125    case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
 126       return vscreen->caps.caps.v1.bset.seamless_cube_map_per_texture;
 127    case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
 128       return vscreen->caps.caps.v1.max_texture_array_layers;
 129    case PIPE_CAP_MIN_TEXEL_OFFSET:
 130       return vscreen->caps.caps.v2.min_texel_offset;
 131    case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
 132       return vscreen->caps.caps.v2.min_texture_gather_offset;
 133    case PIPE_CAP_MAX_TEXEL_OFFSET:
 134       return vscreen->caps.caps.v2.max_texel_offset;
 135    case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
 136       return vscreen->caps.caps.v2.max_texture_gather_offset;
 137    case PIPE_CAP_CONDITIONAL_RENDER:
 138       return vscreen->caps.caps.v1.bset.conditional_render;
 139    case PIPE_CAP_TEXTURE_BARRIER:
 140       return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_TEXTURE_BARRIER;
 141    case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
 142       return 1;
 143    case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
 144    case PIPE_CAP_VERTEX_COLOR_CLAMPED:
 145       return vscreen->caps.caps.v1.bset.color_clamping;
 146    case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
 147       return (vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_FBO_MIXED_COLOR_FORMATS) ||
 148             (vscreen->caps.caps.v2.host_feature_check_version < 1);
 149    case PIPE_CAP_GLSL_FEATURE_LEVEL:
 150       return vscreen->caps.caps.v1.glsl_level;
 151    case PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY:
 152       return MIN2(vscreen->caps.caps.v1.glsl_level, 140);
 153    case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
 154    case PIPE_CAP_DEPTH_CLIP_DISABLE_SEPARATE:
 155       return 0;
 156    case PIPE_CAP_COMPUTE:
 157       return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_COMPUTE_SHADER;
 158    case PIPE_CAP_USER_VERTEX_BUFFERS:
 159       return 0;
 160    case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
 161       return vscreen->caps.caps.v2.uniform_buffer_offset_alignment;
 162    case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
 163    case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS:
 164       return vscreen->caps.caps.v1.bset.streamout_pause_resume;
 165    case PIPE_CAP_START_INSTANCE:
 166       return vscreen->caps.caps.v1.bset.start_instance;
 167    case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
 168    case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
 169    case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
 170    case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
 171    case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
 172       return 0;
 173    case PIPE_CAP_QUERY_TIMESTAMP:
 174       return 1;
 175    case PIPE_CAP_QUERY_TIME_ELAPSED:
 176       return 1;
 177    case PIPE_CAP_TGSI_TEXCOORD:
 178       return 0;
 179    case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
 180       return VIRGL_MAP_BUFFER_ALIGNMENT;
 181    case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
 182       return vscreen->caps.caps.v1.max_tbo_size > 0;
 183    case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
 184       return vscreen->caps.caps.v2.texture_buffer_offset_alignment;
 185    case PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY:
 186       return 0;
 187    case PIPE_CAP_CUBE_MAP_ARRAY:
 188       return vscreen->caps.caps.v1.bset.cube_map_array;
 189    case PIPE_CAP_TEXTURE_MULTISAMPLE:
 190       return vscreen->caps.caps.v1.bset.texture_multisample;
 191    case PIPE_CAP_MAX_VIEWPORTS:
 192       return vscreen->caps.caps.v1.max_viewports;
 193    case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
 194       return vscreen->caps.caps.v1.max_tbo_size;
 195    case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
 196    case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
 197    case PIPE_CAP_ENDIANNESS:
 198       return 0;
 199    case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
 200    case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
 201       return 1;
 202    case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
 203       return 0;
 204    case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
 205       return vscreen->caps.caps.v2.max_geom_output_vertices;
 206    case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
 207       return vscreen->caps.caps.v2.max_geom_total_output_components;
 208    case PIPE_CAP_TEXTURE_QUERY_LOD:
 209       return vscreen->caps.caps.v1.bset.texture_query_lod;
 210    case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
 211       return vscreen->caps.caps.v1.max_texture_gather_components;
 212    case PIPE_CAP_DRAW_INDIRECT:
 213       return vscreen->caps.caps.v1.bset.has_indirect_draw;
 214    case PIPE_CAP_SAMPLE_SHADING:
 215    case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
 216       return vscreen->caps.caps.v1.bset.has_sample_shading;
 217    case PIPE_CAP_CULL_DISTANCE:
 218       return vscreen->caps.caps.v1.bset.has_cull;
 219    case PIPE_CAP_MAX_VERTEX_STREAMS:
 220       return ((vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_TRANSFORM_FEEDBACK3) ||
 221               (vscreen->caps.caps.v2.host_feature_check_version < 2)) ? 4 : 1;
 222    case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
 223       return vscreen->caps.caps.v1.bset.conditional_render_inverted;
 224    case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
 225       return vscreen->caps.caps.v1.bset.derivative_control;
 226    case PIPE_CAP_POLYGON_OFFSET_CLAMP:
 227       return vscreen->caps.caps.v1.bset.polygon_offset_clamp;
 228    case PIPE_CAP_QUERY_SO_OVERFLOW:
 229       return vscreen->caps.caps.v1.bset.transform_feedback_overflow_query;
 230    case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
 231       return vscreen->caps.caps.v2.shader_buffer_offset_alignment;
 232    case PIPE_CAP_DOUBLES:
 233       return vscreen->caps.caps.v1.bset.has_fp64 ||
 234             (vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_FAKE_FP64);
 235    case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
 236       return vscreen->caps.caps.v2.max_shader_patch_varyings;
 237    case PIPE_CAP_SAMPLER_VIEW_TARGET:
 238       return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_TEXTURE_VIEW;
 239    case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
 240       return vscreen->caps.caps.v2.max_vertex_attrib_stride;
 241    case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
 242       return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_COPY_IMAGE;
 243    case PIPE_CAP_TGSI_TXQS:
 244       return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_TXQS;
 245    case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT:
 246       return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_FB_NO_ATTACH;
 247    case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR:
 248       return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_ROBUST_BUFFER_ACCESS;
 249    case PIPE_CAP_TGSI_FS_FBFETCH:
 250       return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_TGSI_FBFETCH;
 251    case PIPE_CAP_TGSI_CLOCK:
 252       return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_SHADER_CLOCK;
 253    case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
 254       return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_TGSI_COMPONENTS;
 255    case PIPE_CAP_MAX_COMBINED_SHADER_BUFFERS:
 256       return vscreen->caps.caps.v2.max_combined_shader_buffers;
 257    case PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTERS:
 258       return vscreen->caps.caps.v2.max_combined_atomic_counters;
 259    case PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTER_BUFFERS:
 260       return vscreen->caps.caps.v2.max_combined_atomic_counter_buffers;
 261    case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
 262    case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
 263       return 1; /* TODO: need to introduce a hw-cap for this */
 264    case PIPE_CAP_QUERY_BUFFER_OBJECT:
 265       return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_QBO;
 266    case PIPE_CAP_MAX_VARYINGS:
 267       if (vscreen->caps.caps.v1.glsl_level < 150)
 268          return vscreen->caps.caps.v2.max_vertex_attribs;
 269       return 32;
 270    case PIPE_CAP_FAKE_SW_MSAA:
 271       /* If the host supports only one sample (e.g., if it is using softpipe),
 272        * fake multisampling to able to advertise higher GL versions. */
 273       return (vscreen->caps.caps.v1.max_samples == 1) ? 1 : 0;
 274    case PIPE_CAP_MULTI_DRAW_INDIRECT:
 275       return !!(vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_MULTI_DRAW_INDIRECT);
 276    case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS:
 277       return !!(vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_INDIRECT_PARAMS);
 278    case PIPE_CAP_TEXTURE_GATHER_SM5:
 279    case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
 280    case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
 281    case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
 282    case PIPE_CAP_CLIP_HALFZ:
 283    case PIPE_CAP_VERTEXID_NOBASE:
 284    case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
 285    case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
 286    case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
 287    case PIPE_CAP_DEPTH_BOUNDS_TEST:
 288    case PIPE_CAP_SHAREABLE_SHADERS:
 289    case PIPE_CAP_CLEAR_TEXTURE:
 290    case PIPE_CAP_DRAW_PARAMETERS:
 291    case PIPE_CAP_TGSI_PACK_HALF_FLOAT:
 292    case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
 293    case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
 294    case PIPE_CAP_INVALIDATE_BUFFER:
 295    case PIPE_CAP_GENERATE_MIPMAP:
 296    case PIPE_CAP_SURFACE_REINTERPRET_BLOCKS:
 297    case PIPE_CAP_STRING_MARKER:
 298    case PIPE_CAP_QUERY_MEMORY_INFO:
 299    case PIPE_CAP_PCI_GROUP:
 300    case PIPE_CAP_PCI_BUS:
 301    case PIPE_CAP_PCI_DEVICE:
 302    case PIPE_CAP_PCI_FUNCTION:
 303    case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES:
 304    case PIPE_CAP_TGSI_VOTE:
 305    case PIPE_CAP_MAX_WINDOW_RECTANGLES:
 306    case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED:
 307    case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS:
 308    case PIPE_CAP_TGSI_CAN_READ_OUTPUTS:
 309    case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
 310    case PIPE_CAP_TGSI_MUL_ZERO_WINS:
 311    case PIPE_CAP_INT64:
 312    case PIPE_CAP_INT64_DIVMOD:
 313    case PIPE_CAP_TGSI_TEX_TXF_LZ:
 314    case PIPE_CAP_POLYGON_MODE_FILL_RECTANGLE:
 315    case PIPE_CAP_SPARSE_BUFFER_PAGE_SIZE:
 316    case PIPE_CAP_TGSI_BALLOT:
 317    case PIPE_CAP_TGSI_TES_LAYER_VIEWPORT:
 318    case PIPE_CAP_CAN_BIND_CONST_BUFFER_AS_VERTEX:
 319    case PIPE_CAP_ALLOW_MAPPED_BUFFERS_DURING_EXECUTION:
 320    case PIPE_CAP_POST_DEPTH_COVERAGE:
 321    case PIPE_CAP_BINDLESS_TEXTURE:
 322    case PIPE_CAP_NIR_SAMPLERS_AS_DEREF:
 323    case PIPE_CAP_MEMOBJ:
 324    case PIPE_CAP_LOAD_CONSTBUF:
 325    case PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS:
 326    case PIPE_CAP_TILE_RASTER_ORDER:
 327    case PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES:
 328    case PIPE_CAP_FRAMEBUFFER_MSAA_CONSTRAINTS:
 329    case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET:
 330    case PIPE_CAP_CONTEXT_PRIORITY_MASK:
 331    case PIPE_CAP_FENCE_SIGNAL:
 332    case PIPE_CAP_CONSTBUF0_FLAGS:
 333    case PIPE_CAP_PACKED_UNIFORMS:
 334    case PIPE_CAP_CONSERVATIVE_RASTER_POST_SNAP_TRIANGLES:
 335    case PIPE_CAP_CONSERVATIVE_RASTER_POST_SNAP_POINTS_LINES:
 336    case PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_TRIANGLES:
 337    case PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_POINTS_LINES:
 338    case PIPE_CAP_CONSERVATIVE_RASTER_POST_DEPTH_COVERAGE:
 339    case PIPE_CAP_MAX_CONSERVATIVE_RASTER_SUBPIXEL_PRECISION_BIAS:
 340    case PIPE_CAP_PROGRAMMABLE_SAMPLE_LOCATIONS:
 341    case PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET:
 342       return 0;
 343    case PIPE_CAP_MAX_GS_INVOCATIONS:
 344       return 32;
 345    case PIPE_CAP_MAX_SHADER_BUFFER_SIZE:
 346       return 1 << 27;
 347    case PIPE_CAP_VENDOR_ID:
 348       return 0x1af4;
 349    case PIPE_CAP_DEVICE_ID:
 350       return 0x1010;
 351    case PIPE_CAP_ACCELERATED:
 352       return 1;
 353    case PIPE_CAP_UMA:
 354    case PIPE_CAP_VIDEO_MEMORY:
 355       return 0;
 356    case PIPE_CAP_NATIVE_FENCE_FD:
 357       return vscreen->vws->supports_fences;
 358    case PIPE_CAP_DEST_SURFACE_SRGB_CONTROL:
 359       return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_SRGB_WRITE_CONTROL;
 360    default:
 361       return u_pipe_screen_get_param_defaults(screen, param);
 362    }
 363 }
 364
 365 static int
 366 virgl_get_shader_param(struct pipe_screen *screen,
 367                        enum pipe_shader_type shader,
 368                        enum pipe_shader_cap param)
 369 {
 370    struct virgl_screen *vscreen = virgl_screen(screen);
 371
 372    if ((shader == PIPE_SHADER_TESS_CTRL || shader == PIPE_SHADER_TESS_EVAL) &&
 373        !vscreen->caps.caps.v1.bset.has_tessellation_shaders)
 374       return 0;
 375
 376    if (shader == PIPE_SHADER_COMPUTE &&
 377        !(vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_COMPUTE_SHADER))
 378      return 0;
 379
 380    switch(shader)
 381    {
 382    case PIPE_SHADER_FRAGMENT:
 383    case PIPE_SHADER_VERTEX:
 384    case PIPE_SHADER_GEOMETRY:
 385    case PIPE_SHADER_TESS_CTRL:
 386    case PIPE_SHADER_TESS_EVAL:
 387    case PIPE_SHADER_COMPUTE:
 388       switch (param) {
 389       case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 390       case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 391       case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 392       case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 393          return INT_MAX;
 394       case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 395       case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 396       case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 397          return 1;
 398       case PIPE_SHADER_CAP_MAX_INPUTS:
 399          if (vscreen->caps.caps.v1.glsl_level < 150)
 400             return vscreen->caps.caps.v2.max_vertex_attribs;
 401          return (shader == PIPE_SHADER_VERTEX ||
 402                  shader == PIPE_SHADER_GEOMETRY) ? vscreen->caps.caps.v2.max_vertex_attribs : 32;
 403       case PIPE_SHADER_CAP_MAX_OUTPUTS:
 404          if (shader == PIPE_SHADER_FRAGMENT)
 405             return vscreen->caps.caps.v1.max_render_targets;
 406          return vscreen->caps.caps.v2.max_vertex_outputs;
 407      // case PIPE_SHADER_CAP_MAX_CONSTS:
 408      //    return 4096;
 409       case PIPE_SHADER_CAP_MAX_TEMPS:
 410          return 256;
 411       case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 412          return vscreen->caps.caps.v1.max_uniform_blocks;
 413     //  case PIPE_SHADER_CAP_MAX_ADDRS:
 414      //    return 1;
 415       case PIPE_SHADER_CAP_SUBROUTINES:
 416          return 1;
 417       case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 418             return 16;
 419       case PIPE_SHADER_CAP_INTEGERS:
 420          return vscreen->caps.caps.v1.glsl_level >= 130;
 421       case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 422          return 32;
 423       case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 424          return 4096 * sizeof(float[4]);
 425       case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
 426          if (shader == PIPE_SHADER_FRAGMENT || shader == PIPE_SHADER_COMPUTE)
 427             return vscreen->caps.caps.v2.max_shader_buffer_frag_compute;
 428          else
 429             return vscreen->caps.caps.v2.max_shader_buffer_other_stages;
 430       case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
 431          if (shader == PIPE_SHADER_FRAGMENT || shader == PIPE_SHADER_COMPUTE)
 432             return vscreen->caps.caps.v2.max_shader_image_frag_compute;
 433          else
 434             return vscreen->caps.caps.v2.max_shader_image_other_stages;
 435       case PIPE_SHADER_CAP_SUPPORTED_IRS:
 436          return (1 << PIPE_SHADER_IR_TGSI);
 437       case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
 438          return vscreen->caps.caps.v2.max_atomic_counters[shader];
 439       case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
 440          return vscreen->caps.caps.v2.max_atomic_counter_buffers[shader];
 441       case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
 442       case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
 443       case PIPE_SHADER_CAP_INT64_ATOMICS:
 444       case PIPE_SHADER_CAP_FP16:
 445          return 0;
 446       case PIPE_SHADER_CAP_SCALAR_ISA:
 447          return 1;
 448       default:
 449          return 0;
 450       }
 451    default:
 452       return 0;
 453    }
 454 }
 455
 456 static float
 457 virgl_get_paramf(struct pipe_screen *screen, enum pipe_capf param)
 458 {
 459    struct virgl_screen *vscreen = virgl_screen(screen);
 460    switch (param) {
 461    case PIPE_CAPF_MAX_LINE_WIDTH:
 462       return vscreen->caps.caps.v2.max_aliased_line_width;
 463    case PIPE_CAPF_MAX_LINE_WIDTH_AA:
 464       return vscreen->caps.caps.v2.max_smooth_line_width;
 465    case PIPE_CAPF_MAX_POINT_WIDTH:
 466       return vscreen->caps.caps.v2.max_aliased_point_size;
 467    case PIPE_CAPF_MAX_POINT_WIDTH_AA:
 468       return vscreen->caps.caps.v2.max_smooth_point_size;
 469    case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
 470       return 16.0;
 471    case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
 472       return vscreen->caps.caps.v2.max_texture_lod_bias;
 473    case PIPE_CAPF_MIN_CONSERVATIVE_RASTER_DILATE:
 474    case PIPE_CAPF_MAX_CONSERVATIVE_RASTER_DILATE:
 475    case PIPE_CAPF_CONSERVATIVE_RASTER_DILATE_GRANULARITY:
 476       return 0.0f;
 477    }
 478    /* should only get here on unhandled cases */
 479    debug_printf("Unexpected PIPE_CAPF %d query\n", param);
 480    return 0.0;
 481 }
 482
 483 static int
 484 virgl_get_compute_param(struct pipe_screen *screen,
 485                         enum pipe_shader_ir ir_type,
 486                         enum pipe_compute_cap param,
 487                         void *ret)
 488 {
 489    struct virgl_screen *vscreen = virgl_screen(screen);
 490    if (!(vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_COMPUTE_SHADER))
 491       return 0;
 492    switch (param) {
 493    case PIPE_COMPUTE_CAP_MAX_GRID_SIZE:
 494       if (ret) {
 495          uint64_t *grid_size = ret;
 496          grid_size[0] = vscreen->caps.caps.v2.max_compute_grid_size[0];
 497          grid_size[1] = vscreen->caps.caps.v2.max_compute_grid_size[1];
 498          grid_size[2] = vscreen->caps.caps.v2.max_compute_grid_size[2];
 499       }
 500       return 3 * sizeof(uint64_t) ;
 501    case PIPE_COMPUTE_CAP_MAX_BLOCK_SIZE:
 502       if (ret) {
 503          uint64_t *block_size = ret;
 504          block_size[0] = vscreen->caps.caps.v2.max_compute_block_size[0];
 505          block_size[1] = vscreen->caps.caps.v2.max_compute_block_size[1];
 506          block_size[2] = vscreen->caps.caps.v2.max_compute_block_size[2];
 507       }
 508       return 3 * sizeof(uint64_t);
 509    case PIPE_COMPUTE_CAP_MAX_THREADS_PER_BLOCK:
 510       if (ret) {
 511          uint64_t *max_threads_per_block = ret;
 512          *max_threads_per_block = vscreen->caps.caps.v2.max_compute_work_group_invocations;
 513       }
 514       return sizeof(uint64_t);
 515    case PIPE_COMPUTE_CAP_MAX_LOCAL_SIZE:
 516       if (ret) {
 517          uint64_t *max_local_size = ret;
 518          /* Value reported by the closed source driver. */
 519          *max_local_size = vscreen->caps.caps.v2.max_compute_shared_memory_size;
 520       }
 521       return sizeof(uint64_t);
 522    default:
 523       break;
 524    }
 525    return 0;
 526 }
 527
 528 static boolean
 529 virgl_is_vertex_format_supported(struct pipe_screen *screen,
 530                                  enum pipe_format format)
 531 {
 532    struct virgl_screen *vscreen = virgl_screen(screen);
 533    const struct util_format_description *format_desc;
 534    int i;
 535
 536    format_desc = util_format_description(format);
 537    if (!format_desc)
 538       return FALSE;
 539
 540    if (format == PIPE_FORMAT_R11G11B10_FLOAT) {
 541       int vformat = VIRGL_FORMAT_R11G11B10_FLOAT;
 542       int big = vformat / 32;
 543       int small = vformat % 32;
 544       if (!(vscreen->caps.caps.v1.vertexbuffer.bitmask[big] & (1 << small)))
 545          return FALSE;
 546       return TRUE;
 547    }
 548
 549    /* Find the first non-VOID channel. */
 550    for (i = 0; i < 4; i++) {
 551       if (format_desc->channel[i].type != UTIL_FORMAT_TYPE_VOID) {
 552          break;
 553       }
 554    }
 555
 556    if (i == 4)
 557       return FALSE;
 558
 559    if (format_desc->layout != UTIL_FORMAT_LAYOUT_PLAIN)
 560       return FALSE;
 561
 562    if (format_desc->channel[i].type == UTIL_FORMAT_TYPE_FIXED)
 563       return FALSE;
 564    return TRUE;
 565 }
 566
 567 /**
 568  * Query format support for creating a texture, drawing surface, etc.
 569  * \param format  the format to test
 570  * \param type  one of PIPE_TEXTURE, PIPE_SURFACE
 571  */
 572 static boolean
 573 virgl_is_format_supported( struct pipe_screen *screen,
 574                                  enum pipe_format format,
 575                                  enum pipe_texture_target target,
 576                                  unsigned sample_count,
 577                                  unsigned storage_sample_count,
 578                                  unsigned bind)
 579 {
 580    struct virgl_screen *vscreen = virgl_screen(screen);
 581    const struct util_format_description *format_desc;
 582    int i;
 583
 584    if (MAX2(1, sample_count) != MAX2(1, storage_sample_count))
 585       return false;
 586
 587    assert(target == PIPE_BUFFER ||
 588           target == PIPE_TEXTURE_1D ||
 589           target == PIPE_TEXTURE_1D_ARRAY ||
 590           target == PIPE_TEXTURE_2D ||
 591           target == PIPE_TEXTURE_2D_ARRAY ||
 592           target == PIPE_TEXTURE_RECT ||
 593           target == PIPE_TEXTURE_3D ||
 594           target == PIPE_TEXTURE_CUBE ||
 595           target == PIPE_TEXTURE_CUBE_ARRAY);
 596
 597    format_desc = util_format_description(format);
 598    if (!format_desc)
 599       return FALSE;
 600
 601    if (util_format_is_intensity(format))
 602       return FALSE;
 603
 604    if (sample_count > 1) {
 605       if (!vscreen->caps.caps.v1.bset.texture_multisample)
 606          return FALSE;
 607
 608       if (bind & PIPE_BIND_SHADER_IMAGE) {
 609          if (sample_count > vscreen->caps.caps.v2.max_image_samples)
 610             return FALSE;
 611       }
 612
 613       if (sample_count > vscreen->caps.caps.v1.max_samples)
 614          return FALSE;
 615    }
 616
 617    if (bind & PIPE_BIND_VERTEX_BUFFER) {
 618       return virgl_is_vertex_format_supported(screen, format);
 619    }
 620
 621    if (util_format_is_compressed(format) && target == PIPE_BUFFER)
 622       return FALSE;
 623
 624    /* Allow 3-comp 32 bit textures only for TBOs (needed for ARB_tbo_rgb32) */
 625    if ((format == PIPE_FORMAT_R32G32B32_FLOAT ||
 626        format == PIPE_FORMAT_R32G32B32_SINT ||
 627        format == PIPE_FORMAT_R32G32B32_UINT) &&
 628        target != PIPE_BUFFER)
 629       return FALSE;
 630
 631    if ((format_desc->layout == UTIL_FORMAT_LAYOUT_RGTC ||
 632         format_desc->layout == UTIL_FORMAT_LAYOUT_ETC ||
 633         format_desc->layout == UTIL_FORMAT_LAYOUT_S3TC) &&
 634        target == PIPE_TEXTURE_3D)
 635       return FALSE;
 636
 637    if (bind & PIPE_BIND_RENDER_TARGET) {
 638       /* For ARB_framebuffer_no_attachments. */
 639       if (format == PIPE_FORMAT_NONE)
 640          return TRUE;
 641
 642       if (format_desc->colorspace == UTIL_FORMAT_COLORSPACE_ZS)
 643          return FALSE;
 644
 645       /*
 646        * Although possible, it is unnatural to render into compressed or YUV
 647        * surfaces. So disable these here to avoid going into weird paths
 648        * inside the state trackers.
 649        */
 650       if (format_desc->block.width != 1 ||
 651           format_desc->block.height != 1)
 652          return FALSE;
 653
 654       {
 655          int big = format / 32;
 656          int small = format % 32;
 657          if (!(vscreen->caps.caps.v1.render.bitmask[big] & (1 << small)))
 658             return FALSE;
 659       }
 660    }
 661
 662    if (bind & PIPE_BIND_DEPTH_STENCIL) {
 663       if (format_desc->colorspace != UTIL_FORMAT_COLORSPACE_ZS)
 664          return FALSE;
 665    }
 666
 667    /*
 668     * All other operations (sampling, transfer, etc).
 669     */
 670
 671    if (format_desc->layout == UTIL_FORMAT_LAYOUT_S3TC) {
 672       goto out_lookup;
 673    }
 674    if (format_desc->layout == UTIL_FORMAT_LAYOUT_RGTC) {
 675       goto out_lookup;
 676    }
 677    if (format_desc->layout == UTIL_FORMAT_LAYOUT_BPTC) {
 678       goto out_lookup;
 679    }
 680
 681    if (format == PIPE_FORMAT_R11G11B10_FLOAT) {
 682       goto out_lookup;
 683    } else if (format == PIPE_FORMAT_R9G9B9E5_FLOAT) {
 684       goto out_lookup;
 685    }
 686
 687    /* Find the first non-VOID channel. */
 688    for (i = 0; i < 4; i++) {
 689       if (format_desc->channel[i].type != UTIL_FORMAT_TYPE_VOID) {
 690          break;
 691       }
 692    }
 693
 694    if (i == 4)
 695       return FALSE;
 696
 697    /* no L4A4 */
 698    if (format_desc->nr_channels < 4 && format_desc->channel[i].size == 4)
 699       return FALSE;
 700
 701  out_lookup:
 702    {
 703       int big = format / 32;
 704       int small = format % 32;
 705       if (!(vscreen->caps.caps.v1.sampler.bitmask[big] & (1 << small)))
 706          return FALSE;
 707    }
 708    /*
 709     * Everything else should be supported by u_format.
 710     */
 711    return TRUE;
 712 }
 713
 714 static void virgl_flush_frontbuffer(struct pipe_screen *screen,
 715                                       struct pipe_resource *res,
 716                                       unsigned level, unsigned layer,
 717                                     void *winsys_drawable_handle, struct pipe_box *sub_box)
 718 {
 719    struct virgl_screen *vscreen = virgl_screen(screen);
 720    struct virgl_winsys *vws = vscreen->vws;
 721    struct virgl_resource *vres = virgl_resource(res);
 722
 723    if (vws->flush_frontbuffer)
 724       vws->flush_frontbuffer(vws, vres->hw_res, level, layer, winsys_drawable_handle,
 725                              sub_box);
 726 }
 727
 728 static void virgl_fence_reference(struct pipe_screen *screen,
 729                                   struct pipe_fence_handle **ptr,
 730                                   struct pipe_fence_handle *fence)
 731 {
 732    struct virgl_screen *vscreen = virgl_screen(screen);
 733    struct virgl_winsys *vws = vscreen->vws;
 734
 735    vws->fence_reference(vws, ptr, fence);
 736 }
 737
 738 static boolean virgl_fence_finish(struct pipe_screen *screen,
 739                                   struct pipe_context *ctx,
 740                                   struct pipe_fence_handle *fence,
 741                                   uint64_t timeout)
 742 {
 743    struct virgl_screen *vscreen = virgl_screen(screen);
 744    struct virgl_winsys *vws = vscreen->vws;
 745
 746    return vws->fence_wait(vws, fence, timeout);
 747 }
 748
 749 static int virgl_fence_get_fd(struct pipe_screen *screen,
 750             struct pipe_fence_handle *fence)
 751 {
 752    struct virgl_screen *vscreen = virgl_screen(screen);
 753    struct virgl_winsys *vws = vscreen->vws;
 754
 755    return vws->fence_get_fd(vws, fence);
 756 }
 757
 758 static uint64_t
 759 virgl_get_timestamp(struct pipe_screen *_screen)
 760 {
 761    return os_time_get_nano();
 762 }
 763
 764 static void
 765 virgl_destroy_screen(struct pipe_screen *screen)
 766 {
 767    struct virgl_screen *vscreen = virgl_screen(screen);
 768    struct virgl_winsys *vws = vscreen->vws;
 769
 770    slab_destroy_parent(&vscreen->transfer_pool);
 771
 772    if (vws)
 773       vws->destroy(vws);
 774    FREE(vscreen);
 775 }
 776
 777 struct pipe_screen *
 778 virgl_create_screen(struct virgl_winsys *vws)
 779 {
 780    struct virgl_screen *screen = CALLOC_STRUCT(virgl_screen);
 781
 782    if (!screen)
 783       return NULL;
 784
 785    virgl_debug = debug_get_option_virgl_debug();
 786
 787    screen->vws = vws;
 788    screen->base.get_name = virgl_get_name;
 789    screen->base.get_vendor = virgl_get_vendor;
 790    screen->base.get_param = virgl_get_param;
 791    screen->base.get_shader_param = virgl_get_shader_param;
 792    screen->base.get_compute_param = virgl_get_compute_param;
 793    screen->base.get_paramf = virgl_get_paramf;
 794    screen->base.is_format_supported = virgl_is_format_supported;
 795    screen->base.destroy = virgl_destroy_screen;
 796    screen->base.context_create = virgl_context_create;
 797    screen->base.flush_frontbuffer = virgl_flush_frontbuffer;
 798    screen->base.get_timestamp = virgl_get_timestamp;
 799    screen->base.fence_reference = virgl_fence_reference;
 800    //screen->base.fence_signalled = virgl_fence_signalled;
 801    screen->base.fence_finish = virgl_fence_finish;
 802    screen->base.fence_get_fd = virgl_fence_get_fd;
 803
 804    virgl_init_screen_resource_functions(&screen->base);
 805
 806    vws->get_caps(vws, &screen->caps);
 807
 808    screen->refcnt = 1;
 809
 810    slab_create_parent(&screen->transfer_pool, sizeof(struct virgl_transfer), 16);
 811
 812    return &screen->base;
 813 }