20c72fd214734d01fbeefa3eae5e3803ef4713df
[mesa.git] / src / gallium / drivers / zink / nir_to_spirv / nir_to_spirv.c
1 /*
2 * Copyright 2018 Collabora Ltd.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 */
23
24 #include "nir_to_spirv.h"
25 #include "spirv_builder.h"
26
27 #include "nir.h"
28 #include "pipe/p_state.h"
29 #include "util/u_memory.h"
30
31 struct ntv_context {
32 struct spirv_builder builder;
33
34 SpvId GLSL_std_450;
35
36 gl_shader_stage stage;
37 SpvId inputs[PIPE_MAX_SHADER_INPUTS][4];
38 SpvId input_types[PIPE_MAX_SHADER_INPUTS][4];
39 SpvId outputs[PIPE_MAX_SHADER_OUTPUTS][4];
40 SpvId output_types[PIPE_MAX_SHADER_OUTPUTS][4];
41
42 SpvId ubos[128];
43 size_t num_ubos;
44 SpvId samplers[PIPE_MAX_SAMPLERS];
45 size_t num_samplers;
46 SpvId entry_ifaces[PIPE_MAX_SHADER_INPUTS * 4 + PIPE_MAX_SHADER_OUTPUTS * 4];
47 size_t num_entry_ifaces;
48
49 SpvId *defs;
50 size_t num_defs;
51
52 struct hash_table *vars;
53
54 const SpvId *block_ids;
55 size_t num_blocks;
56 bool block_started;
57 SpvId loop_break, loop_cont;
58 };
59
60 static SpvId
61 get_fvec_constant(struct ntv_context *ctx, int bit_size, int num_components,
62 const float values[]);
63
64 static SpvId
65 get_uvec_constant(struct ntv_context *ctx, int bit_size, int num_components,
66 const uint32_t values[]);
67
68 static SpvId
69 emit_unop(struct ntv_context *ctx, SpvOp op, SpvId type, SpvId src);
70
71 static SpvId
72 emit_binop(struct ntv_context *ctx, SpvOp op, SpvId type,
73 SpvId src0, SpvId src1);
74
75 static SpvId
76 emit_triop(struct ntv_context *ctx, SpvOp op, SpvId type,
77 SpvId src0, SpvId src1, SpvId src2);
78
79 static SpvId
80 get_bvec_type(struct ntv_context *ctx, int num_components)
81 {
82 SpvId bool_type = spirv_builder_type_bool(&ctx->builder);
83 if (num_components > 1)
84 return spirv_builder_type_vector(&ctx->builder, bool_type,
85 num_components);
86
87 assert(num_components == 1);
88 return bool_type;
89 }
90
91 static SpvId
92 block_label(struct ntv_context *ctx, nir_block *block)
93 {
94 assert(block->index < ctx->num_blocks);
95 return ctx->block_ids[block->index];
96 }
97
98 static SpvId
99 get_fvec_type(struct ntv_context *ctx, unsigned bit_size, unsigned num_components)
100 {
101 assert(bit_size == 32); // only 32-bit floats supported so far
102
103 SpvId float_type = spirv_builder_type_float(&ctx->builder, bit_size);
104 if (num_components > 1)
105 return spirv_builder_type_vector(&ctx->builder, float_type,
106 num_components);
107
108 assert(num_components == 1);
109 return float_type;
110 }
111
112 static SpvId
113 get_ivec_type(struct ntv_context *ctx, unsigned bit_size, unsigned num_components)
114 {
115 assert(bit_size == 32); // only 32-bit ints supported so far
116
117 SpvId int_type = spirv_builder_type_int(&ctx->builder, bit_size);
118 if (num_components > 1)
119 return spirv_builder_type_vector(&ctx->builder, int_type,
120 num_components);
121
122 assert(num_components == 1);
123 return int_type;
124 }
125
126 static SpvId
127 get_uvec_type(struct ntv_context *ctx, unsigned bit_size, unsigned num_components)
128 {
129 assert(bit_size == 32); // only 32-bit uints supported so far
130
131 SpvId uint_type = spirv_builder_type_uint(&ctx->builder, bit_size);
132 if (num_components > 1)
133 return spirv_builder_type_vector(&ctx->builder, uint_type,
134 num_components);
135
136 assert(num_components == 1);
137 return uint_type;
138 }
139
140 static SpvId
141 get_dest_uvec_type(struct ntv_context *ctx, nir_dest *dest)
142 {
143 return get_uvec_type(ctx, nir_dest_bit_size(*dest),
144 nir_dest_num_components(*dest));
145 }
146
147 static SpvId
148 get_glsl_basetype(struct ntv_context *ctx, enum glsl_base_type type)
149 {
150 switch (type) {
151 case GLSL_TYPE_FLOAT:
152 return spirv_builder_type_float(&ctx->builder, 32);
153
154 case GLSL_TYPE_INT:
155 return spirv_builder_type_int(&ctx->builder, 32);
156
157 case GLSL_TYPE_UINT:
158 return spirv_builder_type_uint(&ctx->builder, 32);
159 /* TODO: handle more types */
160
161 default:
162 unreachable("unknown GLSL type");
163 }
164 }
165
166 static SpvId
167 get_glsl_type(struct ntv_context *ctx, const struct glsl_type *type)
168 {
169 assert(type);
170 if (glsl_type_is_scalar(type))
171 return get_glsl_basetype(ctx, glsl_get_base_type(type));
172
173 if (glsl_type_is_vector(type))
174 return spirv_builder_type_vector(&ctx->builder,
175 get_glsl_basetype(ctx, glsl_get_base_type(type)),
176 glsl_get_vector_elements(type));
177
178 unreachable("we shouldn't get here, I think...");
179 }
180
181 static void
182 emit_input(struct ntv_context *ctx, struct nir_variable *var)
183 {
184 SpvId vec_type = get_glsl_type(ctx, var->type);
185 SpvId pointer_type = spirv_builder_type_pointer(&ctx->builder,
186 SpvStorageClassInput,
187 vec_type);
188 SpvId var_id = spirv_builder_emit_var(&ctx->builder, pointer_type,
189 SpvStorageClassInput);
190
191 if (var->name)
192 spirv_builder_emit_name(&ctx->builder, var_id, var->name);
193
194 if (ctx->stage == MESA_SHADER_FRAGMENT) {
195 switch (var->data.location) {
196 case VARYING_SLOT_POS:
197 spirv_builder_emit_builtin(&ctx->builder, var_id, SpvBuiltInFragCoord);
198 break;
199
200 case VARYING_SLOT_PNTC:
201 spirv_builder_emit_builtin(&ctx->builder, var_id, SpvBuiltInPointCoord);
202 break;
203
204 default:
205 spirv_builder_emit_location(&ctx->builder, var_id,
206 var->data.driver_location);
207 break;
208 }
209 } else {
210 spirv_builder_emit_location(&ctx->builder, var_id,
211 var->data.driver_location);
212 }
213
214 if (var->data.location_frac)
215 spirv_builder_emit_component(&ctx->builder, var_id,
216 var->data.location_frac);
217
218 if (var->data.interpolation == INTERP_MODE_FLAT)
219 spirv_builder_emit_decoration(&ctx->builder, var_id, SpvDecorationFlat);
220
221 assert(var->data.driver_location < PIPE_MAX_SHADER_INPUTS);
222 assert(var->data.location_frac < 4);
223 assert(ctx->inputs[var->data.driver_location][var->data.location_frac] == 0);
224 ctx->inputs[var->data.driver_location][var->data.location_frac] = var_id;
225 ctx->input_types[var->data.driver_location][var->data.location_frac] = vec_type;
226
227 assert(ctx->num_entry_ifaces < ARRAY_SIZE(ctx->entry_ifaces));
228 ctx->entry_ifaces[ctx->num_entry_ifaces++] = var_id;
229 }
230
231 static void
232 emit_output(struct ntv_context *ctx, struct nir_variable *var)
233 {
234 SpvId vec_type = get_glsl_type(ctx, var->type);
235 SpvId pointer_type = spirv_builder_type_pointer(&ctx->builder,
236 SpvStorageClassOutput,
237 vec_type);
238 SpvId var_id = spirv_builder_emit_var(&ctx->builder, pointer_type,
239 SpvStorageClassOutput);
240 if (var->name)
241 spirv_builder_emit_name(&ctx->builder, var_id, var->name);
242
243
244 if (ctx->stage == MESA_SHADER_VERTEX) {
245 switch (var->data.location) {
246 case VARYING_SLOT_POS:
247 spirv_builder_emit_builtin(&ctx->builder, var_id, SpvBuiltInPosition);
248 break;
249
250 case VARYING_SLOT_PSIZ:
251 spirv_builder_emit_builtin(&ctx->builder, var_id, SpvBuiltInPointSize);
252 break;
253
254 default:
255 spirv_builder_emit_location(&ctx->builder, var_id,
256 var->data.driver_location - 1);
257 }
258 } else if (ctx->stage == MESA_SHADER_FRAGMENT) {
259 switch (var->data.location) {
260 case FRAG_RESULT_DEPTH:
261 spirv_builder_emit_builtin(&ctx->builder, var_id, SpvBuiltInFragDepth);
262 break;
263
264 default:
265 spirv_builder_emit_location(&ctx->builder, var_id,
266 var->data.driver_location);
267 }
268 }
269
270 if (var->data.location_frac)
271 spirv_builder_emit_component(&ctx->builder, var_id,
272 var->data.location_frac);
273
274 assert(var->data.driver_location < PIPE_MAX_SHADER_INPUTS);
275 assert(var->data.location_frac < 4);
276 assert(ctx->outputs[var->data.driver_location][var->data.location_frac] == 0);
277 ctx->outputs[var->data.driver_location][var->data.location_frac] = var_id;
278 ctx->output_types[var->data.driver_location][var->data.location_frac] = vec_type;
279
280 assert(ctx->num_entry_ifaces < ARRAY_SIZE(ctx->entry_ifaces));
281 ctx->entry_ifaces[ctx->num_entry_ifaces++] = var_id;
282 }
283
284 static SpvDim
285 type_to_dim(enum glsl_sampler_dim gdim, bool *is_ms)
286 {
287 *is_ms = false;
288 switch (gdim) {
289 case GLSL_SAMPLER_DIM_1D:
290 return SpvDim1D;
291 case GLSL_SAMPLER_DIM_2D:
292 return SpvDim2D;
293 case GLSL_SAMPLER_DIM_RECT:
294 return SpvDimRect;
295 case GLSL_SAMPLER_DIM_CUBE:
296 return SpvDimCube;
297 case GLSL_SAMPLER_DIM_3D:
298 return SpvDim3D;
299 case GLSL_SAMPLER_DIM_MS:
300 *is_ms = true;
301 return SpvDim2D;
302 default:
303 fprintf(stderr, "unknown sampler type %d\n", gdim);
304 break;
305 }
306 return SpvDim2D;
307 }
308
309 static void
310 emit_sampler(struct ntv_context *ctx, struct nir_variable *var)
311 {
312 bool is_ms;
313 SpvDim dimension = type_to_dim(glsl_get_sampler_dim(var->type), &is_ms);
314 SpvId float_type = spirv_builder_type_float(&ctx->builder, 32);
315 SpvId image_type = spirv_builder_type_image(&ctx->builder, float_type,
316 dimension, false, glsl_sampler_type_is_array(var->type), is_ms, 1,
317 SpvImageFormatUnknown);
318
319 SpvId sampled_type = spirv_builder_type_sampled_image(&ctx->builder,
320 image_type);
321 SpvId pointer_type = spirv_builder_type_pointer(&ctx->builder,
322 SpvStorageClassUniformConstant,
323 sampled_type);
324 SpvId var_id = spirv_builder_emit_var(&ctx->builder, pointer_type,
325 SpvStorageClassUniformConstant);
326
327 if (var->name)
328 spirv_builder_emit_name(&ctx->builder, var_id, var->name);
329
330 assert(ctx->num_samplers < ARRAY_SIZE(ctx->samplers));
331 ctx->samplers[ctx->num_samplers++] = var_id;
332
333 spirv_builder_emit_descriptor_set(&ctx->builder, var_id,
334 var->data.descriptor_set);
335 spirv_builder_emit_binding(&ctx->builder, var_id, var->data.binding);
336 }
337
338 static void
339 emit_ubo(struct ntv_context *ctx, struct nir_variable *var)
340 {
341 uint32_t size = glsl_count_attribute_slots(var->type, false);
342 SpvId vec4_type = get_uvec_type(ctx, 32, 4);
343 SpvId array_length = spirv_builder_const_uint(&ctx->builder, 32, size);
344 SpvId array_type = spirv_builder_type_array(&ctx->builder, vec4_type,
345 array_length);
346 spirv_builder_emit_array_stride(&ctx->builder, array_type, 16);
347
348 // wrap UBO-array in a struct
349 SpvId struct_type = spirv_builder_type_struct(&ctx->builder, &array_type, 1);
350 if (var->name) {
351 char struct_name[100];
352 snprintf(struct_name, sizeof(struct_name), "struct_%s", var->name);
353 spirv_builder_emit_name(&ctx->builder, struct_type, struct_name);
354 }
355
356 spirv_builder_emit_decoration(&ctx->builder, struct_type,
357 SpvDecorationBlock);
358 spirv_builder_emit_member_offset(&ctx->builder, struct_type, 0, 0);
359
360
361 SpvId pointer_type = spirv_builder_type_pointer(&ctx->builder,
362 SpvStorageClassUniform,
363 struct_type);
364
365 SpvId var_id = spirv_builder_emit_var(&ctx->builder, pointer_type,
366 SpvStorageClassUniform);
367 if (var->name)
368 spirv_builder_emit_name(&ctx->builder, var_id, var->name);
369
370 assert(ctx->num_ubos < ARRAY_SIZE(ctx->ubos));
371 ctx->ubos[ctx->num_ubos++] = var_id;
372
373 spirv_builder_emit_descriptor_set(&ctx->builder, var_id,
374 var->data.descriptor_set);
375 spirv_builder_emit_binding(&ctx->builder, var_id, var->data.binding);
376 }
377
378 static void
379 emit_uniform(struct ntv_context *ctx, struct nir_variable *var)
380 {
381 if (glsl_type_is_sampler(var->type))
382 emit_sampler(ctx, var);
383 else if (var->interface_type)
384 emit_ubo(ctx, var);
385 }
386
387 static SpvId
388 get_src_uint_ssa(struct ntv_context *ctx, const nir_ssa_def *ssa)
389 {
390 assert(ssa->index < ctx->num_defs);
391 assert(ctx->defs[ssa->index] != 0);
392 return ctx->defs[ssa->index];
393 }
394
395 static SpvId
396 get_var_from_reg(struct ntv_context *ctx, nir_register *reg)
397 {
398 struct hash_entry *he = _mesa_hash_table_search(ctx->vars, reg);
399 if (!he) {
400 SpvId type = get_uvec_type(ctx, reg->bit_size, reg->num_components);
401 SpvId pointer_type = spirv_builder_type_pointer(&ctx->builder,
402 SpvStorageClassFunction,
403 type);
404
405 SpvId var = spirv_builder_emit_var(&ctx->builder, pointer_type,
406 SpvStorageClassFunction);
407
408 he = _mesa_hash_table_insert(ctx->vars, reg, (void *)(intptr_t)var);
409 }
410 return (SpvId)(intptr_t)he->data;
411 }
412
413 static SpvId
414 get_src_uint_reg(struct ntv_context *ctx, const nir_reg_src *reg)
415 {
416 assert(reg->reg);
417 assert(!reg->indirect);
418 assert(!reg->base_offset);
419
420 SpvId var = get_var_from_reg(ctx, reg->reg);
421 SpvId type = get_uvec_type(ctx, reg->reg->bit_size, reg->reg->num_components);
422 return spirv_builder_emit_load(&ctx->builder, type, var);
423 }
424
425 static SpvId
426 get_src_uint(struct ntv_context *ctx, nir_src *src)
427 {
428 if (src->is_ssa)
429 return get_src_uint_ssa(ctx, src->ssa);
430 else
431 return get_src_uint_reg(ctx, &src->reg);
432 }
433
434 static SpvId
435 get_alu_src_uint(struct ntv_context *ctx, nir_alu_instr *alu, unsigned src)
436 {
437 assert(!alu->src[src].negate);
438 assert(!alu->src[src].abs);
439
440 SpvId def = get_src_uint(ctx, &alu->src[src].src);
441
442 unsigned used_channels = 0;
443 bool need_swizzle = false;
444 for (unsigned i = 0; i < NIR_MAX_VEC_COMPONENTS; i++) {
445 if (!nir_alu_instr_channel_used(alu, src, i))
446 continue;
447
448 used_channels++;
449
450 if (alu->src[src].swizzle[i] != i)
451 need_swizzle = true;
452 }
453 assert(used_channels != 0);
454
455 unsigned live_channels = nir_src_num_components(alu->src[src].src);
456 if (used_channels != live_channels)
457 need_swizzle = true;
458
459 if (!need_swizzle)
460 return def;
461
462 int bit_size = nir_src_bit_size(alu->src[src].src);
463
464 SpvId uint_type = spirv_builder_type_uint(&ctx->builder, bit_size);
465 if (used_channels == 1) {
466 uint32_t indices[] = { alu->src[src].swizzle[0] };
467 return spirv_builder_emit_composite_extract(&ctx->builder, uint_type,
468 def, indices,
469 ARRAY_SIZE(indices));
470 } else if (live_channels == 1) {
471 SpvId uvec_type = spirv_builder_type_vector(&ctx->builder, uint_type,
472 used_channels);
473
474 SpvId constituents[NIR_MAX_VEC_COMPONENTS];
475 for (unsigned i = 0; i < used_channels; ++i)
476 constituents[i] = def;
477
478 return spirv_builder_emit_composite_construct(&ctx->builder, uvec_type,
479 constituents,
480 used_channels);
481 } else {
482 SpvId uvec_type = spirv_builder_type_vector(&ctx->builder, uint_type,
483 used_channels);
484
485 uint32_t components[NIR_MAX_VEC_COMPONENTS];
486 size_t num_components = 0;
487 for (unsigned i = 0; i < NIR_MAX_VEC_COMPONENTS; i++) {
488 if (!nir_alu_instr_channel_used(alu, src, i))
489 continue;
490
491 components[num_components++] = alu->src[src].swizzle[i];
492 }
493
494 return spirv_builder_emit_vector_shuffle(&ctx->builder, uvec_type,
495 def, def, components, num_components);
496 }
497 }
498
499 static void
500 store_ssa_def_uint(struct ntv_context *ctx, nir_ssa_def *ssa, SpvId result)
501 {
502 assert(result != 0);
503 assert(ssa->index < ctx->num_defs);
504 ctx->defs[ssa->index] = result;
505 }
506
507 static SpvId
508 bvec_to_uvec(struct ntv_context *ctx, SpvId value, unsigned num_components)
509 {
510 SpvId otype = get_uvec_type(ctx, 32, num_components);
511 uint32_t zeros[4] = { 0, 0, 0, 0 };
512 uint32_t ones[4] = { 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff };
513 SpvId zero = get_uvec_constant(ctx, 32, num_components, zeros);
514 SpvId one = get_uvec_constant(ctx, 32, num_components, ones);
515 return emit_triop(ctx, SpvOpSelect, otype, value, one, zero);
516 }
517
518 static SpvId
519 uvec_to_bvec(struct ntv_context *ctx, SpvId value, unsigned num_components)
520 {
521 SpvId type = get_bvec_type(ctx, num_components);
522
523 uint32_t zeros[NIR_MAX_VEC_COMPONENTS] = { 0 };
524 SpvId zero = get_uvec_constant(ctx, 32, num_components, zeros);
525
526 return emit_binop(ctx, SpvOpINotEqual, type, value, zero);
527 }
528
529 static SpvId
530 bitcast_to_uvec(struct ntv_context *ctx, SpvId value, unsigned bit_size,
531 unsigned num_components)
532 {
533 SpvId type = get_uvec_type(ctx, bit_size, num_components);
534 return emit_unop(ctx, SpvOpBitcast, type, value);
535 }
536
537 static SpvId
538 bitcast_to_ivec(struct ntv_context *ctx, SpvId value, unsigned bit_size,
539 unsigned num_components)
540 {
541 SpvId type = get_ivec_type(ctx, bit_size, num_components);
542 return emit_unop(ctx, SpvOpBitcast, type, value);
543 }
544
545 static SpvId
546 bitcast_to_fvec(struct ntv_context *ctx, SpvId value, unsigned bit_size,
547 unsigned num_components)
548 {
549 SpvId type = get_fvec_type(ctx, bit_size, num_components);
550 return emit_unop(ctx, SpvOpBitcast, type, value);
551 }
552
553 static void
554 store_reg_def(struct ntv_context *ctx, nir_reg_dest *reg, SpvId result)
555 {
556 SpvId var = get_var_from_reg(ctx, reg->reg);
557 assert(var);
558 spirv_builder_emit_store(&ctx->builder, var, result);
559 }
560
561 static void
562 store_dest_uint(struct ntv_context *ctx, nir_dest *dest, SpvId result)
563 {
564 if (dest->is_ssa)
565 store_ssa_def_uint(ctx, &dest->ssa, result);
566 else
567 store_reg_def(ctx, &dest->reg, result);
568 }
569
570 static void
571 store_dest(struct ntv_context *ctx, nir_dest *dest, SpvId result, nir_alu_type type)
572 {
573 unsigned num_components = nir_dest_num_components(*dest);
574 unsigned bit_size = nir_dest_bit_size(*dest);
575
576 switch (nir_alu_type_get_base_type(type)) {
577 case nir_type_bool:
578 assert(bit_size == 1);
579 result = bvec_to_uvec(ctx, result, num_components);
580 break;
581
582 case nir_type_uint:
583 break; /* nothing to do! */
584
585 case nir_type_int:
586 case nir_type_float:
587 result = bitcast_to_uvec(ctx, result, bit_size, num_components);
588 break;
589
590 default:
591 unreachable("unsupported nir_alu_type");
592 }
593
594 store_dest_uint(ctx, dest, result);
595 }
596
597 static SpvId
598 emit_unop(struct ntv_context *ctx, SpvOp op, SpvId type, SpvId src)
599 {
600 return spirv_builder_emit_unop(&ctx->builder, op, type, src);
601 }
602
603 static SpvId
604 emit_binop(struct ntv_context *ctx, SpvOp op, SpvId type,
605 SpvId src0, SpvId src1)
606 {
607 return spirv_builder_emit_binop(&ctx->builder, op, type, src0, src1);
608 }
609
610 static SpvId
611 emit_triop(struct ntv_context *ctx, SpvOp op, SpvId type,
612 SpvId src0, SpvId src1, SpvId src2)
613 {
614 return spirv_builder_emit_triop(&ctx->builder, op, type, src0, src1, src2);
615 }
616
617 static SpvId
618 emit_builtin_unop(struct ntv_context *ctx, enum GLSLstd450 op, SpvId type,
619 SpvId src)
620 {
621 SpvId args[] = { src };
622 return spirv_builder_emit_ext_inst(&ctx->builder, type, ctx->GLSL_std_450,
623 op, args, ARRAY_SIZE(args));
624 }
625
626 static SpvId
627 emit_builtin_binop(struct ntv_context *ctx, enum GLSLstd450 op, SpvId type,
628 SpvId src0, SpvId src1)
629 {
630 SpvId args[] = { src0, src1 };
631 return spirv_builder_emit_ext_inst(&ctx->builder, type, ctx->GLSL_std_450,
632 op, args, ARRAY_SIZE(args));
633 }
634
635 static SpvId
636 get_fvec_constant(struct ntv_context *ctx, int bit_size, int num_components,
637 const float values[])
638 {
639 assert(bit_size == 32);
640
641 if (num_components > 1) {
642 SpvId components[num_components];
643 for (int i = 0; i < num_components; i++)
644 components[i] = spirv_builder_const_float(&ctx->builder, bit_size,
645 values[i]);
646
647 SpvId type = get_fvec_type(ctx, bit_size, num_components);
648 return spirv_builder_const_composite(&ctx->builder, type, components,
649 num_components);
650 }
651
652 assert(num_components == 1);
653 return spirv_builder_const_float(&ctx->builder, bit_size, values[0]);
654 }
655
656 static SpvId
657 get_uvec_constant(struct ntv_context *ctx, int bit_size, int num_components,
658 const uint32_t values[])
659 {
660 assert(bit_size == 32);
661
662 if (num_components > 1) {
663 SpvId components[num_components];
664 for (int i = 0; i < num_components; i++)
665 components[i] = spirv_builder_const_uint(&ctx->builder, bit_size,
666 values[i]);
667
668 SpvId type = get_uvec_type(ctx, bit_size, num_components);
669 return spirv_builder_const_composite(&ctx->builder, type, components,
670 num_components);
671 }
672
673 assert(num_components == 1);
674 return spirv_builder_const_uint(&ctx->builder, bit_size, values[0]);
675 }
676
677 static inline unsigned
678 alu_instr_src_components(const nir_alu_instr *instr, unsigned src)
679 {
680 if (nir_op_infos[instr->op].input_sizes[src] > 0)
681 return nir_op_infos[instr->op].input_sizes[src];
682
683 if (instr->dest.dest.is_ssa)
684 return instr->dest.dest.ssa.num_components;
685 else
686 return instr->dest.dest.reg.reg->num_components;
687 }
688
689 static SpvId
690 get_alu_src(struct ntv_context *ctx, nir_alu_instr *alu, unsigned src)
691 {
692 SpvId uint_value = get_alu_src_uint(ctx, alu, src);
693
694 unsigned num_components = alu_instr_src_components(alu, src);
695 unsigned bit_size = nir_src_bit_size(alu->src[src].src);
696 nir_alu_type type = nir_op_infos[alu->op].input_types[src];
697
698 switch (nir_alu_type_get_base_type(type)) {
699 case nir_type_bool:
700 assert(bit_size == 1);
701 return uvec_to_bvec(ctx, uint_value, num_components);
702
703 case nir_type_int:
704 return bitcast_to_ivec(ctx, uint_value, bit_size, num_components);
705
706 case nir_type_uint:
707 return uint_value;
708
709 case nir_type_float:
710 return bitcast_to_fvec(ctx, uint_value, bit_size, num_components);
711
712 default:
713 unreachable("unknown nir_alu_type");
714 }
715 }
716
717 static void
718 store_alu_result(struct ntv_context *ctx, nir_alu_instr *alu, SpvId result)
719 {
720 assert(!alu->dest.saturate);
721 return store_dest(ctx, &alu->dest.dest, result, nir_op_infos[alu->op].output_type);
722 }
723
724 static SpvId
725 get_dest_type(struct ntv_context *ctx, nir_dest *dest, nir_alu_type type)
726 {
727 unsigned num_components = nir_dest_num_components(*dest);
728 unsigned bit_size = nir_dest_bit_size(*dest);
729
730 switch (nir_alu_type_get_base_type(type)) {
731 case nir_type_bool:
732 return get_bvec_type(ctx, num_components);
733
734 case nir_type_int:
735 return get_ivec_type(ctx, bit_size, num_components);
736
737 case nir_type_uint:
738 return get_uvec_type(ctx, bit_size, num_components);
739
740 case nir_type_float:
741 return get_fvec_type(ctx, bit_size, num_components);
742
743 default:
744 unreachable("unsupported nir_alu_type");
745 }
746 }
747
748 static void
749 emit_alu(struct ntv_context *ctx, nir_alu_instr *alu)
750 {
751 SpvId src[nir_op_infos[alu->op].num_inputs];
752 for (unsigned i = 0; i < nir_op_infos[alu->op].num_inputs; i++)
753 src[i] = get_alu_src(ctx, alu, i);
754
755 SpvId dest_type = get_dest_type(ctx, &alu->dest.dest,
756 nir_op_infos[alu->op].output_type);
757 unsigned bit_size = nir_dest_bit_size(alu->dest.dest);
758 unsigned num_components = nir_dest_num_components(alu->dest.dest);
759
760 SpvId result = 0;
761 switch (alu->op) {
762 case nir_op_mov:
763 assert(nir_op_infos[alu->op].num_inputs == 1);
764 result = src[0];
765 break;
766
767 #define UNOP(nir_op, spirv_op) \
768 case nir_op: \
769 assert(nir_op_infos[alu->op].num_inputs == 1); \
770 result = emit_unop(ctx, spirv_op, dest_type, src[0]); \
771 break;
772
773 #define BUILTIN_UNOP(nir_op, spirv_op) \
774 case nir_op: \
775 assert(nir_op_infos[alu->op].num_inputs == 1); \
776 result = emit_builtin_unop(ctx, spirv_op, dest_type, src[0]); \
777 break;
778
779 UNOP(nir_op_fneg, SpvOpFNegate)
780 UNOP(nir_op_fddx, SpvOpDPdx)
781 UNOP(nir_op_fddy, SpvOpDPdy)
782
783 BUILTIN_UNOP(nir_op_fabs, GLSLstd450FAbs)
784 BUILTIN_UNOP(nir_op_fsqrt, GLSLstd450Sqrt)
785 BUILTIN_UNOP(nir_op_frsq, GLSLstd450InverseSqrt)
786 BUILTIN_UNOP(nir_op_flog2, GLSLstd450Log2)
787 BUILTIN_UNOP(nir_op_fexp2, GLSLstd450Exp2)
788 BUILTIN_UNOP(nir_op_ffract, GLSLstd450Fract)
789 BUILTIN_UNOP(nir_op_ffloor, GLSLstd450Floor)
790 BUILTIN_UNOP(nir_op_fceil, GLSLstd450Ceil)
791 BUILTIN_UNOP(nir_op_ftrunc, GLSLstd450Trunc)
792 BUILTIN_UNOP(nir_op_fround_even, GLSLstd450RoundEven)
793 BUILTIN_UNOP(nir_op_fsign, GLSLstd450FSign)
794 BUILTIN_UNOP(nir_op_fsin, GLSLstd450Sin)
795 BUILTIN_UNOP(nir_op_fcos, GLSLstd450Cos)
796
797 case nir_op_frcp: {
798 assert(nir_op_infos[alu->op].num_inputs == 1);
799 float one[4] = { 1, 1, 1, 1 };
800 src[1] = src[0];
801 src[0] = get_fvec_constant(ctx, bit_size, num_components, one);
802 result = emit_binop(ctx, SpvOpFDiv, dest_type, src[0], src[1]);
803 }
804 break;
805
806 #undef UNOP
807 #undef BUILTIN_UNOP
808
809 #define BINOP(nir_op, spirv_op) \
810 case nir_op: \
811 assert(nir_op_infos[alu->op].num_inputs == 2); \
812 result = emit_binop(ctx, spirv_op, dest_type, src[0], src[1]); \
813 break;
814
815 #define BUILTIN_BINOP(nir_op, spirv_op) \
816 case nir_op: \
817 assert(nir_op_infos[alu->op].num_inputs == 2); \
818 result = emit_builtin_binop(ctx, spirv_op, dest_type, src[0], src[1]); \
819 break;
820
821 BINOP(nir_op_iadd, SpvOpIAdd)
822 BINOP(nir_op_isub, SpvOpISub)
823 BINOP(nir_op_imul, SpvOpIMul)
824 BINOP(nir_op_fadd, SpvOpFAdd)
825 BINOP(nir_op_fsub, SpvOpFSub)
826 BINOP(nir_op_fmul, SpvOpFMul)
827 BINOP(nir_op_fmod, SpvOpFMod)
828 BINOP(nir_op_flt, SpvOpFUnordLessThan)
829 BINOP(nir_op_fge, SpvOpFUnordGreaterThanEqual)
830
831 BUILTIN_BINOP(nir_op_fmin, GLSLstd450FMin)
832 BUILTIN_BINOP(nir_op_fmax, GLSLstd450FMax)
833
834 #undef BINOP
835 #undef BUILTIN_BINOP
836
837 case nir_op_fdot2:
838 case nir_op_fdot3:
839 case nir_op_fdot4:
840 assert(nir_op_infos[alu->op].num_inputs == 2);
841 result = emit_binop(ctx, SpvOpDot, dest_type, src[0], src[1]);
842 break;
843
844 case nir_op_seq:
845 case nir_op_sne:
846 case nir_op_slt:
847 case nir_op_sge: {
848 assert(nir_op_infos[alu->op].num_inputs == 2);
849 int num_components = nir_dest_num_components(alu->dest.dest);
850 SpvId bool_type = get_bvec_type(ctx, num_components);
851
852 SpvId zero = spirv_builder_const_float(&ctx->builder, 32, 0.0f);
853 SpvId one = spirv_builder_const_float(&ctx->builder, 32, 1.0f);
854 if (num_components > 1) {
855 SpvId zero_comps[num_components], one_comps[num_components];
856 for (int i = 0; i < num_components; i++) {
857 zero_comps[i] = zero;
858 one_comps[i] = one;
859 }
860
861 zero = spirv_builder_const_composite(&ctx->builder, dest_type,
862 zero_comps, num_components);
863 one = spirv_builder_const_composite(&ctx->builder, dest_type,
864 one_comps, num_components);
865 }
866
867 SpvOp op;
868 switch (alu->op) {
869 case nir_op_seq: op = SpvOpFOrdEqual; break;
870 case nir_op_sne: op = SpvOpFOrdNotEqual; break;
871 case nir_op_slt: op = SpvOpFOrdLessThan; break;
872 case nir_op_sge: op = SpvOpFOrdGreaterThanEqual; break;
873 default: unreachable("unexpected op");
874 }
875
876 result = emit_binop(ctx, op, bool_type, src[0], src[1]);
877 result = emit_triop(ctx, SpvOpSelect, dest_type, result, one, zero);
878 }
879 break;
880
881 case nir_op_fcsel: {
882 assert(nir_op_infos[alu->op].num_inputs == 3);
883 int num_components = nir_dest_num_components(alu->dest.dest);
884 SpvId bool_type = get_bvec_type(ctx, num_components);
885
886 float zero[4] = { 0, 0, 0, 0 };
887 SpvId cmp = get_fvec_constant(ctx, nir_src_bit_size(alu->src[0].src),
888 num_components, zero);
889
890 result = emit_binop(ctx, SpvOpFOrdGreaterThan, bool_type, src[0], cmp);
891 result = emit_triop(ctx, SpvOpSelect, dest_type, result, src[1], src[2]);
892 }
893 break;
894
895 case nir_op_vec2:
896 case nir_op_vec3:
897 case nir_op_vec4: {
898 int num_inputs = nir_op_infos[alu->op].num_inputs;
899 assert(2 <= num_inputs && num_inputs <= 4);
900 result = spirv_builder_emit_composite_construct(&ctx->builder, dest_type,
901 src, num_inputs);
902 }
903 break;
904
905 default:
906 fprintf(stderr, "emit_alu: not implemented (%s)\n",
907 nir_op_infos[alu->op].name);
908
909 unreachable("unsupported opcode");
910 return;
911 }
912
913 store_alu_result(ctx, alu, result);
914 }
915
916 static void
917 emit_load_const(struct ntv_context *ctx, nir_load_const_instr *load_const)
918 {
919 uint32_t values[NIR_MAX_VEC_COMPONENTS];
920 for (int i = 0; i < load_const->def.num_components; ++i)
921 values[i] = load_const->value[i].u32;
922
923 SpvId constant = get_uvec_constant(ctx, load_const->def.bit_size,
924 load_const->def.num_components,
925 values);
926 store_ssa_def_uint(ctx, &load_const->def, constant);
927 }
928
929 static void
930 emit_load_input(struct ntv_context *ctx, nir_intrinsic_instr *intr)
931 {
932 nir_const_value *const_offset = nir_src_as_const_value(intr->src[0]);
933 if (const_offset) {
934 int driver_location = (int)nir_intrinsic_base(intr) + const_offset->u32;
935 assert(driver_location < PIPE_MAX_SHADER_INPUTS);
936 int location_frac = nir_intrinsic_component(intr);
937 assert(location_frac < 4);
938
939 SpvId ptr = ctx->inputs[driver_location][location_frac];
940 SpvId type = ctx->input_types[driver_location][location_frac];
941 assert(ptr && type);
942
943 SpvId result = spirv_builder_emit_load(&ctx->builder, type, ptr);
944
945 unsigned num_components = nir_dest_num_components(intr->dest);
946 unsigned bit_size = nir_dest_bit_size(intr->dest);
947 result = bitcast_to_uvec(ctx, result, bit_size, num_components);
948
949 store_dest_uint(ctx, &intr->dest, result);
950 } else
951 unreachable("input-addressing not yet supported");
952 }
953
954 static void
955 emit_load_ubo(struct ntv_context *ctx, nir_intrinsic_instr *intr)
956 {
957 nir_const_value *const_block_index = nir_src_as_const_value(intr->src[0]);
958 assert(const_block_index); // no dynamic indexing for now
959 assert(const_block_index->u32 == 0); // we only support the default UBO for now
960
961 nir_const_value *const_offset = nir_src_as_const_value(intr->src[1]);
962 if (const_offset) {
963 SpvId uvec4_type = get_uvec_type(ctx, 32, 4);
964 SpvId pointer_type = spirv_builder_type_pointer(&ctx->builder,
965 SpvStorageClassUniform,
966 uvec4_type);
967
968 unsigned idx = const_offset->u32;
969 SpvId member = spirv_builder_const_uint(&ctx->builder, 32, 0);
970 SpvId offset = spirv_builder_const_uint(&ctx->builder, 32, idx);
971 SpvId offsets[] = { member, offset };
972 SpvId ptr = spirv_builder_emit_access_chain(&ctx->builder, pointer_type,
973 ctx->ubos[0], offsets,
974 ARRAY_SIZE(offsets));
975 SpvId result = spirv_builder_emit_load(&ctx->builder, uvec4_type, ptr);
976
977 SpvId type = get_dest_uvec_type(ctx, &intr->dest);
978 unsigned num_components = nir_dest_num_components(intr->dest);
979 if (num_components == 1) {
980 uint32_t components[] = { 0 };
981 result = spirv_builder_emit_composite_extract(&ctx->builder,
982 type,
983 result, components,
984 1);
985 } else if (num_components < 4) {
986 SpvId constituents[num_components];
987 SpvId uint_type = spirv_builder_type_uint(&ctx->builder, 32);
988 for (uint32_t i = 0; i < num_components; ++i)
989 constituents[i] = spirv_builder_emit_composite_extract(&ctx->builder,
990 uint_type,
991 result, &i,
992 1);
993
994 result = spirv_builder_emit_composite_construct(&ctx->builder,
995 type,
996 constituents,
997 num_components);
998 }
999
1000 store_dest_uint(ctx, &intr->dest, result);
1001 } else
1002 unreachable("uniform-addressing not yet supported");
1003 }
1004
1005 static void
1006 emit_store_output(struct ntv_context *ctx, nir_intrinsic_instr *intr)
1007 {
1008 nir_const_value *const_offset = nir_src_as_const_value(intr->src[1]);
1009 if (const_offset) {
1010 int driver_location = (int)nir_intrinsic_base(intr) + const_offset->u32;
1011 assert(driver_location < PIPE_MAX_SHADER_OUTPUTS);
1012 int location_frac = nir_intrinsic_component(intr);
1013 assert(location_frac < 4);
1014
1015 SpvId ptr = ctx->outputs[driver_location][location_frac];
1016 assert(ptr > 0);
1017
1018 SpvId src = get_src_uint(ctx, &intr->src[0]);
1019 SpvId spirv_type = ctx->output_types[driver_location][location_frac];
1020 SpvId result = emit_unop(ctx, SpvOpBitcast, spirv_type, src);
1021 spirv_builder_emit_store(&ctx->builder, ptr, result);
1022 } else
1023 unreachable("output-addressing not yet supported");
1024 }
1025
1026 static void
1027 emit_discard(struct ntv_context *ctx, nir_intrinsic_instr *intr)
1028 {
1029 assert(ctx->block_started);
1030 spirv_builder_emit_kill(&ctx->builder);
1031 /* discard is weird in NIR, so let's just create an unreachable block after
1032 it and hope that the vulkan driver will DCE any instructinos in it. */
1033 spirv_builder_label(&ctx->builder, spirv_builder_new_id(&ctx->builder));
1034 }
1035
1036 static void
1037 emit_intrinsic(struct ntv_context *ctx, nir_intrinsic_instr *intr)
1038 {
1039 switch (intr->intrinsic) {
1040 case nir_intrinsic_load_input:
1041 emit_load_input(ctx, intr);
1042 break;
1043
1044 case nir_intrinsic_load_ubo:
1045 emit_load_ubo(ctx, intr);
1046 break;
1047
1048 case nir_intrinsic_store_output:
1049 emit_store_output(ctx, intr);
1050 break;
1051
1052 case nir_intrinsic_discard:
1053 emit_discard(ctx, intr);
1054 break;
1055
1056 default:
1057 fprintf(stderr, "emit_intrinsic: not implemented (%s)\n",
1058 nir_intrinsic_infos[intr->intrinsic].name);
1059 unreachable("unsupported intrinsic");
1060 }
1061 }
1062
1063 static void
1064 emit_undef(struct ntv_context *ctx, nir_ssa_undef_instr *undef)
1065 {
1066 SpvId type = get_fvec_type(ctx, undef->def.bit_size,
1067 undef->def.num_components);
1068
1069 store_ssa_def_uint(ctx, &undef->def,
1070 spirv_builder_emit_undef(&ctx->builder, type));
1071 }
1072
1073 static SpvId
1074 get_src_float(struct ntv_context *ctx, nir_src *src)
1075 {
1076 SpvId def = get_src_uint(ctx, src);
1077 unsigned num_components = nir_src_num_components(*src);
1078 unsigned bit_size = nir_src_bit_size(*src);
1079 return bitcast_to_fvec(ctx, def, bit_size, num_components);
1080 }
1081
1082 static void
1083 emit_tex(struct ntv_context *ctx, nir_tex_instr *tex)
1084 {
1085 assert(tex->op == nir_texop_tex);
1086 assert(nir_alu_type_get_base_type(tex->dest_type) == nir_type_float);
1087 assert(tex->texture_index == tex->sampler_index);
1088
1089 bool has_proj = false;
1090 SpvId coord = 0, proj;
1091 unsigned coord_components;
1092 for (unsigned i = 0; i < tex->num_srcs; i++) {
1093 switch (tex->src[i].src_type) {
1094 case nir_tex_src_coord:
1095 coord = get_src_float(ctx, &tex->src[i].src);
1096 coord_components = nir_src_num_components(tex->src[i].src);
1097 break;
1098
1099 case nir_tex_src_projector:
1100 has_proj = true;
1101 proj = get_src_float(ctx, &tex->src[i].src);
1102 assert(nir_src_num_components(tex->src[i].src) == 1);
1103 break;
1104
1105 default:
1106 fprintf(stderr, "texture source: %d\n", tex->src[i].src_type);
1107 unreachable("unknown texture source");
1108 }
1109 }
1110
1111 bool is_ms;
1112 SpvDim dimension = type_to_dim(tex->sampler_dim, &is_ms);
1113 SpvId float_type = spirv_builder_type_float(&ctx->builder, 32);
1114 SpvId image_type = spirv_builder_type_image(&ctx->builder, float_type,
1115 dimension, false, tex->is_array, is_ms, 1,
1116 SpvImageFormatUnknown);
1117 SpvId sampled_type = spirv_builder_type_sampled_image(&ctx->builder,
1118 image_type);
1119
1120 assert(tex->texture_index < ctx->num_samplers);
1121 SpvId load = spirv_builder_emit_load(&ctx->builder, sampled_type,
1122 ctx->samplers[tex->texture_index]);
1123
1124 SpvId dest_type = get_dest_type(ctx, &tex->dest, tex->dest_type);
1125
1126 SpvId result;
1127 if (has_proj) {
1128 SpvId constituents[coord_components + 1];
1129 SpvId float_type = spirv_builder_type_float(&ctx->builder, 32);
1130 for (uint32_t i = 0; i < coord_components; ++i)
1131 constituents[i] = spirv_builder_emit_composite_extract(&ctx->builder,
1132 float_type,
1133 coord,
1134 &i, 1);
1135
1136 constituents[coord_components++] = proj;
1137
1138 SpvId vec_type = get_fvec_type(ctx, 32, coord_components);
1139 SpvId merged = spirv_builder_emit_composite_construct(&ctx->builder,
1140 vec_type,
1141 constituents,
1142 coord_components);
1143
1144 result = spirv_builder_emit_image_sample_proj_implicit_lod(&ctx->builder,
1145 dest_type,
1146 load,
1147 merged);
1148 } else
1149 result = spirv_builder_emit_image_sample_implicit_lod(&ctx->builder,
1150 dest_type, load,
1151 coord);
1152 spirv_builder_emit_decoration(&ctx->builder, result,
1153 SpvDecorationRelaxedPrecision);
1154
1155 store_dest(ctx, &tex->dest, result, tex->dest_type);
1156 }
1157
1158 static void
1159 start_block(struct ntv_context *ctx, SpvId label)
1160 {
1161 /* terminate previous block if needed */
1162 if (ctx->block_started)
1163 spirv_builder_emit_branch(&ctx->builder, label);
1164
1165 /* start new block */
1166 spirv_builder_label(&ctx->builder, label);
1167 ctx->block_started = true;
1168 }
1169
1170 static void
1171 branch(struct ntv_context *ctx, SpvId label)
1172 {
1173 assert(ctx->block_started);
1174 spirv_builder_emit_branch(&ctx->builder, label);
1175 ctx->block_started = false;
1176 }
1177
1178 static void
1179 branch_conditional(struct ntv_context *ctx, SpvId condition, SpvId then_id,
1180 SpvId else_id)
1181 {
1182 assert(ctx->block_started);
1183 spirv_builder_emit_branch_conditional(&ctx->builder, condition,
1184 then_id, else_id);
1185 ctx->block_started = false;
1186 }
1187
1188 static void
1189 emit_jump(struct ntv_context *ctx, nir_jump_instr *jump)
1190 {
1191 switch (jump->type) {
1192 case nir_jump_break:
1193 assert(ctx->loop_break);
1194 branch(ctx, ctx->loop_break);
1195 break;
1196
1197 case nir_jump_continue:
1198 assert(ctx->loop_cont);
1199 branch(ctx, ctx->loop_cont);
1200 break;
1201
1202 default:
1203 unreachable("Unsupported jump type\n");
1204 }
1205 }
1206
1207 static void
1208 emit_block(struct ntv_context *ctx, struct nir_block *block)
1209 {
1210 start_block(ctx, block_label(ctx, block));
1211 nir_foreach_instr(instr, block) {
1212 switch (instr->type) {
1213 case nir_instr_type_alu:
1214 emit_alu(ctx, nir_instr_as_alu(instr));
1215 break;
1216 case nir_instr_type_intrinsic:
1217 emit_intrinsic(ctx, nir_instr_as_intrinsic(instr));
1218 break;
1219 case nir_instr_type_load_const:
1220 emit_load_const(ctx, nir_instr_as_load_const(instr));
1221 break;
1222 case nir_instr_type_ssa_undef:
1223 emit_undef(ctx, nir_instr_as_ssa_undef(instr));
1224 break;
1225 case nir_instr_type_tex:
1226 emit_tex(ctx, nir_instr_as_tex(instr));
1227 break;
1228 case nir_instr_type_phi:
1229 unreachable("nir_instr_type_phi not supported");
1230 break;
1231 case nir_instr_type_jump:
1232 emit_jump(ctx, nir_instr_as_jump(instr));
1233 break;
1234 case nir_instr_type_call:
1235 unreachable("nir_instr_type_call not supported");
1236 break;
1237 case nir_instr_type_parallel_copy:
1238 unreachable("nir_instr_type_parallel_copy not supported");
1239 break;
1240 case nir_instr_type_deref:
1241 unreachable("nir_instr_type_deref not supported");
1242 break;
1243 }
1244 }
1245 }
1246
1247 static void
1248 emit_cf_list(struct ntv_context *ctx, struct exec_list *list);
1249
1250 static SpvId
1251 get_src_bool(struct ntv_context *ctx, nir_src *src)
1252 {
1253 SpvId def = get_src_uint(ctx, src);
1254 assert(nir_src_bit_size(*src) == 32);
1255 unsigned num_components = nir_src_num_components(*src);
1256 return uvec_to_bvec(ctx, def, num_components);
1257 }
1258
1259 static void
1260 emit_if(struct ntv_context *ctx, nir_if *if_stmt)
1261 {
1262 SpvId condition = get_src_bool(ctx, &if_stmt->condition);
1263
1264 SpvId header_id = spirv_builder_new_id(&ctx->builder);
1265 SpvId then_id = block_label(ctx, nir_if_first_then_block(if_stmt));
1266 SpvId endif_id = spirv_builder_new_id(&ctx->builder);
1267 SpvId else_id = endif_id;
1268
1269 bool has_else = !exec_list_is_empty(&if_stmt->else_list);
1270 if (has_else) {
1271 assert(nir_if_first_else_block(if_stmt)->index < ctx->num_blocks);
1272 else_id = block_label(ctx, nir_if_first_else_block(if_stmt));
1273 }
1274
1275 /* create a header-block */
1276 start_block(ctx, header_id);
1277 spirv_builder_emit_selection_merge(&ctx->builder, endif_id,
1278 SpvSelectionControlMaskNone);
1279 branch_conditional(ctx, condition, then_id, else_id);
1280
1281 emit_cf_list(ctx, &if_stmt->then_list);
1282
1283 if (has_else) {
1284 if (ctx->block_started)
1285 branch(ctx, endif_id);
1286
1287 emit_cf_list(ctx, &if_stmt->else_list);
1288 }
1289
1290 start_block(ctx, endif_id);
1291 }
1292
1293 static void
1294 emit_loop(struct ntv_context *ctx, nir_loop *loop)
1295 {
1296 SpvId header_id = spirv_builder_new_id(&ctx->builder);
1297 SpvId begin_id = block_label(ctx, nir_loop_first_block(loop));
1298 SpvId break_id = spirv_builder_new_id(&ctx->builder);
1299 SpvId cont_id = spirv_builder_new_id(&ctx->builder);
1300
1301 /* create a header-block */
1302 start_block(ctx, header_id);
1303 spirv_builder_loop_merge(&ctx->builder, break_id, cont_id, SpvLoopControlMaskNone);
1304 branch(ctx, begin_id);
1305
1306 SpvId save_break = ctx->loop_break;
1307 SpvId save_cont = ctx->loop_cont;
1308 ctx->loop_break = break_id;
1309 ctx->loop_cont = cont_id;
1310
1311 emit_cf_list(ctx, &loop->body);
1312
1313 ctx->loop_break = save_break;
1314 ctx->loop_cont = save_cont;
1315
1316 branch(ctx, cont_id);
1317 start_block(ctx, cont_id);
1318 branch(ctx, header_id);
1319
1320 start_block(ctx, break_id);
1321 }
1322
1323 static void
1324 emit_cf_list(struct ntv_context *ctx, struct exec_list *list)
1325 {
1326 foreach_list_typed(nir_cf_node, node, node, list) {
1327 switch (node->type) {
1328 case nir_cf_node_block:
1329 emit_block(ctx, nir_cf_node_as_block(node));
1330 break;
1331
1332 case nir_cf_node_if:
1333 emit_if(ctx, nir_cf_node_as_if(node));
1334 break;
1335
1336 case nir_cf_node_loop:
1337 emit_loop(ctx, nir_cf_node_as_loop(node));
1338 break;
1339
1340 case nir_cf_node_function:
1341 unreachable("nir_cf_node_function not supported");
1342 break;
1343 }
1344 }
1345 }
1346
1347 struct spirv_shader *
1348 nir_to_spirv(struct nir_shader *s)
1349 {
1350 struct spirv_shader *ret = NULL;
1351
1352 struct ntv_context ctx = {};
1353
1354 switch (s->info.stage) {
1355 case MESA_SHADER_VERTEX:
1356 case MESA_SHADER_FRAGMENT:
1357 case MESA_SHADER_COMPUTE:
1358 spirv_builder_emit_cap(&ctx.builder, SpvCapabilityShader);
1359 break;
1360
1361 case MESA_SHADER_TESS_CTRL:
1362 case MESA_SHADER_TESS_EVAL:
1363 spirv_builder_emit_cap(&ctx.builder, SpvCapabilityTessellation);
1364 break;
1365
1366 case MESA_SHADER_GEOMETRY:
1367 spirv_builder_emit_cap(&ctx.builder, SpvCapabilityGeometry);
1368 break;
1369
1370 default:
1371 unreachable("invalid stage");
1372 }
1373
1374 ctx.stage = s->info.stage;
1375 ctx.GLSL_std_450 = spirv_builder_import(&ctx.builder, "GLSL.std.450");
1376 spirv_builder_emit_source(&ctx.builder, SpvSourceLanguageGLSL, 450);
1377
1378 spirv_builder_emit_mem_model(&ctx.builder, SpvAddressingModelLogical,
1379 SpvMemoryModelGLSL450);
1380
1381 SpvExecutionModel exec_model;
1382 switch (s->info.stage) {
1383 case MESA_SHADER_VERTEX:
1384 exec_model = SpvExecutionModelVertex;
1385 break;
1386 case MESA_SHADER_TESS_CTRL:
1387 exec_model = SpvExecutionModelTessellationControl;
1388 break;
1389 case MESA_SHADER_TESS_EVAL:
1390 exec_model = SpvExecutionModelTessellationEvaluation;
1391 break;
1392 case MESA_SHADER_GEOMETRY:
1393 exec_model = SpvExecutionModelGeometry;
1394 break;
1395 case MESA_SHADER_FRAGMENT:
1396 exec_model = SpvExecutionModelFragment;
1397 break;
1398 case MESA_SHADER_COMPUTE:
1399 exec_model = SpvExecutionModelGLCompute;
1400 break;
1401 default:
1402 unreachable("invalid stage");
1403 }
1404
1405 SpvId type_void = spirv_builder_type_void(&ctx.builder);
1406 SpvId type_main = spirv_builder_type_function(&ctx.builder, type_void,
1407 NULL, 0);
1408 SpvId entry_point = spirv_builder_new_id(&ctx.builder);
1409 spirv_builder_emit_name(&ctx.builder, entry_point, "main");
1410
1411 nir_foreach_variable(var, &s->inputs)
1412 emit_input(&ctx, var);
1413
1414 nir_foreach_variable(var, &s->outputs)
1415 emit_output(&ctx, var);
1416
1417 nir_foreach_variable(var, &s->uniforms)
1418 emit_uniform(&ctx, var);
1419
1420 spirv_builder_emit_entry_point(&ctx.builder, exec_model, entry_point,
1421 "main", ctx.entry_ifaces,
1422 ctx.num_entry_ifaces);
1423 if (s->info.stage == MESA_SHADER_FRAGMENT)
1424 spirv_builder_emit_exec_mode(&ctx.builder, entry_point,
1425 SpvExecutionModeOriginUpperLeft);
1426
1427
1428 spirv_builder_function(&ctx.builder, entry_point, type_void,
1429 SpvFunctionControlMaskNone,
1430 type_main);
1431
1432 nir_function_impl *entry = nir_shader_get_entrypoint(s);
1433 nir_metadata_require(entry, nir_metadata_block_index);
1434
1435 ctx.defs = (SpvId *)malloc(sizeof(SpvId) * entry->ssa_alloc);
1436 if (!ctx.defs)
1437 goto fail;
1438 ctx.num_defs = entry->ssa_alloc;
1439
1440 ctx.vars = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
1441 _mesa_key_pointer_equal);
1442 if (!ctx.vars)
1443 goto fail;
1444
1445 SpvId *block_ids = (SpvId *)malloc(sizeof(SpvId) * entry->num_blocks);
1446 if (!block_ids)
1447 goto fail;
1448
1449 for (int i = 0; i < entry->num_blocks; ++i)
1450 block_ids[i] = spirv_builder_new_id(&ctx.builder);
1451
1452 ctx.block_ids = block_ids;
1453 ctx.num_blocks = entry->num_blocks;
1454
1455 emit_cf_list(&ctx, &entry->body);
1456
1457 free(ctx.defs);
1458
1459 spirv_builder_return(&ctx.builder); // doesn't belong here, but whatevz
1460 spirv_builder_function_end(&ctx.builder);
1461
1462 size_t num_words = spirv_builder_get_num_words(&ctx.builder);
1463
1464 ret = CALLOC_STRUCT(spirv_shader);
1465 if (!ret)
1466 goto fail;
1467
1468 ret->words = MALLOC(sizeof(uint32_t) * num_words);
1469 if (!ret->words)
1470 goto fail;
1471
1472 ret->num_words = spirv_builder_get_words(&ctx.builder, ret->words, num_words);
1473 assert(ret->num_words == num_words);
1474
1475 return ret;
1476
1477 fail:
1478
1479 if (ret)
1480 spirv_shader_delete(ret);
1481
1482 return NULL;
1483 }
1484
1485 void
1486 spirv_shader_delete(struct spirv_shader *s)
1487 {
1488 FREE(s->words);
1489 FREE(s);
1490 }