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2f55585b415b54c480f51b3c3ac62f11bc857ab0
[mesa.git] / src / gallium / drivers / zink / nir_to_spirv / nir_to_spirv.c
1 /*
2 * Copyright 2018 Collabora Ltd.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 */
23
24 #include "nir_to_spirv.h"
25 #include "spirv_builder.h"
26
27 #include "nir.h"
28 #include "pipe/p_state.h"
29 #include "util/u_memory.h"
30 #include "util/hash_table.h"
31
32 /* this consistently maps slots to a zero-indexed value to avoid wasting slots */
33 static unsigned slot_pack_map[] = {
34 /* Position is builtin */
35 [VARYING_SLOT_POS] = UINT_MAX,
36 [VARYING_SLOT_COL0] = 0, /* input/output */
37 [VARYING_SLOT_COL1] = 1, /* input/output */
38 [VARYING_SLOT_FOGC] = 2, /* input/output */
39 /* TEX0-7 are deprecated, so we put them at the end of the range and hope nobody uses them all */
40 [VARYING_SLOT_TEX0] = VARYING_SLOT_VAR0 - 1, /* input/output */
41 [VARYING_SLOT_TEX1] = VARYING_SLOT_VAR0 - 2,
42 [VARYING_SLOT_TEX2] = VARYING_SLOT_VAR0 - 3,
43 [VARYING_SLOT_TEX3] = VARYING_SLOT_VAR0 - 4,
44 [VARYING_SLOT_TEX4] = VARYING_SLOT_VAR0 - 5,
45 [VARYING_SLOT_TEX5] = VARYING_SLOT_VAR0 - 6,
46 [VARYING_SLOT_TEX6] = VARYING_SLOT_VAR0 - 7,
47 [VARYING_SLOT_TEX7] = VARYING_SLOT_VAR0 - 8,
48
49 /* PointSize is builtin */
50 [VARYING_SLOT_PSIZ] = UINT_MAX,
51
52 [VARYING_SLOT_BFC0] = 3, /* output only */
53 [VARYING_SLOT_BFC1] = 4, /* output only */
54 [VARYING_SLOT_EDGE] = 5, /* output only */
55 [VARYING_SLOT_CLIP_VERTEX] = 6, /* output only */
56
57 /* ClipDistance is builtin */
58 [VARYING_SLOT_CLIP_DIST0] = UINT_MAX,
59 [VARYING_SLOT_CLIP_DIST1] = UINT_MAX,
60
61 /* CullDistance is builtin */
62 [VARYING_SLOT_CULL_DIST0] = UINT_MAX, /* input/output */
63 [VARYING_SLOT_CULL_DIST1] = UINT_MAX, /* never actually used */
64
65 /* PrimitiveId is builtin */
66 [VARYING_SLOT_PRIMITIVE_ID] = UINT_MAX,
67
68 /* Layer is builtin */
69 [VARYING_SLOT_LAYER] = UINT_MAX, /* input/output */
70
71 /* ViewportIndex is builtin */
72 [VARYING_SLOT_VIEWPORT] = UINT_MAX, /* input/output */
73
74 /* FrontFacing is builtin */
75 [VARYING_SLOT_FACE] = UINT_MAX,
76
77 /* PointCoord is builtin */
78 [VARYING_SLOT_PNTC] = UINT_MAX, /* input only */
79
80 /* TessLevelOuter is builtin */
81 [VARYING_SLOT_TESS_LEVEL_OUTER] = UINT_MAX,
82 /* TessLevelInner is builtin */
83 [VARYING_SLOT_TESS_LEVEL_INNER] = UINT_MAX,
84
85 [VARYING_SLOT_BOUNDING_BOX0] = 7, /* Only appears as TCS output. */
86 [VARYING_SLOT_BOUNDING_BOX1] = 8, /* Only appears as TCS output. */
87 [VARYING_SLOT_VIEW_INDEX] = 9, /* input/output */
88 [VARYING_SLOT_VIEWPORT_MASK] = 10, /* output only */
89 };
90 #define NTV_MIN_RESERVED_SLOTS 11
91
92 struct ntv_context {
93 void *mem_ctx;
94
95 struct spirv_builder builder;
96
97 SpvId GLSL_std_450;
98
99 gl_shader_stage stage;
100
101 SpvId ubos[128];
102 size_t num_ubos;
103 SpvId image_types[PIPE_MAX_SAMPLERS];
104 SpvId samplers[PIPE_MAX_SAMPLERS];
105 unsigned samplers_used : PIPE_MAX_SAMPLERS;
106 SpvId entry_ifaces[PIPE_MAX_SHADER_INPUTS * 4 + PIPE_MAX_SHADER_OUTPUTS * 4];
107 size_t num_entry_ifaces;
108
109 SpvId *defs;
110 size_t num_defs;
111
112 SpvId *regs;
113 size_t num_regs;
114
115 struct hash_table *vars; /* nir_variable -> SpvId */
116 struct hash_table *so_outputs; /* pipe_stream_output -> SpvId */
117 unsigned outputs[VARYING_SLOT_MAX];
118 const struct glsl_type *so_output_gl_types[VARYING_SLOT_MAX];
119 SpvId so_output_types[VARYING_SLOT_MAX];
120
121 const SpvId *block_ids;
122 size_t num_blocks;
123 bool block_started;
124 SpvId loop_break, loop_cont;
125
126 SpvId front_face_var, instance_id_var, vertex_id_var;
127 #ifndef NDEBUG
128 bool seen_texcoord[8]; //whether we've seen a VARYING_SLOT_TEX[n] this pass
129 #endif
130 };
131
132 static SpvId
133 get_fvec_constant(struct ntv_context *ctx, unsigned bit_size,
134 unsigned num_components, float value);
135
136 static SpvId
137 get_uvec_constant(struct ntv_context *ctx, unsigned bit_size,
138 unsigned num_components, uint32_t value);
139
140 static SpvId
141 get_ivec_constant(struct ntv_context *ctx, unsigned bit_size,
142 unsigned num_components, int32_t value);
143
144 static SpvId
145 emit_unop(struct ntv_context *ctx, SpvOp op, SpvId type, SpvId src);
146
147 static SpvId
148 emit_binop(struct ntv_context *ctx, SpvOp op, SpvId type,
149 SpvId src0, SpvId src1);
150
151 static SpvId
152 emit_triop(struct ntv_context *ctx, SpvOp op, SpvId type,
153 SpvId src0, SpvId src1, SpvId src2);
154
155 static SpvId
156 get_bvec_type(struct ntv_context *ctx, int num_components)
157 {
158 SpvId bool_type = spirv_builder_type_bool(&ctx->builder);
159 if (num_components > 1)
160 return spirv_builder_type_vector(&ctx->builder, bool_type,
161 num_components);
162
163 assert(num_components == 1);
164 return bool_type;
165 }
166
167 static SpvId
168 block_label(struct ntv_context *ctx, nir_block *block)
169 {
170 assert(block->index < ctx->num_blocks);
171 return ctx->block_ids[block->index];
172 }
173
174 static SpvId
175 emit_float_const(struct ntv_context *ctx, int bit_size, float value)
176 {
177 assert(bit_size == 32);
178 return spirv_builder_const_float(&ctx->builder, bit_size, value);
179 }
180
181 static SpvId
182 emit_uint_const(struct ntv_context *ctx, int bit_size, uint32_t value)
183 {
184 assert(bit_size == 32);
185 return spirv_builder_const_uint(&ctx->builder, bit_size, value);
186 }
187
188 static SpvId
189 emit_int_const(struct ntv_context *ctx, int bit_size, int32_t value)
190 {
191 assert(bit_size == 32);
192 return spirv_builder_const_int(&ctx->builder, bit_size, value);
193 }
194
195 static SpvId
196 get_fvec_type(struct ntv_context *ctx, unsigned bit_size, unsigned num_components)
197 {
198 assert(bit_size == 32); // only 32-bit floats supported so far
199
200 SpvId float_type = spirv_builder_type_float(&ctx->builder, bit_size);
201 if (num_components > 1)
202 return spirv_builder_type_vector(&ctx->builder, float_type,
203 num_components);
204
205 assert(num_components == 1);
206 return float_type;
207 }
208
209 static SpvId
210 get_ivec_type(struct ntv_context *ctx, unsigned bit_size, unsigned num_components)
211 {
212 assert(bit_size == 32); // only 32-bit ints supported so far
213
214 SpvId int_type = spirv_builder_type_int(&ctx->builder, bit_size);
215 if (num_components > 1)
216 return spirv_builder_type_vector(&ctx->builder, int_type,
217 num_components);
218
219 assert(num_components == 1);
220 return int_type;
221 }
222
223 static SpvId
224 get_uvec_type(struct ntv_context *ctx, unsigned bit_size, unsigned num_components)
225 {
226 assert(bit_size == 32); // only 32-bit uints supported so far
227
228 SpvId uint_type = spirv_builder_type_uint(&ctx->builder, bit_size);
229 if (num_components > 1)
230 return spirv_builder_type_vector(&ctx->builder, uint_type,
231 num_components);
232
233 assert(num_components == 1);
234 return uint_type;
235 }
236
237 static SpvId
238 get_dest_uvec_type(struct ntv_context *ctx, nir_dest *dest)
239 {
240 unsigned bit_size = MAX2(nir_dest_bit_size(*dest), 32);
241 return get_uvec_type(ctx, bit_size, nir_dest_num_components(*dest));
242 }
243
244 static SpvId
245 get_glsl_basetype(struct ntv_context *ctx, enum glsl_base_type type)
246 {
247 switch (type) {
248 case GLSL_TYPE_BOOL:
249 return spirv_builder_type_bool(&ctx->builder);
250
251 case GLSL_TYPE_FLOAT:
252 return spirv_builder_type_float(&ctx->builder, 32);
253
254 case GLSL_TYPE_INT:
255 return spirv_builder_type_int(&ctx->builder, 32);
256
257 case GLSL_TYPE_UINT:
258 return spirv_builder_type_uint(&ctx->builder, 32);
259 /* TODO: handle more types */
260
261 default:
262 unreachable("unknown GLSL type");
263 }
264 }
265
266 static SpvId
267 get_glsl_type(struct ntv_context *ctx, const struct glsl_type *type)
268 {
269 assert(type);
270 if (glsl_type_is_scalar(type))
271 return get_glsl_basetype(ctx, glsl_get_base_type(type));
272
273 if (glsl_type_is_vector(type))
274 return spirv_builder_type_vector(&ctx->builder,
275 get_glsl_basetype(ctx, glsl_get_base_type(type)),
276 glsl_get_vector_elements(type));
277
278 if (glsl_type_is_array(type)) {
279 SpvId ret = spirv_builder_type_array(&ctx->builder,
280 get_glsl_type(ctx, glsl_get_array_element(type)),
281 emit_uint_const(ctx, 32, glsl_get_length(type)));
282 uint32_t stride = glsl_get_explicit_stride(type);
283 if (stride)
284 spirv_builder_emit_array_stride(&ctx->builder, ret, stride);
285 return ret;
286 }
287
288
289 unreachable("we shouldn't get here, I think...");
290 }
291
292 static inline unsigned
293 handle_slot(struct ntv_context *ctx, unsigned slot)
294 {
295 unsigned orig = slot;
296 if (slot < VARYING_SLOT_VAR0) {
297 #ifndef NDEBUG
298 if (slot >= VARYING_SLOT_TEX0 && slot <= VARYING_SLOT_TEX7)
299 ctx->seen_texcoord[slot - VARYING_SLOT_TEX0] = true;
300 #endif
301 slot = slot_pack_map[slot];
302 if (slot == UINT_MAX)
303 debug_printf("unhandled varying slot: %s\n", gl_varying_slot_name(orig));
304 } else {
305 slot -= VARYING_SLOT_VAR0 - NTV_MIN_RESERVED_SLOTS;
306 assert(slot <= VARYING_SLOT_VAR0 - 8 ||
307 !ctx->seen_texcoord[VARYING_SLOT_VAR0 - slot - 1]);
308
309 }
310 assert(slot < VARYING_SLOT_VAR0);
311 return slot;
312 }
313
314 #define HANDLE_EMIT_BUILTIN(SLOT, BUILTIN) \
315 case VARYING_SLOT_##SLOT: \
316 spirv_builder_emit_builtin(&ctx->builder, var_id, SpvBuiltIn##BUILTIN); \
317 break
318
319
320 static void
321 emit_input(struct ntv_context *ctx, struct nir_variable *var)
322 {
323 SpvId var_type = get_glsl_type(ctx, var->type);
324 SpvId pointer_type = spirv_builder_type_pointer(&ctx->builder,
325 SpvStorageClassInput,
326 var_type);
327 SpvId var_id = spirv_builder_emit_var(&ctx->builder, pointer_type,
328 SpvStorageClassInput);
329
330 if (var->name)
331 spirv_builder_emit_name(&ctx->builder, var_id, var->name);
332
333 if (ctx->stage == MESA_SHADER_FRAGMENT) {
334 unsigned slot = var->data.location;
335 switch (slot) {
336 HANDLE_EMIT_BUILTIN(POS, FragCoord);
337 HANDLE_EMIT_BUILTIN(PNTC, PointCoord);
338 HANDLE_EMIT_BUILTIN(LAYER, Layer);
339 HANDLE_EMIT_BUILTIN(PRIMITIVE_ID, PrimitiveId);
340 HANDLE_EMIT_BUILTIN(CLIP_DIST0, ClipDistance);
341 HANDLE_EMIT_BUILTIN(CULL_DIST0, CullDistance);
342 HANDLE_EMIT_BUILTIN(VIEWPORT, ViewportIndex);
343 HANDLE_EMIT_BUILTIN(FACE, FrontFacing);
344
345 default:
346 slot = handle_slot(ctx, slot);
347 spirv_builder_emit_location(&ctx->builder, var_id, slot);
348 }
349 } else {
350 spirv_builder_emit_location(&ctx->builder, var_id,
351 var->data.driver_location);
352 }
353
354 if (var->data.location_frac)
355 spirv_builder_emit_component(&ctx->builder, var_id,
356 var->data.location_frac);
357
358 if (var->data.interpolation == INTERP_MODE_FLAT)
359 spirv_builder_emit_decoration(&ctx->builder, var_id, SpvDecorationFlat);
360
361 _mesa_hash_table_insert(ctx->vars, var, (void *)(intptr_t)var_id);
362
363 assert(ctx->num_entry_ifaces < ARRAY_SIZE(ctx->entry_ifaces));
364 ctx->entry_ifaces[ctx->num_entry_ifaces++] = var_id;
365 }
366
367 static void
368 emit_output(struct ntv_context *ctx, struct nir_variable *var)
369 {
370 SpvId var_type = get_glsl_type(ctx, var->type);
371 SpvId pointer_type = spirv_builder_type_pointer(&ctx->builder,
372 SpvStorageClassOutput,
373 var_type);
374 SpvId var_id = spirv_builder_emit_var(&ctx->builder, pointer_type,
375 SpvStorageClassOutput);
376 if (var->name)
377 spirv_builder_emit_name(&ctx->builder, var_id, var->name);
378
379
380 if (ctx->stage == MESA_SHADER_VERTEX) {
381 unsigned slot = var->data.location;
382 switch (slot) {
383 HANDLE_EMIT_BUILTIN(POS, Position);
384 HANDLE_EMIT_BUILTIN(PSIZ, PointSize);
385 HANDLE_EMIT_BUILTIN(LAYER, Layer);
386 HANDLE_EMIT_BUILTIN(PRIMITIVE_ID, PrimitiveId);
387 HANDLE_EMIT_BUILTIN(CULL_DIST0, CullDistance);
388 HANDLE_EMIT_BUILTIN(VIEWPORT, ViewportIndex);
389 HANDLE_EMIT_BUILTIN(TESS_LEVEL_OUTER, TessLevelOuter);
390 HANDLE_EMIT_BUILTIN(TESS_LEVEL_INNER, TessLevelInner);
391
392 case VARYING_SLOT_CLIP_DIST0:
393 assert(glsl_type_is_array(var->type));
394 spirv_builder_emit_builtin(&ctx->builder, var_id, SpvBuiltInClipDistance);
395 /* this can be as large as 2x vec4, which requires 2 slots */
396 ctx->outputs[VARYING_SLOT_CLIP_DIST1] = var_id;
397 ctx->so_output_gl_types[VARYING_SLOT_CLIP_DIST1] = var->type;
398 ctx->so_output_types[VARYING_SLOT_CLIP_DIST1] = var_type;
399 break;
400
401 default:
402 slot = handle_slot(ctx, slot);
403 spirv_builder_emit_location(&ctx->builder, var_id, slot);
404 }
405 ctx->outputs[var->data.location] = var_id;
406 ctx->so_output_gl_types[var->data.location] = var->type;
407 ctx->so_output_types[var->data.location] = var_type;
408 } else if (ctx->stage == MESA_SHADER_FRAGMENT) {
409 if (var->data.location >= FRAG_RESULT_DATA0) {
410 spirv_builder_emit_location(&ctx->builder, var_id,
411 var->data.location - FRAG_RESULT_DATA0);
412 spirv_builder_emit_index(&ctx->builder, var_id, var->data.index);
413 } else {
414 switch (var->data.location) {
415 case FRAG_RESULT_COLOR:
416 unreachable("gl_FragColor should be lowered by now");
417
418 case FRAG_RESULT_DEPTH:
419 spirv_builder_emit_builtin(&ctx->builder, var_id, SpvBuiltInFragDepth);
420 break;
421
422 default:
423 spirv_builder_emit_location(&ctx->builder, var_id,
424 var->data.driver_location);
425 spirv_builder_emit_index(&ctx->builder, var_id, var->data.index);
426 }
427 }
428 }
429
430 if (var->data.location_frac)
431 spirv_builder_emit_component(&ctx->builder, var_id,
432 var->data.location_frac);
433
434 switch (var->data.interpolation) {
435 case INTERP_MODE_NONE:
436 case INTERP_MODE_SMOOTH: /* XXX spirv doesn't seem to have anything for this */
437 break;
438 case INTERP_MODE_FLAT:
439 spirv_builder_emit_decoration(&ctx->builder, var_id, SpvDecorationFlat);
440 break;
441 case INTERP_MODE_EXPLICIT:
442 spirv_builder_emit_decoration(&ctx->builder, var_id, SpvDecorationExplicitInterpAMD);
443 break;
444 case INTERP_MODE_NOPERSPECTIVE:
445 spirv_builder_emit_decoration(&ctx->builder, var_id, SpvDecorationNoPerspective);
446 break;
447 default:
448 unreachable("unknown interpolation value");
449 }
450
451 _mesa_hash_table_insert(ctx->vars, var, (void *)(intptr_t)var_id);
452
453 assert(ctx->num_entry_ifaces < ARRAY_SIZE(ctx->entry_ifaces));
454 ctx->entry_ifaces[ctx->num_entry_ifaces++] = var_id;
455 }
456
457 static SpvDim
458 type_to_dim(enum glsl_sampler_dim gdim, bool *is_ms)
459 {
460 *is_ms = false;
461 switch (gdim) {
462 case GLSL_SAMPLER_DIM_1D:
463 return SpvDim1D;
464 case GLSL_SAMPLER_DIM_2D:
465 return SpvDim2D;
466 case GLSL_SAMPLER_DIM_3D:
467 return SpvDim3D;
468 case GLSL_SAMPLER_DIM_CUBE:
469 return SpvDimCube;
470 case GLSL_SAMPLER_DIM_RECT:
471 return SpvDim2D;
472 case GLSL_SAMPLER_DIM_BUF:
473 return SpvDimBuffer;
474 case GLSL_SAMPLER_DIM_EXTERNAL:
475 return SpvDim2D; /* seems dodgy... */
476 case GLSL_SAMPLER_DIM_MS:
477 *is_ms = true;
478 return SpvDim2D;
479 default:
480 fprintf(stderr, "unknown sampler type %d\n", gdim);
481 break;
482 }
483 return SpvDim2D;
484 }
485
486 uint32_t
487 zink_binding(gl_shader_stage stage, VkDescriptorType type, int index)
488 {
489 if (stage == MESA_SHADER_NONE ||
490 stage >= MESA_SHADER_COMPUTE) {
491 unreachable("not supported");
492 } else {
493 uint32_t stage_offset = (uint32_t)stage * (PIPE_MAX_CONSTANT_BUFFERS +
494 PIPE_MAX_SHADER_SAMPLER_VIEWS);
495
496 switch (type) {
497 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER:
498 assert(index < PIPE_MAX_CONSTANT_BUFFERS);
499 return stage_offset + index;
500
501 case VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER:
502 assert(index < PIPE_MAX_SHADER_SAMPLER_VIEWS);
503 return stage_offset + PIPE_MAX_CONSTANT_BUFFERS + index;
504
505 default:
506 unreachable("unexpected type");
507 }
508 }
509 }
510
511 static void
512 emit_sampler(struct ntv_context *ctx, struct nir_variable *var)
513 {
514 const struct glsl_type *type = glsl_without_array(var->type);
515
516 bool is_ms;
517 SpvDim dimension = type_to_dim(glsl_get_sampler_dim(type), &is_ms);
518
519 SpvId result_type = get_glsl_basetype(ctx, glsl_get_sampler_result_type(type));
520 SpvId image_type = spirv_builder_type_image(&ctx->builder, result_type,
521 dimension, false,
522 glsl_sampler_type_is_array(type),
523 is_ms, 1,
524 SpvImageFormatUnknown);
525
526 SpvId sampled_type = spirv_builder_type_sampled_image(&ctx->builder,
527 image_type);
528 SpvId pointer_type = spirv_builder_type_pointer(&ctx->builder,
529 SpvStorageClassUniformConstant,
530 sampled_type);
531
532 if (glsl_type_is_array(var->type)) {
533 for (int i = 0; i < glsl_get_length(var->type); ++i) {
534 SpvId var_id = spirv_builder_emit_var(&ctx->builder, pointer_type,
535 SpvStorageClassUniformConstant);
536
537 if (var->name) {
538 char element_name[100];
539 snprintf(element_name, sizeof(element_name), "%s_%d", var->name, i);
540 spirv_builder_emit_name(&ctx->builder, var_id, var->name);
541 }
542
543 int index = var->data.binding + i;
544 assert(!(ctx->samplers_used & (1 << index)));
545 assert(!ctx->image_types[index]);
546 ctx->image_types[index] = image_type;
547 ctx->samplers[index] = var_id;
548 ctx->samplers_used |= 1 << index;
549
550 spirv_builder_emit_descriptor_set(&ctx->builder, var_id,
551 var->data.descriptor_set);
552 int binding = zink_binding(ctx->stage,
553 VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER,
554 var->data.binding + i);
555 spirv_builder_emit_binding(&ctx->builder, var_id, binding);
556 }
557 } else {
558 SpvId var_id = spirv_builder_emit_var(&ctx->builder, pointer_type,
559 SpvStorageClassUniformConstant);
560
561 if (var->name)
562 spirv_builder_emit_name(&ctx->builder, var_id, var->name);
563
564 int index = var->data.binding;
565 assert(!(ctx->samplers_used & (1 << index)));
566 assert(!ctx->image_types[index]);
567 ctx->image_types[index] = image_type;
568 ctx->samplers[index] = var_id;
569 ctx->samplers_used |= 1 << index;
570
571 spirv_builder_emit_descriptor_set(&ctx->builder, var_id,
572 var->data.descriptor_set);
573 int binding = zink_binding(ctx->stage,
574 VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER,
575 var->data.binding);
576 spirv_builder_emit_binding(&ctx->builder, var_id, binding);
577 }
578 }
579
580 static void
581 emit_ubo(struct ntv_context *ctx, struct nir_variable *var)
582 {
583 uint32_t size = glsl_count_attribute_slots(var->type, false);
584 SpvId vec4_type = get_uvec_type(ctx, 32, 4);
585 SpvId array_length = emit_uint_const(ctx, 32, size);
586 SpvId array_type = spirv_builder_type_array(&ctx->builder, vec4_type,
587 array_length);
588 spirv_builder_emit_array_stride(&ctx->builder, array_type, 16);
589
590 // wrap UBO-array in a struct
591 SpvId struct_type = spirv_builder_type_struct(&ctx->builder, &array_type, 1);
592 if (var->name) {
593 char struct_name[100];
594 snprintf(struct_name, sizeof(struct_name), "struct_%s", var->name);
595 spirv_builder_emit_name(&ctx->builder, struct_type, struct_name);
596 }
597
598 spirv_builder_emit_decoration(&ctx->builder, struct_type,
599 SpvDecorationBlock);
600 spirv_builder_emit_member_offset(&ctx->builder, struct_type, 0, 0);
601
602
603 SpvId pointer_type = spirv_builder_type_pointer(&ctx->builder,
604 SpvStorageClassUniform,
605 struct_type);
606
607 SpvId var_id = spirv_builder_emit_var(&ctx->builder, pointer_type,
608 SpvStorageClassUniform);
609 if (var->name)
610 spirv_builder_emit_name(&ctx->builder, var_id, var->name);
611
612 assert(ctx->num_ubos < ARRAY_SIZE(ctx->ubos));
613 ctx->ubos[ctx->num_ubos++] = var_id;
614
615 spirv_builder_emit_descriptor_set(&ctx->builder, var_id,
616 var->data.descriptor_set);
617 int binding = zink_binding(ctx->stage,
618 VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER,
619 var->data.binding);
620 spirv_builder_emit_binding(&ctx->builder, var_id, binding);
621 }
622
623 static void
624 emit_uniform(struct ntv_context *ctx, struct nir_variable *var)
625 {
626 if (var->data.mode == nir_var_mem_ubo)
627 emit_ubo(ctx, var);
628 else {
629 assert(var->data.mode == nir_var_uniform);
630 if (glsl_type_is_sampler(glsl_without_array(var->type)))
631 emit_sampler(ctx, var);
632 }
633 }
634
635 static SpvId
636 get_src_ssa(struct ntv_context *ctx, const nir_ssa_def *ssa)
637 {
638 assert(ssa->index < ctx->num_defs);
639 assert(ctx->defs[ssa->index] != 0);
640 return ctx->defs[ssa->index];
641 }
642
643 static SpvId
644 get_var_from_reg(struct ntv_context *ctx, nir_register *reg)
645 {
646 assert(reg->index < ctx->num_regs);
647 assert(ctx->regs[reg->index] != 0);
648 return ctx->regs[reg->index];
649 }
650
651 static SpvId
652 get_src_reg(struct ntv_context *ctx, const nir_reg_src *reg)
653 {
654 assert(reg->reg);
655 assert(!reg->indirect);
656 assert(!reg->base_offset);
657
658 SpvId var = get_var_from_reg(ctx, reg->reg);
659 SpvId type = get_uvec_type(ctx, reg->reg->bit_size, reg->reg->num_components);
660 return spirv_builder_emit_load(&ctx->builder, type, var);
661 }
662
663 static SpvId
664 get_src(struct ntv_context *ctx, nir_src *src)
665 {
666 if (src->is_ssa)
667 return get_src_ssa(ctx, src->ssa);
668 else
669 return get_src_reg(ctx, &src->reg);
670 }
671
672 static SpvId
673 get_alu_src_raw(struct ntv_context *ctx, nir_alu_instr *alu, unsigned src)
674 {
675 assert(!alu->src[src].negate);
676 assert(!alu->src[src].abs);
677
678 SpvId def = get_src(ctx, &alu->src[src].src);
679
680 unsigned used_channels = 0;
681 bool need_swizzle = false;
682 for (unsigned i = 0; i < NIR_MAX_VEC_COMPONENTS; i++) {
683 if (!nir_alu_instr_channel_used(alu, src, i))
684 continue;
685
686 used_channels++;
687
688 if (alu->src[src].swizzle[i] != i)
689 need_swizzle = true;
690 }
691 assert(used_channels != 0);
692
693 unsigned live_channels = nir_src_num_components(alu->src[src].src);
694 if (used_channels != live_channels)
695 need_swizzle = true;
696
697 if (!need_swizzle)
698 return def;
699
700 int bit_size = nir_src_bit_size(alu->src[src].src);
701 assert(bit_size == 1 || bit_size == 32);
702
703 SpvId raw_type = bit_size == 1 ? spirv_builder_type_bool(&ctx->builder) :
704 spirv_builder_type_uint(&ctx->builder, bit_size);
705
706 if (used_channels == 1) {
707 uint32_t indices[] = { alu->src[src].swizzle[0] };
708 return spirv_builder_emit_composite_extract(&ctx->builder, raw_type,
709 def, indices,
710 ARRAY_SIZE(indices));
711 } else if (live_channels == 1) {
712 SpvId raw_vec_type = spirv_builder_type_vector(&ctx->builder,
713 raw_type,
714 used_channels);
715
716 SpvId constituents[NIR_MAX_VEC_COMPONENTS] = {0};
717 for (unsigned i = 0; i < used_channels; ++i)
718 constituents[i] = def;
719
720 return spirv_builder_emit_composite_construct(&ctx->builder,
721 raw_vec_type,
722 constituents,
723 used_channels);
724 } else {
725 SpvId raw_vec_type = spirv_builder_type_vector(&ctx->builder,
726 raw_type,
727 used_channels);
728
729 uint32_t components[NIR_MAX_VEC_COMPONENTS] = {0};
730 size_t num_components = 0;
731 for (unsigned i = 0; i < NIR_MAX_VEC_COMPONENTS; i++) {
732 if (!nir_alu_instr_channel_used(alu, src, i))
733 continue;
734
735 components[num_components++] = alu->src[src].swizzle[i];
736 }
737
738 return spirv_builder_emit_vector_shuffle(&ctx->builder, raw_vec_type,
739 def, def, components,
740 num_components);
741 }
742 }
743
744 static void
745 store_ssa_def(struct ntv_context *ctx, nir_ssa_def *ssa, SpvId result)
746 {
747 assert(result != 0);
748 assert(ssa->index < ctx->num_defs);
749 ctx->defs[ssa->index] = result;
750 }
751
752 static SpvId
753 emit_select(struct ntv_context *ctx, SpvId type, SpvId cond,
754 SpvId if_true, SpvId if_false)
755 {
756 return emit_triop(ctx, SpvOpSelect, type, cond, if_true, if_false);
757 }
758
759 static SpvId
760 uvec_to_bvec(struct ntv_context *ctx, SpvId value, unsigned num_components)
761 {
762 SpvId type = get_bvec_type(ctx, num_components);
763 SpvId zero = get_uvec_constant(ctx, 32, num_components, 0);
764 return emit_binop(ctx, SpvOpINotEqual, type, value, zero);
765 }
766
767 static SpvId
768 emit_bitcast(struct ntv_context *ctx, SpvId type, SpvId value)
769 {
770 return emit_unop(ctx, SpvOpBitcast, type, value);
771 }
772
773 static SpvId
774 bitcast_to_uvec(struct ntv_context *ctx, SpvId value, unsigned bit_size,
775 unsigned num_components)
776 {
777 SpvId type = get_uvec_type(ctx, bit_size, num_components);
778 return emit_bitcast(ctx, type, value);
779 }
780
781 static SpvId
782 bitcast_to_ivec(struct ntv_context *ctx, SpvId value, unsigned bit_size,
783 unsigned num_components)
784 {
785 SpvId type = get_ivec_type(ctx, bit_size, num_components);
786 return emit_bitcast(ctx, type, value);
787 }
788
789 static SpvId
790 bitcast_to_fvec(struct ntv_context *ctx, SpvId value, unsigned bit_size,
791 unsigned num_components)
792 {
793 SpvId type = get_fvec_type(ctx, bit_size, num_components);
794 return emit_bitcast(ctx, type, value);
795 }
796
797 static void
798 store_reg_def(struct ntv_context *ctx, nir_reg_dest *reg, SpvId result)
799 {
800 SpvId var = get_var_from_reg(ctx, reg->reg);
801 assert(var);
802 spirv_builder_emit_store(&ctx->builder, var, result);
803 }
804
805 static void
806 store_dest_raw(struct ntv_context *ctx, nir_dest *dest, SpvId result)
807 {
808 if (dest->is_ssa)
809 store_ssa_def(ctx, &dest->ssa, result);
810 else
811 store_reg_def(ctx, &dest->reg, result);
812 }
813
814 static SpvId
815 store_dest(struct ntv_context *ctx, nir_dest *dest, SpvId result, nir_alu_type type)
816 {
817 unsigned num_components = nir_dest_num_components(*dest);
818 unsigned bit_size = nir_dest_bit_size(*dest);
819
820 if (bit_size != 1) {
821 switch (nir_alu_type_get_base_type(type)) {
822 case nir_type_bool:
823 assert("bool should have bit-size 1");
824
825 case nir_type_uint:
826 break; /* nothing to do! */
827
828 case nir_type_int:
829 case nir_type_float:
830 result = bitcast_to_uvec(ctx, result, bit_size, num_components);
831 break;
832
833 default:
834 unreachable("unsupported nir_alu_type");
835 }
836 }
837
838 store_dest_raw(ctx, dest, result);
839 return result;
840 }
841
842 static SpvId
843 emit_unop(struct ntv_context *ctx, SpvOp op, SpvId type, SpvId src)
844 {
845 return spirv_builder_emit_unop(&ctx->builder, op, type, src);
846 }
847
848 /* return the intended xfb output vec type based on base type and vector size */
849 static SpvId
850 get_output_type(struct ntv_context *ctx, unsigned register_index, unsigned num_components)
851 {
852 const struct glsl_type *out_type = ctx->so_output_gl_types[register_index];
853 enum glsl_base_type base_type = glsl_get_base_type(out_type);
854 if (base_type == GLSL_TYPE_ARRAY)
855 base_type = glsl_get_base_type(glsl_without_array(out_type));
856
857 switch (base_type) {
858 case GLSL_TYPE_BOOL:
859 return get_bvec_type(ctx, num_components);
860
861 case GLSL_TYPE_FLOAT:
862 return get_fvec_type(ctx, 32, num_components);
863
864 case GLSL_TYPE_INT:
865 return get_ivec_type(ctx, 32, num_components);
866
867 case GLSL_TYPE_UINT:
868 return get_uvec_type(ctx, 32, num_components);
869
870 default:
871 break;
872 }
873 unreachable("unknown type");
874 return 0;
875 }
876
877 /* for streamout create new outputs, as streamout can be done on individual components,
878 from complete outputs, so we just can't use the created packed outputs */
879 static void
880 emit_so_info(struct ntv_context *ctx, unsigned max_output_location,
881 const struct pipe_stream_output_info *so_info, struct pipe_stream_output_info *local_so_info)
882 {
883 for (unsigned i = 0; i < local_so_info->num_outputs; i++) {
884 struct pipe_stream_output so_output = local_so_info->output[i];
885 SpvId out_type = get_output_type(ctx, so_output.register_index, so_output.num_components);
886 SpvId pointer_type = spirv_builder_type_pointer(&ctx->builder,
887 SpvStorageClassOutput,
888 out_type);
889 SpvId var_id = spirv_builder_emit_var(&ctx->builder, pointer_type,
890 SpvStorageClassOutput);
891 char name[10];
892
893 snprintf(name, 10, "xfb%d", i);
894 spirv_builder_emit_name(&ctx->builder, var_id, name);
895 spirv_builder_emit_offset(&ctx->builder, var_id, (so_output.dst_offset * 4));
896 spirv_builder_emit_xfb_buffer(&ctx->builder, var_id, so_output.output_buffer);
897 spirv_builder_emit_xfb_stride(&ctx->builder, var_id, so_info->stride[so_output.output_buffer] * 4);
898
899 /* output location is incremented by VARYING_SLOT_VAR0 for non-builtins in vtn,
900 * so we need to ensure that the new xfb location slot doesn't conflict with any previously-emitted
901 * outputs.
902 *
903 * if there's no previous outputs that take up user slots (VAR0+) then we can start right after the
904 * glsl builtin reserved slots, otherwise we start just after the adjusted user output slot
905 */
906 uint32_t location = NTV_MIN_RESERVED_SLOTS + i;
907 if (max_output_location >= VARYING_SLOT_VAR0)
908 location = max_output_location - VARYING_SLOT_VAR0 + 1 + i;
909 assert(location < VARYING_SLOT_VAR0);
910 assert(location <= VARYING_SLOT_VAR0 - 8 ||
911 !ctx->seen_texcoord[VARYING_SLOT_VAR0 - location - 1]);
912 spirv_builder_emit_location(&ctx->builder, var_id, location);
913
914 /* note: gl_ClipDistance[4] can the 0-indexed member of VARYING_SLOT_CLIP_DIST1 here,
915 * so this is still the 0 component
916 */
917 if (so_output.start_component)
918 spirv_builder_emit_component(&ctx->builder, var_id, so_output.start_component);
919
920 uint32_t *key = ralloc_size(ctx->mem_ctx, sizeof(uint32_t));
921 *key = (uint32_t)so_output.register_index << 2 | so_output.start_component;
922 _mesa_hash_table_insert(ctx->so_outputs, key, (void *)(intptr_t)var_id);
923
924 assert(ctx->num_entry_ifaces < ARRAY_SIZE(ctx->entry_ifaces));
925 ctx->entry_ifaces[ctx->num_entry_ifaces++] = var_id;
926 }
927 }
928
929 static void
930 emit_so_outputs(struct ntv_context *ctx,
931 const struct pipe_stream_output_info *so_info, struct pipe_stream_output_info *local_so_info)
932 {
933 SpvId loaded_outputs[VARYING_SLOT_MAX] = {};
934 for (unsigned i = 0; i < local_so_info->num_outputs; i++) {
935 uint32_t components[NIR_MAX_VEC_COMPONENTS];
936 struct pipe_stream_output so_output = local_so_info->output[i];
937 uint32_t so_key = (uint32_t) so_output.register_index << 2 | so_output.start_component;
938 struct hash_entry *he = _mesa_hash_table_search(ctx->so_outputs, &so_key);
939 assert(he);
940 SpvId so_output_var_id = (SpvId)(intptr_t)he->data;
941
942 SpvId type = get_output_type(ctx, so_output.register_index, so_output.num_components);
943 SpvId output = ctx->outputs[so_output.register_index];
944 SpvId output_type = ctx->so_output_types[so_output.register_index];
945 const struct glsl_type *out_type = ctx->so_output_gl_types[so_output.register_index];
946
947 if (!loaded_outputs[so_output.register_index])
948 loaded_outputs[so_output.register_index] = spirv_builder_emit_load(&ctx->builder, output_type, output);
949 SpvId src = loaded_outputs[so_output.register_index];
950
951 SpvId result;
952
953 for (unsigned c = 0; c < so_output.num_components; c++) {
954 components[c] = so_output.start_component + c;
955 /* this is the second half of a 2 * vec4 array */
956 if (ctx->stage == MESA_SHADER_VERTEX && so_output.register_index == VARYING_SLOT_CLIP_DIST1)
957 components[c] += 4;
958 }
959
960 /* if we're emitting a scalar or the type we're emitting matches the output's original type and we're
961 * emitting the same number of components, then we can skip any sort of conversion here
962 */
963 if (glsl_type_is_scalar(out_type) || (type == output_type && glsl_get_length(out_type) == so_output.num_components))
964 result = src;
965 else {
966 /* OpCompositeExtract can only extract scalars for our use here */
967 if (so_output.num_components == 1) {
968 result = spirv_builder_emit_composite_extract(&ctx->builder, type, src, components, so_output.num_components);
969 } else if (glsl_type_is_vector(out_type)) {
970 /* OpVectorShuffle can select vector members into a differently-sized vector */
971 result = spirv_builder_emit_vector_shuffle(&ctx->builder, type,
972 src, src,
973 components, so_output.num_components);
974 result = emit_unop(ctx, SpvOpBitcast, type, result);
975 } else {
976 /* for arrays, we need to manually extract each desired member
977 * and re-pack them into the desired output type
978 */
979 for (unsigned c = 0; c < so_output.num_components; c++) {
980 uint32_t member[] = { so_output.start_component + c };
981 SpvId base_type = get_glsl_type(ctx, glsl_without_array(out_type));
982
983 if (ctx->stage == MESA_SHADER_VERTEX && so_output.register_index == VARYING_SLOT_CLIP_DIST1)
984 member[0] += 4;
985 components[c] = spirv_builder_emit_composite_extract(&ctx->builder, base_type, src, member, 1);
986 }
987 result = spirv_builder_emit_composite_construct(&ctx->builder, type, components, so_output.num_components);
988 }
989 }
990
991 spirv_builder_emit_store(&ctx->builder, so_output_var_id, result);
992 }
993 }
994
995 static SpvId
996 emit_binop(struct ntv_context *ctx, SpvOp op, SpvId type,
997 SpvId src0, SpvId src1)
998 {
999 return spirv_builder_emit_binop(&ctx->builder, op, type, src0, src1);
1000 }
1001
1002 static SpvId
1003 emit_triop(struct ntv_context *ctx, SpvOp op, SpvId type,
1004 SpvId src0, SpvId src1, SpvId src2)
1005 {
1006 return spirv_builder_emit_triop(&ctx->builder, op, type, src0, src1, src2);
1007 }
1008
1009 static SpvId
1010 emit_builtin_unop(struct ntv_context *ctx, enum GLSLstd450 op, SpvId type,
1011 SpvId src)
1012 {
1013 SpvId args[] = { src };
1014 return spirv_builder_emit_ext_inst(&ctx->builder, type, ctx->GLSL_std_450,
1015 op, args, ARRAY_SIZE(args));
1016 }
1017
1018 static SpvId
1019 emit_builtin_binop(struct ntv_context *ctx, enum GLSLstd450 op, SpvId type,
1020 SpvId src0, SpvId src1)
1021 {
1022 SpvId args[] = { src0, src1 };
1023 return spirv_builder_emit_ext_inst(&ctx->builder, type, ctx->GLSL_std_450,
1024 op, args, ARRAY_SIZE(args));
1025 }
1026
1027 static SpvId
1028 emit_builtin_triop(struct ntv_context *ctx, enum GLSLstd450 op, SpvId type,
1029 SpvId src0, SpvId src1, SpvId src2)
1030 {
1031 SpvId args[] = { src0, src1, src2 };
1032 return spirv_builder_emit_ext_inst(&ctx->builder, type, ctx->GLSL_std_450,
1033 op, args, ARRAY_SIZE(args));
1034 }
1035
1036 static SpvId
1037 get_fvec_constant(struct ntv_context *ctx, unsigned bit_size,
1038 unsigned num_components, float value)
1039 {
1040 assert(bit_size == 32);
1041
1042 SpvId result = emit_float_const(ctx, bit_size, value);
1043 if (num_components == 1)
1044 return result;
1045
1046 assert(num_components > 1);
1047 SpvId components[num_components];
1048 for (int i = 0; i < num_components; i++)
1049 components[i] = result;
1050
1051 SpvId type = get_fvec_type(ctx, bit_size, num_components);
1052 return spirv_builder_const_composite(&ctx->builder, type, components,
1053 num_components);
1054 }
1055
1056 static SpvId
1057 get_uvec_constant(struct ntv_context *ctx, unsigned bit_size,
1058 unsigned num_components, uint32_t value)
1059 {
1060 assert(bit_size == 32);
1061
1062 SpvId result = emit_uint_const(ctx, bit_size, value);
1063 if (num_components == 1)
1064 return result;
1065
1066 assert(num_components > 1);
1067 SpvId components[num_components];
1068 for (int i = 0; i < num_components; i++)
1069 components[i] = result;
1070
1071 SpvId type = get_uvec_type(ctx, bit_size, num_components);
1072 return spirv_builder_const_composite(&ctx->builder, type, components,
1073 num_components);
1074 }
1075
1076 static SpvId
1077 get_ivec_constant(struct ntv_context *ctx, unsigned bit_size,
1078 unsigned num_components, int32_t value)
1079 {
1080 assert(bit_size == 32);
1081
1082 SpvId result = emit_int_const(ctx, bit_size, value);
1083 if (num_components == 1)
1084 return result;
1085
1086 assert(num_components > 1);
1087 SpvId components[num_components];
1088 for (int i = 0; i < num_components; i++)
1089 components[i] = result;
1090
1091 SpvId type = get_ivec_type(ctx, bit_size, num_components);
1092 return spirv_builder_const_composite(&ctx->builder, type, components,
1093 num_components);
1094 }
1095
1096 static inline unsigned
1097 alu_instr_src_components(const nir_alu_instr *instr, unsigned src)
1098 {
1099 if (nir_op_infos[instr->op].input_sizes[src] > 0)
1100 return nir_op_infos[instr->op].input_sizes[src];
1101
1102 if (instr->dest.dest.is_ssa)
1103 return instr->dest.dest.ssa.num_components;
1104 else
1105 return instr->dest.dest.reg.reg->num_components;
1106 }
1107
1108 static SpvId
1109 get_alu_src(struct ntv_context *ctx, nir_alu_instr *alu, unsigned src)
1110 {
1111 SpvId raw_value = get_alu_src_raw(ctx, alu, src);
1112
1113 unsigned num_components = alu_instr_src_components(alu, src);
1114 unsigned bit_size = nir_src_bit_size(alu->src[src].src);
1115 nir_alu_type type = nir_op_infos[alu->op].input_types[src];
1116
1117 if (bit_size == 1)
1118 return raw_value;
1119 else {
1120 switch (nir_alu_type_get_base_type(type)) {
1121 case nir_type_bool:
1122 unreachable("bool should have bit-size 1");
1123
1124 case nir_type_int:
1125 return bitcast_to_ivec(ctx, raw_value, bit_size, num_components);
1126
1127 case nir_type_uint:
1128 return raw_value;
1129
1130 case nir_type_float:
1131 return bitcast_to_fvec(ctx, raw_value, bit_size, num_components);
1132
1133 default:
1134 unreachable("unknown nir_alu_type");
1135 }
1136 }
1137 }
1138
1139 static SpvId
1140 store_alu_result(struct ntv_context *ctx, nir_alu_instr *alu, SpvId result)
1141 {
1142 assert(!alu->dest.saturate);
1143 return store_dest(ctx, &alu->dest.dest, result,
1144 nir_op_infos[alu->op].output_type);
1145 }
1146
1147 static SpvId
1148 get_dest_type(struct ntv_context *ctx, nir_dest *dest, nir_alu_type type)
1149 {
1150 unsigned num_components = nir_dest_num_components(*dest);
1151 unsigned bit_size = nir_dest_bit_size(*dest);
1152
1153 if (bit_size == 1)
1154 return get_bvec_type(ctx, num_components);
1155
1156 switch (nir_alu_type_get_base_type(type)) {
1157 case nir_type_bool:
1158 unreachable("bool should have bit-size 1");
1159
1160 case nir_type_int:
1161 return get_ivec_type(ctx, bit_size, num_components);
1162
1163 case nir_type_uint:
1164 return get_uvec_type(ctx, bit_size, num_components);
1165
1166 case nir_type_float:
1167 return get_fvec_type(ctx, bit_size, num_components);
1168
1169 default:
1170 unreachable("unsupported nir_alu_type");
1171 }
1172 }
1173
1174 static void
1175 emit_alu(struct ntv_context *ctx, nir_alu_instr *alu)
1176 {
1177 SpvId src[nir_op_infos[alu->op].num_inputs];
1178 unsigned in_bit_sizes[nir_op_infos[alu->op].num_inputs];
1179 for (unsigned i = 0; i < nir_op_infos[alu->op].num_inputs; i++) {
1180 src[i] = get_alu_src(ctx, alu, i);
1181 in_bit_sizes[i] = nir_src_bit_size(alu->src[i].src);
1182 }
1183
1184 SpvId dest_type = get_dest_type(ctx, &alu->dest.dest,
1185 nir_op_infos[alu->op].output_type);
1186 unsigned bit_size = nir_dest_bit_size(alu->dest.dest);
1187 unsigned num_components = nir_dest_num_components(alu->dest.dest);
1188
1189 SpvId result = 0;
1190 switch (alu->op) {
1191 case nir_op_mov:
1192 assert(nir_op_infos[alu->op].num_inputs == 1);
1193 result = src[0];
1194 break;
1195
1196 #define UNOP(nir_op, spirv_op) \
1197 case nir_op: \
1198 assert(nir_op_infos[alu->op].num_inputs == 1); \
1199 result = emit_unop(ctx, spirv_op, dest_type, src[0]); \
1200 break;
1201
1202 UNOP(nir_op_ineg, SpvOpSNegate)
1203 UNOP(nir_op_fneg, SpvOpFNegate)
1204 UNOP(nir_op_fddx, SpvOpDPdx)
1205 UNOP(nir_op_fddx_coarse, SpvOpDPdxCoarse)
1206 UNOP(nir_op_fddx_fine, SpvOpDPdxFine)
1207 UNOP(nir_op_fddy, SpvOpDPdy)
1208 UNOP(nir_op_fddy_coarse, SpvOpDPdyCoarse)
1209 UNOP(nir_op_fddy_fine, SpvOpDPdyFine)
1210 UNOP(nir_op_f2i32, SpvOpConvertFToS)
1211 UNOP(nir_op_f2u32, SpvOpConvertFToU)
1212 UNOP(nir_op_i2f32, SpvOpConvertSToF)
1213 UNOP(nir_op_u2f32, SpvOpConvertUToF)
1214 UNOP(nir_op_bitfield_reverse, SpvOpBitReverse)
1215 #undef UNOP
1216
1217 case nir_op_inot:
1218 if (bit_size == 1)
1219 result = emit_unop(ctx, SpvOpLogicalNot, dest_type, src[0]);
1220 else
1221 result = emit_unop(ctx, SpvOpNot, dest_type, src[0]);
1222 break;
1223
1224 case nir_op_b2i32:
1225 assert(nir_op_infos[alu->op].num_inputs == 1);
1226 result = emit_select(ctx, dest_type, src[0],
1227 get_ivec_constant(ctx, 32, num_components, 1),
1228 get_ivec_constant(ctx, 32, num_components, 0));
1229 break;
1230
1231 case nir_op_b2f32:
1232 assert(nir_op_infos[alu->op].num_inputs == 1);
1233 result = emit_select(ctx, dest_type, src[0],
1234 get_fvec_constant(ctx, 32, num_components, 1),
1235 get_fvec_constant(ctx, 32, num_components, 0));
1236 break;
1237
1238 #define BUILTIN_UNOP(nir_op, spirv_op) \
1239 case nir_op: \
1240 assert(nir_op_infos[alu->op].num_inputs == 1); \
1241 result = emit_builtin_unop(ctx, spirv_op, dest_type, src[0]); \
1242 break;
1243
1244 BUILTIN_UNOP(nir_op_iabs, GLSLstd450SAbs)
1245 BUILTIN_UNOP(nir_op_fabs, GLSLstd450FAbs)
1246 BUILTIN_UNOP(nir_op_fsqrt, GLSLstd450Sqrt)
1247 BUILTIN_UNOP(nir_op_frsq, GLSLstd450InverseSqrt)
1248 BUILTIN_UNOP(nir_op_flog2, GLSLstd450Log2)
1249 BUILTIN_UNOP(nir_op_fexp2, GLSLstd450Exp2)
1250 BUILTIN_UNOP(nir_op_ffract, GLSLstd450Fract)
1251 BUILTIN_UNOP(nir_op_ffloor, GLSLstd450Floor)
1252 BUILTIN_UNOP(nir_op_fceil, GLSLstd450Ceil)
1253 BUILTIN_UNOP(nir_op_ftrunc, GLSLstd450Trunc)
1254 BUILTIN_UNOP(nir_op_fround_even, GLSLstd450RoundEven)
1255 BUILTIN_UNOP(nir_op_fsign, GLSLstd450FSign)
1256 BUILTIN_UNOP(nir_op_isign, GLSLstd450SSign)
1257 BUILTIN_UNOP(nir_op_fsin, GLSLstd450Sin)
1258 BUILTIN_UNOP(nir_op_fcos, GLSLstd450Cos)
1259 #undef BUILTIN_UNOP
1260
1261 case nir_op_frcp:
1262 assert(nir_op_infos[alu->op].num_inputs == 1);
1263 result = emit_binop(ctx, SpvOpFDiv, dest_type,
1264 get_fvec_constant(ctx, bit_size, num_components, 1),
1265 src[0]);
1266 break;
1267
1268 case nir_op_f2b1:
1269 assert(nir_op_infos[alu->op].num_inputs == 1);
1270 result = emit_binop(ctx, SpvOpFOrdNotEqual, dest_type, src[0],
1271 get_fvec_constant(ctx,
1272 nir_src_bit_size(alu->src[0].src),
1273 num_components, 0));
1274 break;
1275 case nir_op_i2b1:
1276 assert(nir_op_infos[alu->op].num_inputs == 1);
1277 result = emit_binop(ctx, SpvOpINotEqual, dest_type, src[0],
1278 get_ivec_constant(ctx,
1279 nir_src_bit_size(alu->src[0].src),
1280 num_components, 0));
1281 break;
1282
1283
1284 #define BINOP(nir_op, spirv_op) \
1285 case nir_op: \
1286 assert(nir_op_infos[alu->op].num_inputs == 2); \
1287 result = emit_binop(ctx, spirv_op, dest_type, src[0], src[1]); \
1288 break;
1289
1290 BINOP(nir_op_iadd, SpvOpIAdd)
1291 BINOP(nir_op_isub, SpvOpISub)
1292 BINOP(nir_op_imul, SpvOpIMul)
1293 BINOP(nir_op_idiv, SpvOpSDiv)
1294 BINOP(nir_op_udiv, SpvOpUDiv)
1295 BINOP(nir_op_umod, SpvOpUMod)
1296 BINOP(nir_op_fadd, SpvOpFAdd)
1297 BINOP(nir_op_fsub, SpvOpFSub)
1298 BINOP(nir_op_fmul, SpvOpFMul)
1299 BINOP(nir_op_fdiv, SpvOpFDiv)
1300 BINOP(nir_op_fmod, SpvOpFMod)
1301 BINOP(nir_op_ilt, SpvOpSLessThan)
1302 BINOP(nir_op_ige, SpvOpSGreaterThanEqual)
1303 BINOP(nir_op_ult, SpvOpULessThan)
1304 BINOP(nir_op_uge, SpvOpUGreaterThanEqual)
1305 BINOP(nir_op_flt, SpvOpFOrdLessThan)
1306 BINOP(nir_op_fge, SpvOpFOrdGreaterThanEqual)
1307 BINOP(nir_op_feq, SpvOpFOrdEqual)
1308 BINOP(nir_op_fne, SpvOpFUnordNotEqual)
1309 BINOP(nir_op_ishl, SpvOpShiftLeftLogical)
1310 BINOP(nir_op_ishr, SpvOpShiftRightArithmetic)
1311 BINOP(nir_op_ushr, SpvOpShiftRightLogical)
1312 BINOP(nir_op_ixor, SpvOpBitwiseXor)
1313 #undef BINOP
1314
1315 #define BINOP_LOG(nir_op, spv_op, spv_log_op) \
1316 case nir_op: \
1317 assert(nir_op_infos[alu->op].num_inputs == 2); \
1318 if (nir_src_bit_size(alu->src[0].src) == 1) \
1319 result = emit_binop(ctx, spv_log_op, dest_type, src[0], src[1]); \
1320 else \
1321 result = emit_binop(ctx, spv_op, dest_type, src[0], src[1]); \
1322 break;
1323
1324 BINOP_LOG(nir_op_iand, SpvOpBitwiseAnd, SpvOpLogicalAnd)
1325 BINOP_LOG(nir_op_ior, SpvOpBitwiseOr, SpvOpLogicalOr)
1326 BINOP_LOG(nir_op_ieq, SpvOpIEqual, SpvOpLogicalEqual)
1327 BINOP_LOG(nir_op_ine, SpvOpINotEqual, SpvOpLogicalNotEqual)
1328 #undef BINOP_LOG
1329
1330 #define BUILTIN_BINOP(nir_op, spirv_op) \
1331 case nir_op: \
1332 assert(nir_op_infos[alu->op].num_inputs == 2); \
1333 result = emit_builtin_binop(ctx, spirv_op, dest_type, src[0], src[1]); \
1334 break;
1335
1336 BUILTIN_BINOP(nir_op_fmin, GLSLstd450FMin)
1337 BUILTIN_BINOP(nir_op_fmax, GLSLstd450FMax)
1338 BUILTIN_BINOP(nir_op_imin, GLSLstd450SMin)
1339 BUILTIN_BINOP(nir_op_imax, GLSLstd450SMax)
1340 BUILTIN_BINOP(nir_op_umin, GLSLstd450UMin)
1341 BUILTIN_BINOP(nir_op_umax, GLSLstd450UMax)
1342 #undef BUILTIN_BINOP
1343
1344 case nir_op_fdot2:
1345 case nir_op_fdot3:
1346 case nir_op_fdot4:
1347 assert(nir_op_infos[alu->op].num_inputs == 2);
1348 result = emit_binop(ctx, SpvOpDot, dest_type, src[0], src[1]);
1349 break;
1350
1351 case nir_op_fdph:
1352 unreachable("should already be lowered away");
1353
1354 case nir_op_seq:
1355 case nir_op_sne:
1356 case nir_op_slt:
1357 case nir_op_sge: {
1358 assert(nir_op_infos[alu->op].num_inputs == 2);
1359 int num_components = nir_dest_num_components(alu->dest.dest);
1360 SpvId bool_type = get_bvec_type(ctx, num_components);
1361
1362 SpvId zero = emit_float_const(ctx, bit_size, 0.0f);
1363 SpvId one = emit_float_const(ctx, bit_size, 1.0f);
1364 if (num_components > 1) {
1365 SpvId zero_comps[num_components], one_comps[num_components];
1366 for (int i = 0; i < num_components; i++) {
1367 zero_comps[i] = zero;
1368 one_comps[i] = one;
1369 }
1370
1371 zero = spirv_builder_const_composite(&ctx->builder, dest_type,
1372 zero_comps, num_components);
1373 one = spirv_builder_const_composite(&ctx->builder, dest_type,
1374 one_comps, num_components);
1375 }
1376
1377 SpvOp op;
1378 switch (alu->op) {
1379 case nir_op_seq: op = SpvOpFOrdEqual; break;
1380 case nir_op_sne: op = SpvOpFOrdNotEqual; break;
1381 case nir_op_slt: op = SpvOpFOrdLessThan; break;
1382 case nir_op_sge: op = SpvOpFOrdGreaterThanEqual; break;
1383 default: unreachable("unexpected op");
1384 }
1385
1386 result = emit_binop(ctx, op, bool_type, src[0], src[1]);
1387 result = emit_select(ctx, dest_type, result, one, zero);
1388 }
1389 break;
1390
1391 case nir_op_flrp:
1392 assert(nir_op_infos[alu->op].num_inputs == 3);
1393 result = emit_builtin_triop(ctx, GLSLstd450FMix, dest_type,
1394 src[0], src[1], src[2]);
1395 break;
1396
1397 case nir_op_fcsel:
1398 result = emit_binop(ctx, SpvOpFOrdGreaterThan,
1399 get_bvec_type(ctx, num_components),
1400 src[0],
1401 get_fvec_constant(ctx,
1402 nir_src_bit_size(alu->src[0].src),
1403 num_components, 0));
1404 result = emit_select(ctx, dest_type, result, src[1], src[2]);
1405 break;
1406
1407 case nir_op_bcsel:
1408 assert(nir_op_infos[alu->op].num_inputs == 3);
1409 result = emit_select(ctx, dest_type, src[0], src[1], src[2]);
1410 break;
1411
1412 case nir_op_bany_fnequal2:
1413 case nir_op_bany_fnequal3:
1414 case nir_op_bany_fnequal4: {
1415 assert(nir_op_infos[alu->op].num_inputs == 2);
1416 assert(alu_instr_src_components(alu, 0) ==
1417 alu_instr_src_components(alu, 1));
1418 assert(in_bit_sizes[0] == in_bit_sizes[1]);
1419 /* The type of Operand 1 and Operand 2 must be a scalar or vector of floating-point type. */
1420 SpvOp op = in_bit_sizes[0] == 1 ? SpvOpLogicalNotEqual : SpvOpFOrdNotEqual;
1421 result = emit_binop(ctx, op,
1422 get_bvec_type(ctx, alu_instr_src_components(alu, 0)),
1423 src[0], src[1]);
1424 result = emit_unop(ctx, SpvOpAny, dest_type, result);
1425 break;
1426 }
1427
1428 case nir_op_ball_fequal2:
1429 case nir_op_ball_fequal3:
1430 case nir_op_ball_fequal4: {
1431 assert(nir_op_infos[alu->op].num_inputs == 2);
1432 assert(alu_instr_src_components(alu, 0) ==
1433 alu_instr_src_components(alu, 1));
1434 assert(in_bit_sizes[0] == in_bit_sizes[1]);
1435 /* The type of Operand 1 and Operand 2 must be a scalar or vector of floating-point type. */
1436 SpvOp op = in_bit_sizes[0] == 1 ? SpvOpLogicalEqual : SpvOpFOrdEqual;
1437 result = emit_binop(ctx, op,
1438 get_bvec_type(ctx, alu_instr_src_components(alu, 0)),
1439 src[0], src[1]);
1440 result = emit_unop(ctx, SpvOpAll, dest_type, result);
1441 break;
1442 }
1443
1444 case nir_op_bany_inequal2:
1445 case nir_op_bany_inequal3:
1446 case nir_op_bany_inequal4: {
1447 assert(nir_op_infos[alu->op].num_inputs == 2);
1448 assert(alu_instr_src_components(alu, 0) ==
1449 alu_instr_src_components(alu, 1));
1450 assert(in_bit_sizes[0] == in_bit_sizes[1]);
1451 /* The type of Operand 1 and Operand 2 must be a scalar or vector of integer type. */
1452 SpvOp op = in_bit_sizes[0] == 1 ? SpvOpLogicalNotEqual : SpvOpINotEqual;
1453 result = emit_binop(ctx, op,
1454 get_bvec_type(ctx, alu_instr_src_components(alu, 0)),
1455 src[0], src[1]);
1456 result = emit_unop(ctx, SpvOpAny, dest_type, result);
1457 break;
1458 }
1459
1460 case nir_op_ball_iequal2:
1461 case nir_op_ball_iequal3:
1462 case nir_op_ball_iequal4: {
1463 assert(nir_op_infos[alu->op].num_inputs == 2);
1464 assert(alu_instr_src_components(alu, 0) ==
1465 alu_instr_src_components(alu, 1));
1466 assert(in_bit_sizes[0] == in_bit_sizes[1]);
1467 /* The type of Operand 1 and Operand 2 must be a scalar or vector of integer type. */
1468 SpvOp op = in_bit_sizes[0] == 1 ? SpvOpLogicalEqual : SpvOpIEqual;
1469 result = emit_binop(ctx, op,
1470 get_bvec_type(ctx, alu_instr_src_components(alu, 0)),
1471 src[0], src[1]);
1472 result = emit_unop(ctx, SpvOpAll, dest_type, result);
1473 break;
1474 }
1475
1476 case nir_op_vec2:
1477 case nir_op_vec3:
1478 case nir_op_vec4: {
1479 int num_inputs = nir_op_infos[alu->op].num_inputs;
1480 assert(2 <= num_inputs && num_inputs <= 4);
1481 result = spirv_builder_emit_composite_construct(&ctx->builder, dest_type,
1482 src, num_inputs);
1483 }
1484 break;
1485
1486 default:
1487 fprintf(stderr, "emit_alu: not implemented (%s)\n",
1488 nir_op_infos[alu->op].name);
1489
1490 unreachable("unsupported opcode");
1491 return;
1492 }
1493
1494 store_alu_result(ctx, alu, result);
1495 }
1496
1497 static void
1498 emit_load_const(struct ntv_context *ctx, nir_load_const_instr *load_const)
1499 {
1500 unsigned bit_size = load_const->def.bit_size;
1501 unsigned num_components = load_const->def.num_components;
1502
1503 SpvId constant;
1504 if (num_components > 1) {
1505 SpvId components[num_components];
1506 SpvId type;
1507 if (bit_size == 1) {
1508 for (int i = 0; i < num_components; i++)
1509 components[i] = spirv_builder_const_bool(&ctx->builder,
1510 load_const->value[i].b);
1511
1512 type = get_bvec_type(ctx, num_components);
1513 } else {
1514 for (int i = 0; i < num_components; i++)
1515 components[i] = emit_uint_const(ctx, bit_size,
1516 load_const->value[i].u32);
1517
1518 type = get_uvec_type(ctx, bit_size, num_components);
1519 }
1520 constant = spirv_builder_const_composite(&ctx->builder, type,
1521 components, num_components);
1522 } else {
1523 assert(num_components == 1);
1524 if (bit_size == 1)
1525 constant = spirv_builder_const_bool(&ctx->builder,
1526 load_const->value[0].b);
1527 else
1528 constant = emit_uint_const(ctx, bit_size, load_const->value[0].u32);
1529 }
1530
1531 store_ssa_def(ctx, &load_const->def, constant);
1532 }
1533
1534 static void
1535 emit_load_ubo(struct ntv_context *ctx, nir_intrinsic_instr *intr)
1536 {
1537 nir_const_value *const_block_index = nir_src_as_const_value(intr->src[0]);
1538 assert(const_block_index); // no dynamic indexing for now
1539 assert(const_block_index->u32 == 0); // we only support the default UBO for now
1540
1541 nir_const_value *const_offset = nir_src_as_const_value(intr->src[1]);
1542 if (const_offset) {
1543 SpvId uvec4_type = get_uvec_type(ctx, 32, 4);
1544 SpvId pointer_type = spirv_builder_type_pointer(&ctx->builder,
1545 SpvStorageClassUniform,
1546 uvec4_type);
1547
1548 unsigned idx = const_offset->u32;
1549 SpvId member = emit_uint_const(ctx, 32, 0);
1550 SpvId offset = emit_uint_const(ctx, 32, idx);
1551 SpvId offsets[] = { member, offset };
1552 SpvId ptr = spirv_builder_emit_access_chain(&ctx->builder, pointer_type,
1553 ctx->ubos[0], offsets,
1554 ARRAY_SIZE(offsets));
1555 SpvId result = spirv_builder_emit_load(&ctx->builder, uvec4_type, ptr);
1556
1557 SpvId type = get_dest_uvec_type(ctx, &intr->dest);
1558 unsigned num_components = nir_dest_num_components(intr->dest);
1559 if (num_components == 1) {
1560 uint32_t components[] = { 0 };
1561 result = spirv_builder_emit_composite_extract(&ctx->builder,
1562 type,
1563 result, components,
1564 1);
1565 } else if (num_components < 4) {
1566 SpvId constituents[num_components];
1567 SpvId uint_type = spirv_builder_type_uint(&ctx->builder, 32);
1568 for (uint32_t i = 0; i < num_components; ++i)
1569 constituents[i] = spirv_builder_emit_composite_extract(&ctx->builder,
1570 uint_type,
1571 result, &i,
1572 1);
1573
1574 result = spirv_builder_emit_composite_construct(&ctx->builder,
1575 type,
1576 constituents,
1577 num_components);
1578 }
1579
1580 if (nir_dest_bit_size(intr->dest) == 1)
1581 result = uvec_to_bvec(ctx, result, num_components);
1582
1583 store_dest(ctx, &intr->dest, result, nir_type_uint);
1584 } else
1585 unreachable("uniform-addressing not yet supported");
1586 }
1587
1588 static void
1589 emit_discard(struct ntv_context *ctx, nir_intrinsic_instr *intr)
1590 {
1591 assert(ctx->block_started);
1592 spirv_builder_emit_kill(&ctx->builder);
1593 /* discard is weird in NIR, so let's just create an unreachable block after
1594 it and hope that the vulkan driver will DCE any instructinos in it. */
1595 spirv_builder_label(&ctx->builder, spirv_builder_new_id(&ctx->builder));
1596 }
1597
1598 static void
1599 emit_load_deref(struct ntv_context *ctx, nir_intrinsic_instr *intr)
1600 {
1601 SpvId ptr = get_src(ctx, intr->src);
1602
1603 SpvId result = spirv_builder_emit_load(&ctx->builder,
1604 get_glsl_type(ctx, nir_src_as_deref(intr->src[0])->type),
1605 ptr);
1606 unsigned num_components = nir_dest_num_components(intr->dest);
1607 unsigned bit_size = nir_dest_bit_size(intr->dest);
1608 result = bitcast_to_uvec(ctx, result, bit_size, num_components);
1609 store_dest(ctx, &intr->dest, result, nir_type_uint);
1610 }
1611
1612 static void
1613 emit_store_deref(struct ntv_context *ctx, nir_intrinsic_instr *intr)
1614 {
1615 SpvId ptr = get_src(ctx, &intr->src[0]);
1616 SpvId src = get_src(ctx, &intr->src[1]);
1617
1618 SpvId type = get_glsl_type(ctx, nir_src_as_deref(intr->src[0])->type);
1619 SpvId result = emit_bitcast(ctx, type, src);
1620 spirv_builder_emit_store(&ctx->builder, ptr, result);
1621 }
1622
1623 static SpvId
1624 create_builtin_var(struct ntv_context *ctx, SpvId var_type,
1625 SpvStorageClass storage_class,
1626 const char *name, SpvBuiltIn builtin)
1627 {
1628 SpvId pointer_type = spirv_builder_type_pointer(&ctx->builder,
1629 storage_class,
1630 var_type);
1631 SpvId var = spirv_builder_emit_var(&ctx->builder, pointer_type,
1632 storage_class);
1633 spirv_builder_emit_name(&ctx->builder, var, name);
1634 spirv_builder_emit_builtin(&ctx->builder, var, builtin);
1635
1636 assert(ctx->num_entry_ifaces < ARRAY_SIZE(ctx->entry_ifaces));
1637 ctx->entry_ifaces[ctx->num_entry_ifaces++] = var;
1638 return var;
1639 }
1640
1641 static void
1642 emit_load_front_face(struct ntv_context *ctx, nir_intrinsic_instr *intr)
1643 {
1644 SpvId var_type = spirv_builder_type_bool(&ctx->builder);
1645 if (!ctx->front_face_var)
1646 ctx->front_face_var = create_builtin_var(ctx, var_type,
1647 SpvStorageClassInput,
1648 "gl_FrontFacing",
1649 SpvBuiltInFrontFacing);
1650
1651 SpvId result = spirv_builder_emit_load(&ctx->builder, var_type,
1652 ctx->front_face_var);
1653 assert(1 == nir_dest_num_components(intr->dest));
1654 store_dest(ctx, &intr->dest, result, nir_type_bool);
1655 }
1656
1657 static void
1658 emit_load_instance_id(struct ntv_context *ctx, nir_intrinsic_instr *intr)
1659 {
1660 SpvId var_type = spirv_builder_type_uint(&ctx->builder, 32);
1661 if (!ctx->instance_id_var)
1662 ctx->instance_id_var = create_builtin_var(ctx, var_type,
1663 SpvStorageClassInput,
1664 "gl_InstanceId",
1665 SpvBuiltInInstanceIndex);
1666
1667 SpvId result = spirv_builder_emit_load(&ctx->builder, var_type,
1668 ctx->instance_id_var);
1669 assert(1 == nir_dest_num_components(intr->dest));
1670 store_dest(ctx, &intr->dest, result, nir_type_uint);
1671 }
1672
1673 static void
1674 emit_load_vertex_id(struct ntv_context *ctx, nir_intrinsic_instr *intr)
1675 {
1676 SpvId var_type = spirv_builder_type_uint(&ctx->builder, 32);
1677 if (!ctx->vertex_id_var)
1678 ctx->vertex_id_var = create_builtin_var(ctx, var_type,
1679 SpvStorageClassInput,
1680 "gl_VertexID",
1681 SpvBuiltInVertexIndex);
1682
1683 SpvId result = spirv_builder_emit_load(&ctx->builder, var_type,
1684 ctx->vertex_id_var);
1685 assert(1 == nir_dest_num_components(intr->dest));
1686 store_dest(ctx, &intr->dest, result, nir_type_uint);
1687 }
1688
1689 static void
1690 emit_intrinsic(struct ntv_context *ctx, nir_intrinsic_instr *intr)
1691 {
1692 switch (intr->intrinsic) {
1693 case nir_intrinsic_load_ubo:
1694 emit_load_ubo(ctx, intr);
1695 break;
1696
1697 case nir_intrinsic_discard:
1698 emit_discard(ctx, intr);
1699 break;
1700
1701 case nir_intrinsic_load_deref:
1702 emit_load_deref(ctx, intr);
1703 break;
1704
1705 case nir_intrinsic_store_deref:
1706 emit_store_deref(ctx, intr);
1707 break;
1708
1709 case nir_intrinsic_load_front_face:
1710 emit_load_front_face(ctx, intr);
1711 break;
1712
1713 case nir_intrinsic_load_instance_id:
1714 emit_load_instance_id(ctx, intr);
1715 break;
1716
1717 case nir_intrinsic_load_vertex_id:
1718 emit_load_vertex_id(ctx, intr);
1719 break;
1720
1721 default:
1722 fprintf(stderr, "emit_intrinsic: not implemented (%s)\n",
1723 nir_intrinsic_infos[intr->intrinsic].name);
1724 unreachable("unsupported intrinsic");
1725 }
1726 }
1727
1728 static void
1729 emit_undef(struct ntv_context *ctx, nir_ssa_undef_instr *undef)
1730 {
1731 SpvId type = get_uvec_type(ctx, undef->def.bit_size,
1732 undef->def.num_components);
1733
1734 store_ssa_def(ctx, &undef->def,
1735 spirv_builder_emit_undef(&ctx->builder, type));
1736 }
1737
1738 static SpvId
1739 get_src_float(struct ntv_context *ctx, nir_src *src)
1740 {
1741 SpvId def = get_src(ctx, src);
1742 unsigned num_components = nir_src_num_components(*src);
1743 unsigned bit_size = nir_src_bit_size(*src);
1744 return bitcast_to_fvec(ctx, def, bit_size, num_components);
1745 }
1746
1747 static SpvId
1748 get_src_int(struct ntv_context *ctx, nir_src *src)
1749 {
1750 SpvId def = get_src(ctx, src);
1751 unsigned num_components = nir_src_num_components(*src);
1752 unsigned bit_size = nir_src_bit_size(*src);
1753 return bitcast_to_ivec(ctx, def, bit_size, num_components);
1754 }
1755
1756 static void
1757 emit_tex(struct ntv_context *ctx, nir_tex_instr *tex)
1758 {
1759 assert(tex->op == nir_texop_tex ||
1760 tex->op == nir_texop_txb ||
1761 tex->op == nir_texop_txl ||
1762 tex->op == nir_texop_txd ||
1763 tex->op == nir_texop_txf ||
1764 tex->op == nir_texop_txf_ms ||
1765 tex->op == nir_texop_txs);
1766 assert(tex->texture_index == tex->sampler_index);
1767
1768 SpvId coord = 0, proj = 0, bias = 0, lod = 0, dref = 0, dx = 0, dy = 0,
1769 offset = 0, sample = 0;
1770 unsigned coord_components = 0;
1771 for (unsigned i = 0; i < tex->num_srcs; i++) {
1772 switch (tex->src[i].src_type) {
1773 case nir_tex_src_coord:
1774 if (tex->op == nir_texop_txf ||
1775 tex->op == nir_texop_txf_ms)
1776 coord = get_src_int(ctx, &tex->src[i].src);
1777 else
1778 coord = get_src_float(ctx, &tex->src[i].src);
1779 coord_components = nir_src_num_components(tex->src[i].src);
1780 break;
1781
1782 case nir_tex_src_projector:
1783 assert(nir_src_num_components(tex->src[i].src) == 1);
1784 proj = get_src_float(ctx, &tex->src[i].src);
1785 assert(proj != 0);
1786 break;
1787
1788 case nir_tex_src_offset:
1789 offset = get_src_int(ctx, &tex->src[i].src);
1790 break;
1791
1792 case nir_tex_src_bias:
1793 assert(tex->op == nir_texop_txb);
1794 bias = get_src_float(ctx, &tex->src[i].src);
1795 assert(bias != 0);
1796 break;
1797
1798 case nir_tex_src_lod:
1799 assert(nir_src_num_components(tex->src[i].src) == 1);
1800 if (tex->op == nir_texop_txf ||
1801 tex->op == nir_texop_txf_ms ||
1802 tex->op == nir_texop_txs)
1803 lod = get_src_int(ctx, &tex->src[i].src);
1804 else
1805 lod = get_src_float(ctx, &tex->src[i].src);
1806 assert(lod != 0);
1807 break;
1808
1809 case nir_tex_src_ms_index:
1810 assert(nir_src_num_components(tex->src[i].src) == 1);
1811 sample = get_src_int(ctx, &tex->src[i].src);
1812 break;
1813
1814 case nir_tex_src_comparator:
1815 assert(nir_src_num_components(tex->src[i].src) == 1);
1816 dref = get_src_float(ctx, &tex->src[i].src);
1817 assert(dref != 0);
1818 break;
1819
1820 case nir_tex_src_ddx:
1821 dx = get_src_float(ctx, &tex->src[i].src);
1822 assert(dx != 0);
1823 break;
1824
1825 case nir_tex_src_ddy:
1826 dy = get_src_float(ctx, &tex->src[i].src);
1827 assert(dy != 0);
1828 break;
1829
1830 default:
1831 fprintf(stderr, "texture source: %d\n", tex->src[i].src_type);
1832 unreachable("unknown texture source");
1833 }
1834 }
1835
1836 if (lod == 0 && ctx->stage != MESA_SHADER_FRAGMENT) {
1837 lod = emit_float_const(ctx, 32, 0.0f);
1838 assert(lod != 0);
1839 }
1840
1841 SpvId image_type = ctx->image_types[tex->texture_index];
1842 SpvId sampled_type = spirv_builder_type_sampled_image(&ctx->builder,
1843 image_type);
1844
1845 assert(ctx->samplers_used & (1u << tex->texture_index));
1846 SpvId load = spirv_builder_emit_load(&ctx->builder, sampled_type,
1847 ctx->samplers[tex->texture_index]);
1848
1849 SpvId dest_type = get_dest_type(ctx, &tex->dest, tex->dest_type);
1850
1851 if (tex->op == nir_texop_txs) {
1852 SpvId image = spirv_builder_emit_image(&ctx->builder, image_type, load);
1853 SpvId result = spirv_builder_emit_image_query_size(&ctx->builder,
1854 dest_type, image,
1855 lod);
1856 store_dest(ctx, &tex->dest, result, tex->dest_type);
1857 return;
1858 }
1859
1860 if (proj && coord_components > 0) {
1861 SpvId constituents[coord_components + 1];
1862 if (coord_components == 1)
1863 constituents[0] = coord;
1864 else {
1865 assert(coord_components > 1);
1866 SpvId float_type = spirv_builder_type_float(&ctx->builder, 32);
1867 for (uint32_t i = 0; i < coord_components; ++i)
1868 constituents[i] = spirv_builder_emit_composite_extract(&ctx->builder,
1869 float_type,
1870 coord,
1871 &i, 1);
1872 }
1873
1874 constituents[coord_components++] = proj;
1875
1876 SpvId vec_type = get_fvec_type(ctx, 32, coord_components);
1877 coord = spirv_builder_emit_composite_construct(&ctx->builder,
1878 vec_type,
1879 constituents,
1880 coord_components);
1881 }
1882
1883 SpvId actual_dest_type = dest_type;
1884 if (dref)
1885 actual_dest_type = spirv_builder_type_float(&ctx->builder, 32);
1886
1887 SpvId result;
1888 if (tex->op == nir_texop_txf ||
1889 tex->op == nir_texop_txf_ms) {
1890 SpvId image = spirv_builder_emit_image(&ctx->builder, image_type, load);
1891 result = spirv_builder_emit_image_fetch(&ctx->builder, dest_type,
1892 image, coord, lod, sample);
1893 } else {
1894 result = spirv_builder_emit_image_sample(&ctx->builder,
1895 actual_dest_type, load,
1896 coord,
1897 proj != 0,
1898 lod, bias, dref, dx, dy,
1899 offset);
1900 }
1901
1902 spirv_builder_emit_decoration(&ctx->builder, result,
1903 SpvDecorationRelaxedPrecision);
1904
1905 if (dref && nir_dest_num_components(tex->dest) > 1) {
1906 SpvId components[4] = { result, result, result, result };
1907 result = spirv_builder_emit_composite_construct(&ctx->builder,
1908 dest_type,
1909 components,
1910 4);
1911 }
1912
1913 store_dest(ctx, &tex->dest, result, tex->dest_type);
1914 }
1915
1916 static void
1917 start_block(struct ntv_context *ctx, SpvId label)
1918 {
1919 /* terminate previous block if needed */
1920 if (ctx->block_started)
1921 spirv_builder_emit_branch(&ctx->builder, label);
1922
1923 /* start new block */
1924 spirv_builder_label(&ctx->builder, label);
1925 ctx->block_started = true;
1926 }
1927
1928 static void
1929 branch(struct ntv_context *ctx, SpvId label)
1930 {
1931 assert(ctx->block_started);
1932 spirv_builder_emit_branch(&ctx->builder, label);
1933 ctx->block_started = false;
1934 }
1935
1936 static void
1937 branch_conditional(struct ntv_context *ctx, SpvId condition, SpvId then_id,
1938 SpvId else_id)
1939 {
1940 assert(ctx->block_started);
1941 spirv_builder_emit_branch_conditional(&ctx->builder, condition,
1942 then_id, else_id);
1943 ctx->block_started = false;
1944 }
1945
1946 static void
1947 emit_jump(struct ntv_context *ctx, nir_jump_instr *jump)
1948 {
1949 switch (jump->type) {
1950 case nir_jump_break:
1951 assert(ctx->loop_break);
1952 branch(ctx, ctx->loop_break);
1953 break;
1954
1955 case nir_jump_continue:
1956 assert(ctx->loop_cont);
1957 branch(ctx, ctx->loop_cont);
1958 break;
1959
1960 default:
1961 unreachable("Unsupported jump type\n");
1962 }
1963 }
1964
1965 static void
1966 emit_deref_var(struct ntv_context *ctx, nir_deref_instr *deref)
1967 {
1968 assert(deref->deref_type == nir_deref_type_var);
1969
1970 struct hash_entry *he = _mesa_hash_table_search(ctx->vars, deref->var);
1971 assert(he);
1972 SpvId result = (SpvId)(intptr_t)he->data;
1973 store_dest_raw(ctx, &deref->dest, result);
1974 }
1975
1976 static void
1977 emit_deref_array(struct ntv_context *ctx, nir_deref_instr *deref)
1978 {
1979 assert(deref->deref_type == nir_deref_type_array);
1980 nir_variable *var = nir_deref_instr_get_variable(deref);
1981
1982 SpvStorageClass storage_class;
1983 switch (var->data.mode) {
1984 case nir_var_shader_in:
1985 storage_class = SpvStorageClassInput;
1986 break;
1987
1988 case nir_var_shader_out:
1989 storage_class = SpvStorageClassOutput;
1990 break;
1991
1992 default:
1993 unreachable("Unsupported nir_variable_mode\n");
1994 }
1995
1996 SpvId index = get_src(ctx, &deref->arr.index);
1997
1998 SpvId ptr_type = spirv_builder_type_pointer(&ctx->builder,
1999 storage_class,
2000 get_glsl_type(ctx, deref->type));
2001
2002 SpvId result = spirv_builder_emit_access_chain(&ctx->builder,
2003 ptr_type,
2004 get_src(ctx, &deref->parent),
2005 &index, 1);
2006 /* uint is a bit of a lie here, it's really just an opaque type */
2007 store_dest(ctx, &deref->dest, result, nir_type_uint);
2008 }
2009
2010 static void
2011 emit_deref(struct ntv_context *ctx, nir_deref_instr *deref)
2012 {
2013 switch (deref->deref_type) {
2014 case nir_deref_type_var:
2015 emit_deref_var(ctx, deref);
2016 break;
2017
2018 case nir_deref_type_array:
2019 emit_deref_array(ctx, deref);
2020 break;
2021
2022 default:
2023 unreachable("unexpected deref_type");
2024 }
2025 }
2026
2027 static void
2028 emit_block(struct ntv_context *ctx, struct nir_block *block)
2029 {
2030 start_block(ctx, block_label(ctx, block));
2031 nir_foreach_instr(instr, block) {
2032 switch (instr->type) {
2033 case nir_instr_type_alu:
2034 emit_alu(ctx, nir_instr_as_alu(instr));
2035 break;
2036 case nir_instr_type_intrinsic:
2037 emit_intrinsic(ctx, nir_instr_as_intrinsic(instr));
2038 break;
2039 case nir_instr_type_load_const:
2040 emit_load_const(ctx, nir_instr_as_load_const(instr));
2041 break;
2042 case nir_instr_type_ssa_undef:
2043 emit_undef(ctx, nir_instr_as_ssa_undef(instr));
2044 break;
2045 case nir_instr_type_tex:
2046 emit_tex(ctx, nir_instr_as_tex(instr));
2047 break;
2048 case nir_instr_type_phi:
2049 unreachable("nir_instr_type_phi not supported");
2050 break;
2051 case nir_instr_type_jump:
2052 emit_jump(ctx, nir_instr_as_jump(instr));
2053 break;
2054 case nir_instr_type_call:
2055 unreachable("nir_instr_type_call not supported");
2056 break;
2057 case nir_instr_type_parallel_copy:
2058 unreachable("nir_instr_type_parallel_copy not supported");
2059 break;
2060 case nir_instr_type_deref:
2061 emit_deref(ctx, nir_instr_as_deref(instr));
2062 break;
2063 }
2064 }
2065 }
2066
2067 static void
2068 emit_cf_list(struct ntv_context *ctx, struct exec_list *list);
2069
2070 static SpvId
2071 get_src_bool(struct ntv_context *ctx, nir_src *src)
2072 {
2073 assert(nir_src_bit_size(*src) == 1);
2074 return get_src(ctx, src);
2075 }
2076
2077 static void
2078 emit_if(struct ntv_context *ctx, nir_if *if_stmt)
2079 {
2080 SpvId condition = get_src_bool(ctx, &if_stmt->condition);
2081
2082 SpvId header_id = spirv_builder_new_id(&ctx->builder);
2083 SpvId then_id = block_label(ctx, nir_if_first_then_block(if_stmt));
2084 SpvId endif_id = spirv_builder_new_id(&ctx->builder);
2085 SpvId else_id = endif_id;
2086
2087 bool has_else = !exec_list_is_empty(&if_stmt->else_list);
2088 if (has_else) {
2089 assert(nir_if_first_else_block(if_stmt)->index < ctx->num_blocks);
2090 else_id = block_label(ctx, nir_if_first_else_block(if_stmt));
2091 }
2092
2093 /* create a header-block */
2094 start_block(ctx, header_id);
2095 spirv_builder_emit_selection_merge(&ctx->builder, endif_id,
2096 SpvSelectionControlMaskNone);
2097 branch_conditional(ctx, condition, then_id, else_id);
2098
2099 emit_cf_list(ctx, &if_stmt->then_list);
2100
2101 if (has_else) {
2102 if (ctx->block_started)
2103 branch(ctx, endif_id);
2104
2105 emit_cf_list(ctx, &if_stmt->else_list);
2106 }
2107
2108 start_block(ctx, endif_id);
2109 }
2110
2111 static void
2112 emit_loop(struct ntv_context *ctx, nir_loop *loop)
2113 {
2114 SpvId header_id = spirv_builder_new_id(&ctx->builder);
2115 SpvId begin_id = block_label(ctx, nir_loop_first_block(loop));
2116 SpvId break_id = spirv_builder_new_id(&ctx->builder);
2117 SpvId cont_id = spirv_builder_new_id(&ctx->builder);
2118
2119 /* create a header-block */
2120 start_block(ctx, header_id);
2121 spirv_builder_loop_merge(&ctx->builder, break_id, cont_id, SpvLoopControlMaskNone);
2122 branch(ctx, begin_id);
2123
2124 SpvId save_break = ctx->loop_break;
2125 SpvId save_cont = ctx->loop_cont;
2126 ctx->loop_break = break_id;
2127 ctx->loop_cont = cont_id;
2128
2129 emit_cf_list(ctx, &loop->body);
2130
2131 ctx->loop_break = save_break;
2132 ctx->loop_cont = save_cont;
2133
2134 /* loop->body may have already ended our block */
2135 if (ctx->block_started)
2136 branch(ctx, cont_id);
2137 start_block(ctx, cont_id);
2138 branch(ctx, header_id);
2139
2140 start_block(ctx, break_id);
2141 }
2142
2143 static void
2144 emit_cf_list(struct ntv_context *ctx, struct exec_list *list)
2145 {
2146 foreach_list_typed(nir_cf_node, node, node, list) {
2147 switch (node->type) {
2148 case nir_cf_node_block:
2149 emit_block(ctx, nir_cf_node_as_block(node));
2150 break;
2151
2152 case nir_cf_node_if:
2153 emit_if(ctx, nir_cf_node_as_if(node));
2154 break;
2155
2156 case nir_cf_node_loop:
2157 emit_loop(ctx, nir_cf_node_as_loop(node));
2158 break;
2159
2160 case nir_cf_node_function:
2161 unreachable("nir_cf_node_function not supported");
2162 break;
2163 }
2164 }
2165 }
2166
2167 struct spirv_shader *
2168 nir_to_spirv(struct nir_shader *s, const struct pipe_stream_output_info *so_info, struct pipe_stream_output_info *local_so_info)
2169 {
2170 struct spirv_shader *ret = NULL;
2171
2172 struct ntv_context ctx = {};
2173 ctx.mem_ctx = ralloc_context(NULL);
2174
2175 switch (s->info.stage) {
2176 case MESA_SHADER_VERTEX:
2177 case MESA_SHADER_FRAGMENT:
2178 case MESA_SHADER_COMPUTE:
2179 spirv_builder_emit_cap(&ctx.builder, SpvCapabilityShader);
2180 break;
2181
2182 case MESA_SHADER_TESS_CTRL:
2183 case MESA_SHADER_TESS_EVAL:
2184 spirv_builder_emit_cap(&ctx.builder, SpvCapabilityTessellation);
2185 break;
2186
2187 case MESA_SHADER_GEOMETRY:
2188 spirv_builder_emit_cap(&ctx.builder, SpvCapabilityGeometry);
2189 break;
2190
2191 default:
2192 unreachable("invalid stage");
2193 }
2194
2195 // TODO: only enable when needed
2196 if (s->info.stage == MESA_SHADER_FRAGMENT) {
2197 spirv_builder_emit_cap(&ctx.builder, SpvCapabilitySampled1D);
2198 spirv_builder_emit_cap(&ctx.builder, SpvCapabilityImageQuery);
2199 spirv_builder_emit_cap(&ctx.builder, SpvCapabilityDerivativeControl);
2200 }
2201
2202 ctx.stage = s->info.stage;
2203 ctx.GLSL_std_450 = spirv_builder_import(&ctx.builder, "GLSL.std.450");
2204 spirv_builder_emit_source(&ctx.builder, SpvSourceLanguageGLSL, 450);
2205
2206 spirv_builder_emit_mem_model(&ctx.builder, SpvAddressingModelLogical,
2207 SpvMemoryModelGLSL450);
2208
2209 SpvExecutionModel exec_model;
2210 switch (s->info.stage) {
2211 case MESA_SHADER_VERTEX:
2212 exec_model = SpvExecutionModelVertex;
2213 break;
2214 case MESA_SHADER_TESS_CTRL:
2215 exec_model = SpvExecutionModelTessellationControl;
2216 break;
2217 case MESA_SHADER_TESS_EVAL:
2218 exec_model = SpvExecutionModelTessellationEvaluation;
2219 break;
2220 case MESA_SHADER_GEOMETRY:
2221 exec_model = SpvExecutionModelGeometry;
2222 break;
2223 case MESA_SHADER_FRAGMENT:
2224 exec_model = SpvExecutionModelFragment;
2225 break;
2226 case MESA_SHADER_COMPUTE:
2227 exec_model = SpvExecutionModelGLCompute;
2228 break;
2229 default:
2230 unreachable("invalid stage");
2231 }
2232
2233 SpvId type_void = spirv_builder_type_void(&ctx.builder);
2234 SpvId type_main = spirv_builder_type_function(&ctx.builder, type_void,
2235 NULL, 0);
2236 SpvId entry_point = spirv_builder_new_id(&ctx.builder);
2237 spirv_builder_emit_name(&ctx.builder, entry_point, "main");
2238
2239 ctx.vars = _mesa_hash_table_create(ctx.mem_ctx, _mesa_hash_pointer,
2240 _mesa_key_pointer_equal);
2241
2242 ctx.so_outputs = _mesa_hash_table_create(ctx.mem_ctx, _mesa_hash_u32,
2243 _mesa_key_u32_equal);
2244
2245 nir_foreach_variable(var, &s->inputs)
2246 emit_input(&ctx, var);
2247
2248 nir_foreach_variable(var, &s->outputs)
2249 emit_output(&ctx, var);
2250
2251 if (so_info)
2252 emit_so_info(&ctx, util_last_bit64(s->info.outputs_written), so_info, local_so_info);
2253 nir_foreach_variable(var, &s->uniforms)
2254 emit_uniform(&ctx, var);
2255
2256 if (s->info.stage == MESA_SHADER_FRAGMENT) {
2257 spirv_builder_emit_exec_mode(&ctx.builder, entry_point,
2258 SpvExecutionModeOriginUpperLeft);
2259 if (s->info.outputs_written & BITFIELD64_BIT(FRAG_RESULT_DEPTH))
2260 spirv_builder_emit_exec_mode(&ctx.builder, entry_point,
2261 SpvExecutionModeDepthReplacing);
2262 }
2263
2264 if (so_info && so_info->num_outputs) {
2265 spirv_builder_emit_cap(&ctx.builder, SpvCapabilityTransformFeedback);
2266 spirv_builder_emit_exec_mode(&ctx.builder, entry_point,
2267 SpvExecutionModeXfb);
2268 }
2269
2270 spirv_builder_function(&ctx.builder, entry_point, type_void,
2271 SpvFunctionControlMaskNone,
2272 type_main);
2273
2274 nir_function_impl *entry = nir_shader_get_entrypoint(s);
2275 nir_metadata_require(entry, nir_metadata_block_index);
2276
2277 ctx.defs = ralloc_array_size(ctx.mem_ctx,
2278 sizeof(SpvId), entry->ssa_alloc);
2279 if (!ctx.defs)
2280 goto fail;
2281 ctx.num_defs = entry->ssa_alloc;
2282
2283 nir_index_local_regs(entry);
2284 ctx.regs = ralloc_array_size(ctx.mem_ctx,
2285 sizeof(SpvId), entry->reg_alloc);
2286 if (!ctx.regs)
2287 goto fail;
2288 ctx.num_regs = entry->reg_alloc;
2289
2290 SpvId *block_ids = ralloc_array_size(ctx.mem_ctx,
2291 sizeof(SpvId), entry->num_blocks);
2292 if (!block_ids)
2293 goto fail;
2294
2295 for (int i = 0; i < entry->num_blocks; ++i)
2296 block_ids[i] = spirv_builder_new_id(&ctx.builder);
2297
2298 ctx.block_ids = block_ids;
2299 ctx.num_blocks = entry->num_blocks;
2300
2301 /* emit a block only for the variable declarations */
2302 start_block(&ctx, spirv_builder_new_id(&ctx.builder));
2303 foreach_list_typed(nir_register, reg, node, &entry->registers) {
2304 SpvId type = get_uvec_type(&ctx, reg->bit_size, reg->num_components);
2305 SpvId pointer_type = spirv_builder_type_pointer(&ctx.builder,
2306 SpvStorageClassFunction,
2307 type);
2308 SpvId var = spirv_builder_emit_var(&ctx.builder, pointer_type,
2309 SpvStorageClassFunction);
2310
2311 ctx.regs[reg->index] = var;
2312 }
2313
2314 emit_cf_list(&ctx, &entry->body);
2315
2316 if (so_info)
2317 emit_so_outputs(&ctx, so_info, local_so_info);
2318
2319 spirv_builder_return(&ctx.builder); // doesn't belong here, but whatevz
2320 spirv_builder_function_end(&ctx.builder);
2321
2322 spirv_builder_emit_entry_point(&ctx.builder, exec_model, entry_point,
2323 "main", ctx.entry_ifaces,
2324 ctx.num_entry_ifaces);
2325
2326 size_t num_words = spirv_builder_get_num_words(&ctx.builder);
2327
2328 ret = CALLOC_STRUCT(spirv_shader);
2329 if (!ret)
2330 goto fail;
2331
2332 ret->words = MALLOC(sizeof(uint32_t) * num_words);
2333 if (!ret->words)
2334 goto fail;
2335
2336 ret->num_words = spirv_builder_get_words(&ctx.builder, ret->words, num_words);
2337 assert(ret->num_words == num_words);
2338
2339 ralloc_free(ctx.mem_ctx);
2340
2341 return ret;
2342
2343 fail:
2344 ralloc_free(ctx.mem_ctx);
2345
2346 if (ret)
2347 spirv_shader_delete(ret);
2348
2349 return NULL;
2350 }
2351
2352 void
2353 spirv_shader_delete(struct spirv_shader *s)
2354 {
2355 FREE(s->words);
2356 FREE(s);
2357 }