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zink: enable tgsi texcoord pipe cap
[mesa.git] / src / gallium / drivers / zink / nir_to_spirv / nir_to_spirv.c
1 /*
2 * Copyright 2018 Collabora Ltd.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 */
23
24 #include "nir_to_spirv.h"
25 #include "spirv_builder.h"
26
27 #include "nir.h"
28 #include "pipe/p_state.h"
29 #include "util/u_memory.h"
30 #include "util/hash_table.h"
31
32 /* this consistently maps slots to a zero-indexed value to avoid wasting slots */
33 static unsigned slot_pack_map[] = {
34 /* Position is builtin */
35 [VARYING_SLOT_POS] = UINT_MAX,
36 [VARYING_SLOT_COL0] = 0, /* input/output */
37 [VARYING_SLOT_COL1] = 1, /* input/output */
38 [VARYING_SLOT_FOGC] = 2, /* input/output */
39 /* TEX0-7 are deprecated, so we put them at the end of the range and hope nobody uses them all */
40 [VARYING_SLOT_TEX0] = VARYING_SLOT_VAR0 - 1, /* input/output */
41 [VARYING_SLOT_TEX1] = VARYING_SLOT_VAR0 - 2,
42 [VARYING_SLOT_TEX2] = VARYING_SLOT_VAR0 - 3,
43 [VARYING_SLOT_TEX3] = VARYING_SLOT_VAR0 - 4,
44 [VARYING_SLOT_TEX4] = VARYING_SLOT_VAR0 - 5,
45 [VARYING_SLOT_TEX5] = VARYING_SLOT_VAR0 - 6,
46 [VARYING_SLOT_TEX6] = VARYING_SLOT_VAR0 - 7,
47 [VARYING_SLOT_TEX7] = VARYING_SLOT_VAR0 - 8,
48
49 /* PointSize is builtin */
50 [VARYING_SLOT_PSIZ] = UINT_MAX,
51
52 [VARYING_SLOT_BFC0] = 3, /* output only */
53 [VARYING_SLOT_BFC1] = 4, /* output only */
54 [VARYING_SLOT_EDGE] = 5, /* output only */
55 [VARYING_SLOT_CLIP_VERTEX] = 6, /* output only */
56
57 /* ClipDistance is builtin */
58 [VARYING_SLOT_CLIP_DIST0] = UINT_MAX,
59 [VARYING_SLOT_CLIP_DIST1] = UINT_MAX,
60
61 /* CullDistance is builtin */
62 [VARYING_SLOT_CULL_DIST0] = UINT_MAX, /* input/output */
63 [VARYING_SLOT_CULL_DIST1] = UINT_MAX, /* never actually used */
64
65 /* PrimitiveId is builtin */
66 [VARYING_SLOT_PRIMITIVE_ID] = UINT_MAX,
67
68 /* Layer is builtin */
69 [VARYING_SLOT_LAYER] = UINT_MAX, /* input/output */
70
71 /* ViewportIndex is builtin */
72 [VARYING_SLOT_VIEWPORT] = UINT_MAX, /* input/output */
73
74 /* FrontFacing is builtin */
75 [VARYING_SLOT_FACE] = UINT_MAX,
76
77 /* PointCoord is builtin */
78 [VARYING_SLOT_PNTC] = UINT_MAX, /* input only */
79
80 /* TessLevelOuter is builtin */
81 [VARYING_SLOT_TESS_LEVEL_OUTER] = UINT_MAX,
82 /* TessLevelInner is builtin */
83 [VARYING_SLOT_TESS_LEVEL_INNER] = UINT_MAX,
84
85 [VARYING_SLOT_BOUNDING_BOX0] = 7, /* Only appears as TCS output. */
86 [VARYING_SLOT_BOUNDING_BOX1] = 8, /* Only appears as TCS output. */
87 [VARYING_SLOT_VIEW_INDEX] = 9, /* input/output */
88 [VARYING_SLOT_VIEWPORT_MASK] = 10, /* output only */
89 };
90 #define NTV_MIN_RESERVED_SLOTS 11
91
92 struct ntv_context {
93 struct spirv_builder builder;
94
95 SpvId GLSL_std_450;
96
97 gl_shader_stage stage;
98
99 SpvId ubos[128];
100 size_t num_ubos;
101 SpvId image_types[PIPE_MAX_SAMPLERS];
102 SpvId samplers[PIPE_MAX_SAMPLERS];
103 unsigned samplers_used : PIPE_MAX_SAMPLERS;
104 SpvId entry_ifaces[PIPE_MAX_SHADER_INPUTS * 4 + PIPE_MAX_SHADER_OUTPUTS * 4];
105 size_t num_entry_ifaces;
106
107 SpvId *defs;
108 size_t num_defs;
109
110 SpvId *regs;
111 size_t num_regs;
112
113 struct hash_table *vars; /* nir_variable -> SpvId */
114 struct hash_table *so_outputs; /* pipe_stream_output -> SpvId */
115 unsigned outputs[VARYING_SLOT_MAX];
116 const struct glsl_type *so_output_gl_types[VARYING_SLOT_MAX];
117 SpvId so_output_types[VARYING_SLOT_MAX];
118
119 const SpvId *block_ids;
120 size_t num_blocks;
121 bool block_started;
122 SpvId loop_break, loop_cont;
123
124 SpvId front_face_var, instance_id_var, vertex_id_var;
125 #ifndef NDEBUG
126 bool seen_texcoord[8]; //whether we've seen a VARYING_SLOT_TEX[n] this pass
127 #endif
128 };
129
130 static SpvId
131 get_fvec_constant(struct ntv_context *ctx, unsigned bit_size,
132 unsigned num_components, float value);
133
134 static SpvId
135 get_uvec_constant(struct ntv_context *ctx, unsigned bit_size,
136 unsigned num_components, uint32_t value);
137
138 static SpvId
139 get_ivec_constant(struct ntv_context *ctx, unsigned bit_size,
140 unsigned num_components, int32_t value);
141
142 static SpvId
143 emit_unop(struct ntv_context *ctx, SpvOp op, SpvId type, SpvId src);
144
145 static SpvId
146 emit_binop(struct ntv_context *ctx, SpvOp op, SpvId type,
147 SpvId src0, SpvId src1);
148
149 static SpvId
150 emit_triop(struct ntv_context *ctx, SpvOp op, SpvId type,
151 SpvId src0, SpvId src1, SpvId src2);
152
153 static SpvId
154 get_bvec_type(struct ntv_context *ctx, int num_components)
155 {
156 SpvId bool_type = spirv_builder_type_bool(&ctx->builder);
157 if (num_components > 1)
158 return spirv_builder_type_vector(&ctx->builder, bool_type,
159 num_components);
160
161 assert(num_components == 1);
162 return bool_type;
163 }
164
165 static SpvId
166 block_label(struct ntv_context *ctx, nir_block *block)
167 {
168 assert(block->index < ctx->num_blocks);
169 return ctx->block_ids[block->index];
170 }
171
172 static SpvId
173 emit_float_const(struct ntv_context *ctx, int bit_size, float value)
174 {
175 assert(bit_size == 32);
176 return spirv_builder_const_float(&ctx->builder, bit_size, value);
177 }
178
179 static SpvId
180 emit_uint_const(struct ntv_context *ctx, int bit_size, uint32_t value)
181 {
182 assert(bit_size == 32);
183 return spirv_builder_const_uint(&ctx->builder, bit_size, value);
184 }
185
186 static SpvId
187 emit_int_const(struct ntv_context *ctx, int bit_size, int32_t value)
188 {
189 assert(bit_size == 32);
190 return spirv_builder_const_int(&ctx->builder, bit_size, value);
191 }
192
193 static SpvId
194 get_fvec_type(struct ntv_context *ctx, unsigned bit_size, unsigned num_components)
195 {
196 assert(bit_size == 32); // only 32-bit floats supported so far
197
198 SpvId float_type = spirv_builder_type_float(&ctx->builder, bit_size);
199 if (num_components > 1)
200 return spirv_builder_type_vector(&ctx->builder, float_type,
201 num_components);
202
203 assert(num_components == 1);
204 return float_type;
205 }
206
207 static SpvId
208 get_ivec_type(struct ntv_context *ctx, unsigned bit_size, unsigned num_components)
209 {
210 assert(bit_size == 32); // only 32-bit ints supported so far
211
212 SpvId int_type = spirv_builder_type_int(&ctx->builder, bit_size);
213 if (num_components > 1)
214 return spirv_builder_type_vector(&ctx->builder, int_type,
215 num_components);
216
217 assert(num_components == 1);
218 return int_type;
219 }
220
221 static SpvId
222 get_uvec_type(struct ntv_context *ctx, unsigned bit_size, unsigned num_components)
223 {
224 assert(bit_size == 32); // only 32-bit uints supported so far
225
226 SpvId uint_type = spirv_builder_type_uint(&ctx->builder, bit_size);
227 if (num_components > 1)
228 return spirv_builder_type_vector(&ctx->builder, uint_type,
229 num_components);
230
231 assert(num_components == 1);
232 return uint_type;
233 }
234
235 static SpvId
236 get_dest_uvec_type(struct ntv_context *ctx, nir_dest *dest)
237 {
238 unsigned bit_size = MAX2(nir_dest_bit_size(*dest), 32);
239 return get_uvec_type(ctx, bit_size, nir_dest_num_components(*dest));
240 }
241
242 static SpvId
243 get_glsl_basetype(struct ntv_context *ctx, enum glsl_base_type type)
244 {
245 switch (type) {
246 case GLSL_TYPE_BOOL:
247 return spirv_builder_type_bool(&ctx->builder);
248
249 case GLSL_TYPE_FLOAT:
250 return spirv_builder_type_float(&ctx->builder, 32);
251
252 case GLSL_TYPE_INT:
253 return spirv_builder_type_int(&ctx->builder, 32);
254
255 case GLSL_TYPE_UINT:
256 return spirv_builder_type_uint(&ctx->builder, 32);
257 /* TODO: handle more types */
258
259 default:
260 unreachable("unknown GLSL type");
261 }
262 }
263
264 static SpvId
265 get_glsl_type(struct ntv_context *ctx, const struct glsl_type *type)
266 {
267 assert(type);
268 if (glsl_type_is_scalar(type))
269 return get_glsl_basetype(ctx, glsl_get_base_type(type));
270
271 if (glsl_type_is_vector(type))
272 return spirv_builder_type_vector(&ctx->builder,
273 get_glsl_basetype(ctx, glsl_get_base_type(type)),
274 glsl_get_vector_elements(type));
275
276 if (glsl_type_is_array(type)) {
277 SpvId ret = spirv_builder_type_array(&ctx->builder,
278 get_glsl_type(ctx, glsl_get_array_element(type)),
279 emit_uint_const(ctx, 32, glsl_get_length(type)));
280 uint32_t stride = glsl_get_explicit_stride(type);
281 if (stride)
282 spirv_builder_emit_array_stride(&ctx->builder, ret, stride);
283 return ret;
284 }
285
286
287 unreachable("we shouldn't get here, I think...");
288 }
289
290 static inline unsigned
291 handle_slot(struct ntv_context *ctx, unsigned slot)
292 {
293 unsigned orig = slot;
294 if (slot < VARYING_SLOT_VAR0) {
295 #ifndef NDEBUG
296 if (slot >= VARYING_SLOT_TEX0 && slot <= VARYING_SLOT_TEX7)
297 ctx->seen_texcoord[slot - VARYING_SLOT_TEX0] = true;
298 #endif
299 slot = slot_pack_map[slot];
300 if (slot == UINT_MAX)
301 debug_printf("unhandled varying slot: %s\n", gl_varying_slot_name(orig));
302 } else {
303 slot -= VARYING_SLOT_VAR0 - NTV_MIN_RESERVED_SLOTS;
304 assert(slot <= VARYING_SLOT_VAR0 - 8 ||
305 !ctx->seen_texcoord[VARYING_SLOT_VAR0 - slot - 1]);
306
307 }
308 assert(slot < VARYING_SLOT_VAR0);
309 return slot;
310 }
311
312 #define HANDLE_EMIT_BUILTIN(SLOT, BUILTIN) \
313 case VARYING_SLOT_##SLOT: \
314 spirv_builder_emit_builtin(&ctx->builder, var_id, SpvBuiltIn##BUILTIN); \
315 break
316
317
318 static void
319 emit_input(struct ntv_context *ctx, struct nir_variable *var)
320 {
321 SpvId var_type = get_glsl_type(ctx, var->type);
322 SpvId pointer_type = spirv_builder_type_pointer(&ctx->builder,
323 SpvStorageClassInput,
324 var_type);
325 SpvId var_id = spirv_builder_emit_var(&ctx->builder, pointer_type,
326 SpvStorageClassInput);
327
328 if (var->name)
329 spirv_builder_emit_name(&ctx->builder, var_id, var->name);
330
331 if (ctx->stage == MESA_SHADER_FRAGMENT) {
332 unsigned slot = var->data.location;
333 switch (slot) {
334 HANDLE_EMIT_BUILTIN(POS, FragCoord);
335 HANDLE_EMIT_BUILTIN(PNTC, PointCoord);
336 HANDLE_EMIT_BUILTIN(LAYER, Layer);
337 HANDLE_EMIT_BUILTIN(PRIMITIVE_ID, PrimitiveId);
338 HANDLE_EMIT_BUILTIN(CLIP_DIST0, ClipDistance);
339 HANDLE_EMIT_BUILTIN(CULL_DIST0, CullDistance);
340 HANDLE_EMIT_BUILTIN(VIEWPORT, ViewportIndex);
341 HANDLE_EMIT_BUILTIN(FACE, FrontFacing);
342
343 default:
344 slot = handle_slot(ctx, slot);
345 spirv_builder_emit_location(&ctx->builder, var_id, slot);
346 }
347 } else {
348 spirv_builder_emit_location(&ctx->builder, var_id,
349 var->data.driver_location);
350 }
351
352 if (var->data.location_frac)
353 spirv_builder_emit_component(&ctx->builder, var_id,
354 var->data.location_frac);
355
356 if (var->data.interpolation == INTERP_MODE_FLAT)
357 spirv_builder_emit_decoration(&ctx->builder, var_id, SpvDecorationFlat);
358
359 _mesa_hash_table_insert(ctx->vars, var, (void *)(intptr_t)var_id);
360
361 assert(ctx->num_entry_ifaces < ARRAY_SIZE(ctx->entry_ifaces));
362 ctx->entry_ifaces[ctx->num_entry_ifaces++] = var_id;
363 }
364
365 static void
366 emit_output(struct ntv_context *ctx, struct nir_variable *var)
367 {
368 SpvId var_type = get_glsl_type(ctx, var->type);
369 SpvId pointer_type = spirv_builder_type_pointer(&ctx->builder,
370 SpvStorageClassOutput,
371 var_type);
372 SpvId var_id = spirv_builder_emit_var(&ctx->builder, pointer_type,
373 SpvStorageClassOutput);
374 if (var->name)
375 spirv_builder_emit_name(&ctx->builder, var_id, var->name);
376
377
378 if (ctx->stage == MESA_SHADER_VERTEX) {
379 unsigned slot = var->data.location;
380 switch (slot) {
381 HANDLE_EMIT_BUILTIN(POS, Position);
382 HANDLE_EMIT_BUILTIN(PSIZ, PointSize);
383 HANDLE_EMIT_BUILTIN(LAYER, Layer);
384 HANDLE_EMIT_BUILTIN(PRIMITIVE_ID, PrimitiveId);
385 HANDLE_EMIT_BUILTIN(CULL_DIST0, CullDistance);
386 HANDLE_EMIT_BUILTIN(VIEWPORT, ViewportIndex);
387 HANDLE_EMIT_BUILTIN(TESS_LEVEL_OUTER, TessLevelOuter);
388 HANDLE_EMIT_BUILTIN(TESS_LEVEL_INNER, TessLevelInner);
389
390 case VARYING_SLOT_CLIP_DIST0:
391 assert(glsl_type_is_array(var->type));
392 spirv_builder_emit_builtin(&ctx->builder, var_id, SpvBuiltInClipDistance);
393 /* this can be as large as 2x vec4, which requires 2 slots */
394 ctx->outputs[VARYING_SLOT_CLIP_DIST1] = var_id;
395 ctx->so_output_gl_types[VARYING_SLOT_CLIP_DIST1] = var->type;
396 ctx->so_output_types[VARYING_SLOT_CLIP_DIST1] = var_type;
397 break;
398
399 default:
400 slot = handle_slot(ctx, slot);
401 spirv_builder_emit_location(&ctx->builder, var_id, slot);
402 }
403 ctx->outputs[var->data.location] = var_id;
404 ctx->so_output_gl_types[var->data.location] = var->type;
405 ctx->so_output_types[var->data.location] = var_type;
406 } else if (ctx->stage == MESA_SHADER_FRAGMENT) {
407 if (var->data.location >= FRAG_RESULT_DATA0) {
408 spirv_builder_emit_location(&ctx->builder, var_id,
409 var->data.location - FRAG_RESULT_DATA0);
410 spirv_builder_emit_index(&ctx->builder, var_id, var->data.index);
411 } else {
412 switch (var->data.location) {
413 case FRAG_RESULT_COLOR:
414 unreachable("gl_FragColor should be lowered by now");
415
416 case FRAG_RESULT_DEPTH:
417 spirv_builder_emit_builtin(&ctx->builder, var_id, SpvBuiltInFragDepth);
418 break;
419
420 default:
421 spirv_builder_emit_location(&ctx->builder, var_id,
422 var->data.driver_location);
423 spirv_builder_emit_index(&ctx->builder, var_id, var->data.index);
424 }
425 }
426 }
427
428 if (var->data.location_frac)
429 spirv_builder_emit_component(&ctx->builder, var_id,
430 var->data.location_frac);
431
432 switch (var->data.interpolation) {
433 case INTERP_MODE_NONE:
434 case INTERP_MODE_SMOOTH: /* XXX spirv doesn't seem to have anything for this */
435 break;
436 case INTERP_MODE_FLAT:
437 spirv_builder_emit_decoration(&ctx->builder, var_id, SpvDecorationFlat);
438 break;
439 case INTERP_MODE_EXPLICIT:
440 spirv_builder_emit_decoration(&ctx->builder, var_id, SpvDecorationExplicitInterpAMD);
441 break;
442 case INTERP_MODE_NOPERSPECTIVE:
443 spirv_builder_emit_decoration(&ctx->builder, var_id, SpvDecorationNoPerspective);
444 break;
445 default:
446 unreachable("unknown interpolation value");
447 }
448
449 _mesa_hash_table_insert(ctx->vars, var, (void *)(intptr_t)var_id);
450
451 assert(ctx->num_entry_ifaces < ARRAY_SIZE(ctx->entry_ifaces));
452 ctx->entry_ifaces[ctx->num_entry_ifaces++] = var_id;
453 }
454
455 static SpvDim
456 type_to_dim(enum glsl_sampler_dim gdim, bool *is_ms)
457 {
458 *is_ms = false;
459 switch (gdim) {
460 case GLSL_SAMPLER_DIM_1D:
461 return SpvDim1D;
462 case GLSL_SAMPLER_DIM_2D:
463 return SpvDim2D;
464 case GLSL_SAMPLER_DIM_3D:
465 return SpvDim3D;
466 case GLSL_SAMPLER_DIM_CUBE:
467 return SpvDimCube;
468 case GLSL_SAMPLER_DIM_RECT:
469 return SpvDim2D;
470 case GLSL_SAMPLER_DIM_BUF:
471 return SpvDimBuffer;
472 case GLSL_SAMPLER_DIM_EXTERNAL:
473 return SpvDim2D; /* seems dodgy... */
474 case GLSL_SAMPLER_DIM_MS:
475 *is_ms = true;
476 return SpvDim2D;
477 default:
478 fprintf(stderr, "unknown sampler type %d\n", gdim);
479 break;
480 }
481 return SpvDim2D;
482 }
483
484 uint32_t
485 zink_binding(gl_shader_stage stage, VkDescriptorType type, int index)
486 {
487 if (stage == MESA_SHADER_NONE ||
488 stage >= MESA_SHADER_COMPUTE) {
489 unreachable("not supported");
490 } else {
491 uint32_t stage_offset = (uint32_t)stage * (PIPE_MAX_CONSTANT_BUFFERS +
492 PIPE_MAX_SHADER_SAMPLER_VIEWS);
493
494 switch (type) {
495 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER:
496 assert(index < PIPE_MAX_CONSTANT_BUFFERS);
497 return stage_offset + index;
498
499 case VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER:
500 assert(index < PIPE_MAX_SHADER_SAMPLER_VIEWS);
501 return stage_offset + PIPE_MAX_CONSTANT_BUFFERS + index;
502
503 default:
504 unreachable("unexpected type");
505 }
506 }
507 }
508
509 static void
510 emit_sampler(struct ntv_context *ctx, struct nir_variable *var)
511 {
512 const struct glsl_type *type = glsl_without_array(var->type);
513
514 bool is_ms;
515 SpvDim dimension = type_to_dim(glsl_get_sampler_dim(type), &is_ms);
516
517 SpvId result_type = get_glsl_basetype(ctx, glsl_get_sampler_result_type(type));
518 SpvId image_type = spirv_builder_type_image(&ctx->builder, result_type,
519 dimension, false,
520 glsl_sampler_type_is_array(type),
521 is_ms, 1,
522 SpvImageFormatUnknown);
523
524 SpvId sampled_type = spirv_builder_type_sampled_image(&ctx->builder,
525 image_type);
526 SpvId pointer_type = spirv_builder_type_pointer(&ctx->builder,
527 SpvStorageClassUniformConstant,
528 sampled_type);
529
530 if (glsl_type_is_array(var->type)) {
531 for (int i = 0; i < glsl_get_length(var->type); ++i) {
532 SpvId var_id = spirv_builder_emit_var(&ctx->builder, pointer_type,
533 SpvStorageClassUniformConstant);
534
535 if (var->name) {
536 char element_name[100];
537 snprintf(element_name, sizeof(element_name), "%s_%d", var->name, i);
538 spirv_builder_emit_name(&ctx->builder, var_id, var->name);
539 }
540
541 int index = var->data.binding + i;
542 assert(!(ctx->samplers_used & (1 << index)));
543 assert(!ctx->image_types[index]);
544 ctx->image_types[index] = image_type;
545 ctx->samplers[index] = var_id;
546 ctx->samplers_used |= 1 << index;
547
548 spirv_builder_emit_descriptor_set(&ctx->builder, var_id,
549 var->data.descriptor_set);
550 int binding = zink_binding(ctx->stage,
551 VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER,
552 var->data.binding + i);
553 spirv_builder_emit_binding(&ctx->builder, var_id, binding);
554 }
555 } else {
556 SpvId var_id = spirv_builder_emit_var(&ctx->builder, pointer_type,
557 SpvStorageClassUniformConstant);
558
559 if (var->name)
560 spirv_builder_emit_name(&ctx->builder, var_id, var->name);
561
562 int index = var->data.binding;
563 assert(!(ctx->samplers_used & (1 << index)));
564 assert(!ctx->image_types[index]);
565 ctx->image_types[index] = image_type;
566 ctx->samplers[index] = var_id;
567 ctx->samplers_used |= 1 << index;
568
569 spirv_builder_emit_descriptor_set(&ctx->builder, var_id,
570 var->data.descriptor_set);
571 int binding = zink_binding(ctx->stage,
572 VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER,
573 var->data.binding);
574 spirv_builder_emit_binding(&ctx->builder, var_id, binding);
575 }
576 }
577
578 static void
579 emit_ubo(struct ntv_context *ctx, struct nir_variable *var)
580 {
581 uint32_t size = glsl_count_attribute_slots(var->type, false);
582 SpvId vec4_type = get_uvec_type(ctx, 32, 4);
583 SpvId array_length = emit_uint_const(ctx, 32, size);
584 SpvId array_type = spirv_builder_type_array(&ctx->builder, vec4_type,
585 array_length);
586 spirv_builder_emit_array_stride(&ctx->builder, array_type, 16);
587
588 // wrap UBO-array in a struct
589 SpvId struct_type = spirv_builder_type_struct(&ctx->builder, &array_type, 1);
590 if (var->name) {
591 char struct_name[100];
592 snprintf(struct_name, sizeof(struct_name), "struct_%s", var->name);
593 spirv_builder_emit_name(&ctx->builder, struct_type, struct_name);
594 }
595
596 spirv_builder_emit_decoration(&ctx->builder, struct_type,
597 SpvDecorationBlock);
598 spirv_builder_emit_member_offset(&ctx->builder, struct_type, 0, 0);
599
600
601 SpvId pointer_type = spirv_builder_type_pointer(&ctx->builder,
602 SpvStorageClassUniform,
603 struct_type);
604
605 SpvId var_id = spirv_builder_emit_var(&ctx->builder, pointer_type,
606 SpvStorageClassUniform);
607 if (var->name)
608 spirv_builder_emit_name(&ctx->builder, var_id, var->name);
609
610 assert(ctx->num_ubos < ARRAY_SIZE(ctx->ubos));
611 ctx->ubos[ctx->num_ubos++] = var_id;
612
613 spirv_builder_emit_descriptor_set(&ctx->builder, var_id,
614 var->data.descriptor_set);
615 int binding = zink_binding(ctx->stage,
616 VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER,
617 var->data.binding);
618 spirv_builder_emit_binding(&ctx->builder, var_id, binding);
619 }
620
621 static void
622 emit_uniform(struct ntv_context *ctx, struct nir_variable *var)
623 {
624 if (var->data.mode == nir_var_mem_ubo)
625 emit_ubo(ctx, var);
626 else {
627 assert(var->data.mode == nir_var_uniform);
628 if (glsl_type_is_sampler(glsl_without_array(var->type)))
629 emit_sampler(ctx, var);
630 }
631 }
632
633 static SpvId
634 get_src_ssa(struct ntv_context *ctx, const nir_ssa_def *ssa)
635 {
636 assert(ssa->index < ctx->num_defs);
637 assert(ctx->defs[ssa->index] != 0);
638 return ctx->defs[ssa->index];
639 }
640
641 static SpvId
642 get_var_from_reg(struct ntv_context *ctx, nir_register *reg)
643 {
644 assert(reg->index < ctx->num_regs);
645 assert(ctx->regs[reg->index] != 0);
646 return ctx->regs[reg->index];
647 }
648
649 static SpvId
650 get_src_reg(struct ntv_context *ctx, const nir_reg_src *reg)
651 {
652 assert(reg->reg);
653 assert(!reg->indirect);
654 assert(!reg->base_offset);
655
656 SpvId var = get_var_from_reg(ctx, reg->reg);
657 SpvId type = get_uvec_type(ctx, reg->reg->bit_size, reg->reg->num_components);
658 return spirv_builder_emit_load(&ctx->builder, type, var);
659 }
660
661 static SpvId
662 get_src(struct ntv_context *ctx, nir_src *src)
663 {
664 if (src->is_ssa)
665 return get_src_ssa(ctx, src->ssa);
666 else
667 return get_src_reg(ctx, &src->reg);
668 }
669
670 static SpvId
671 get_alu_src_raw(struct ntv_context *ctx, nir_alu_instr *alu, unsigned src)
672 {
673 assert(!alu->src[src].negate);
674 assert(!alu->src[src].abs);
675
676 SpvId def = get_src(ctx, &alu->src[src].src);
677
678 unsigned used_channels = 0;
679 bool need_swizzle = false;
680 for (unsigned i = 0; i < NIR_MAX_VEC_COMPONENTS; i++) {
681 if (!nir_alu_instr_channel_used(alu, src, i))
682 continue;
683
684 used_channels++;
685
686 if (alu->src[src].swizzle[i] != i)
687 need_swizzle = true;
688 }
689 assert(used_channels != 0);
690
691 unsigned live_channels = nir_src_num_components(alu->src[src].src);
692 if (used_channels != live_channels)
693 need_swizzle = true;
694
695 if (!need_swizzle)
696 return def;
697
698 int bit_size = nir_src_bit_size(alu->src[src].src);
699 assert(bit_size == 1 || bit_size == 32);
700
701 SpvId raw_type = bit_size == 1 ? spirv_builder_type_bool(&ctx->builder) :
702 spirv_builder_type_uint(&ctx->builder, bit_size);
703
704 if (used_channels == 1) {
705 uint32_t indices[] = { alu->src[src].swizzle[0] };
706 return spirv_builder_emit_composite_extract(&ctx->builder, raw_type,
707 def, indices,
708 ARRAY_SIZE(indices));
709 } else if (live_channels == 1) {
710 SpvId raw_vec_type = spirv_builder_type_vector(&ctx->builder,
711 raw_type,
712 used_channels);
713
714 SpvId constituents[NIR_MAX_VEC_COMPONENTS] = {0};
715 for (unsigned i = 0; i < used_channels; ++i)
716 constituents[i] = def;
717
718 return spirv_builder_emit_composite_construct(&ctx->builder,
719 raw_vec_type,
720 constituents,
721 used_channels);
722 } else {
723 SpvId raw_vec_type = spirv_builder_type_vector(&ctx->builder,
724 raw_type,
725 used_channels);
726
727 uint32_t components[NIR_MAX_VEC_COMPONENTS] = {0};
728 size_t num_components = 0;
729 for (unsigned i = 0; i < NIR_MAX_VEC_COMPONENTS; i++) {
730 if (!nir_alu_instr_channel_used(alu, src, i))
731 continue;
732
733 components[num_components++] = alu->src[src].swizzle[i];
734 }
735
736 return spirv_builder_emit_vector_shuffle(&ctx->builder, raw_vec_type,
737 def, def, components,
738 num_components);
739 }
740 }
741
742 static void
743 store_ssa_def(struct ntv_context *ctx, nir_ssa_def *ssa, SpvId result)
744 {
745 assert(result != 0);
746 assert(ssa->index < ctx->num_defs);
747 ctx->defs[ssa->index] = result;
748 }
749
750 static SpvId
751 emit_select(struct ntv_context *ctx, SpvId type, SpvId cond,
752 SpvId if_true, SpvId if_false)
753 {
754 return emit_triop(ctx, SpvOpSelect, type, cond, if_true, if_false);
755 }
756
757 static SpvId
758 uvec_to_bvec(struct ntv_context *ctx, SpvId value, unsigned num_components)
759 {
760 SpvId type = get_bvec_type(ctx, num_components);
761 SpvId zero = get_uvec_constant(ctx, 32, num_components, 0);
762 return emit_binop(ctx, SpvOpINotEqual, type, value, zero);
763 }
764
765 static SpvId
766 emit_bitcast(struct ntv_context *ctx, SpvId type, SpvId value)
767 {
768 return emit_unop(ctx, SpvOpBitcast, type, value);
769 }
770
771 static SpvId
772 bitcast_to_uvec(struct ntv_context *ctx, SpvId value, unsigned bit_size,
773 unsigned num_components)
774 {
775 SpvId type = get_uvec_type(ctx, bit_size, num_components);
776 return emit_bitcast(ctx, type, value);
777 }
778
779 static SpvId
780 bitcast_to_ivec(struct ntv_context *ctx, SpvId value, unsigned bit_size,
781 unsigned num_components)
782 {
783 SpvId type = get_ivec_type(ctx, bit_size, num_components);
784 return emit_bitcast(ctx, type, value);
785 }
786
787 static SpvId
788 bitcast_to_fvec(struct ntv_context *ctx, SpvId value, unsigned bit_size,
789 unsigned num_components)
790 {
791 SpvId type = get_fvec_type(ctx, bit_size, num_components);
792 return emit_bitcast(ctx, type, value);
793 }
794
795 static void
796 store_reg_def(struct ntv_context *ctx, nir_reg_dest *reg, SpvId result)
797 {
798 SpvId var = get_var_from_reg(ctx, reg->reg);
799 assert(var);
800 spirv_builder_emit_store(&ctx->builder, var, result);
801 }
802
803 static void
804 store_dest_raw(struct ntv_context *ctx, nir_dest *dest, SpvId result)
805 {
806 if (dest->is_ssa)
807 store_ssa_def(ctx, &dest->ssa, result);
808 else
809 store_reg_def(ctx, &dest->reg, result);
810 }
811
812 static SpvId
813 store_dest(struct ntv_context *ctx, nir_dest *dest, SpvId result, nir_alu_type type)
814 {
815 unsigned num_components = nir_dest_num_components(*dest);
816 unsigned bit_size = nir_dest_bit_size(*dest);
817
818 if (bit_size != 1) {
819 switch (nir_alu_type_get_base_type(type)) {
820 case nir_type_bool:
821 assert("bool should have bit-size 1");
822
823 case nir_type_uint:
824 break; /* nothing to do! */
825
826 case nir_type_int:
827 case nir_type_float:
828 result = bitcast_to_uvec(ctx, result, bit_size, num_components);
829 break;
830
831 default:
832 unreachable("unsupported nir_alu_type");
833 }
834 }
835
836 store_dest_raw(ctx, dest, result);
837 return result;
838 }
839
840 static SpvId
841 emit_unop(struct ntv_context *ctx, SpvOp op, SpvId type, SpvId src)
842 {
843 return spirv_builder_emit_unop(&ctx->builder, op, type, src);
844 }
845
846 /* return the intended xfb output vec type based on base type and vector size */
847 static SpvId
848 get_output_type(struct ntv_context *ctx, unsigned register_index, unsigned num_components)
849 {
850 const struct glsl_type *out_type = ctx->so_output_gl_types[register_index];
851 enum glsl_base_type base_type = glsl_get_base_type(out_type);
852 if (base_type == GLSL_TYPE_ARRAY)
853 base_type = glsl_get_base_type(glsl_without_array(out_type));
854
855 switch (base_type) {
856 case GLSL_TYPE_BOOL:
857 return get_bvec_type(ctx, num_components);
858
859 case GLSL_TYPE_FLOAT:
860 return get_fvec_type(ctx, 32, num_components);
861
862 case GLSL_TYPE_INT:
863 return get_ivec_type(ctx, 32, num_components);
864
865 case GLSL_TYPE_UINT:
866 return get_uvec_type(ctx, 32, num_components);
867
868 default:
869 break;
870 }
871 unreachable("unknown type");
872 return 0;
873 }
874
875 /* for streamout create new outputs, as streamout can be done on individual components,
876 from complete outputs, so we just can't use the created packed outputs */
877 static void
878 emit_so_info(struct ntv_context *ctx, unsigned max_output_location,
879 const struct pipe_stream_output_info *so_info, struct pipe_stream_output_info *local_so_info)
880 {
881 for (unsigned i = 0; i < local_so_info->num_outputs; i++) {
882 struct pipe_stream_output so_output = local_so_info->output[i];
883 SpvId out_type = get_output_type(ctx, so_output.register_index, so_output.num_components);
884 SpvId pointer_type = spirv_builder_type_pointer(&ctx->builder,
885 SpvStorageClassOutput,
886 out_type);
887 SpvId var_id = spirv_builder_emit_var(&ctx->builder, pointer_type,
888 SpvStorageClassOutput);
889 char name[10];
890
891 snprintf(name, 10, "xfb%d", i);
892 spirv_builder_emit_name(&ctx->builder, var_id, name);
893 spirv_builder_emit_offset(&ctx->builder, var_id, (so_output.dst_offset * 4));
894 spirv_builder_emit_xfb_buffer(&ctx->builder, var_id, so_output.output_buffer);
895 spirv_builder_emit_xfb_stride(&ctx->builder, var_id, so_info->stride[so_output.output_buffer] * 4);
896
897 /* output location is incremented by VARYING_SLOT_VAR0 for non-builtins in vtn,
898 * so we need to ensure that the new xfb location slot doesn't conflict with any previously-emitted
899 * outputs.
900 *
901 * if there's no previous outputs that take up user slots (VAR0+) then we can start right after the
902 * glsl builtin reserved slots, otherwise we start just after the adjusted user output slot
903 */
904 uint32_t location = NTV_MIN_RESERVED_SLOTS + i;
905 if (max_output_location >= VARYING_SLOT_VAR0)
906 location = max_output_location - VARYING_SLOT_VAR0 + 1 + i;
907 assert(location < VARYING_SLOT_VAR0);
908 assert(location <= VARYING_SLOT_VAR0 - 8 ||
909 !ctx->seen_texcoord[VARYING_SLOT_VAR0 - location - 1]);
910 spirv_builder_emit_location(&ctx->builder, var_id, location);
911
912 /* note: gl_ClipDistance[4] can the 0-indexed member of VARYING_SLOT_CLIP_DIST1 here,
913 * so this is still the 0 component
914 */
915 if (so_output.start_component)
916 spirv_builder_emit_component(&ctx->builder, var_id, so_output.start_component);
917
918 uint32_t *key = ralloc_size(NULL, sizeof(uint32_t));
919 *key = (uint32_t)so_output.register_index << 2 | so_output.start_component;
920 _mesa_hash_table_insert(ctx->so_outputs, key, (void *)(intptr_t)var_id);
921
922 assert(ctx->num_entry_ifaces < ARRAY_SIZE(ctx->entry_ifaces));
923 ctx->entry_ifaces[ctx->num_entry_ifaces++] = var_id;
924 }
925 }
926
927 static void
928 emit_so_outputs(struct ntv_context *ctx,
929 const struct pipe_stream_output_info *so_info, struct pipe_stream_output_info *local_so_info)
930 {
931 SpvId loaded_outputs[VARYING_SLOT_MAX] = {};
932 for (unsigned i = 0; i < local_so_info->num_outputs; i++) {
933 uint32_t components[NIR_MAX_VEC_COMPONENTS];
934 struct pipe_stream_output so_output = local_so_info->output[i];
935 uint32_t so_key = (uint32_t) so_output.register_index << 2 | so_output.start_component;
936 struct hash_entry *he = _mesa_hash_table_search(ctx->so_outputs, &so_key);
937 assert(he);
938 SpvId so_output_var_id = (SpvId)(intptr_t)he->data;
939
940 SpvId type = get_output_type(ctx, so_output.register_index, so_output.num_components);
941 SpvId output = ctx->outputs[so_output.register_index];
942 SpvId output_type = ctx->so_output_types[so_output.register_index];
943 const struct glsl_type *out_type = ctx->so_output_gl_types[so_output.register_index];
944
945 if (!loaded_outputs[so_output.register_index])
946 loaded_outputs[so_output.register_index] = spirv_builder_emit_load(&ctx->builder, output_type, output);
947 SpvId src = loaded_outputs[so_output.register_index];
948
949 SpvId result;
950
951 for (unsigned c = 0; c < so_output.num_components; c++) {
952 components[c] = so_output.start_component + c;
953 /* this is the second half of a 2 * vec4 array */
954 if (ctx->stage == MESA_SHADER_VERTEX && so_output.register_index == VARYING_SLOT_CLIP_DIST1)
955 components[c] += 4;
956 }
957
958 /* if we're emitting a scalar or the type we're emitting matches the output's original type and we're
959 * emitting the same number of components, then we can skip any sort of conversion here
960 */
961 if (glsl_type_is_scalar(out_type) || (type == output_type && glsl_get_length(out_type) == so_output.num_components))
962 result = src;
963 else {
964 /* OpCompositeExtract can only extract scalars for our use here */
965 if (so_output.num_components == 1) {
966 result = spirv_builder_emit_composite_extract(&ctx->builder, type, src, components, so_output.num_components);
967 } else if (glsl_type_is_vector(out_type)) {
968 /* OpVectorShuffle can select vector members into a differently-sized vector */
969 result = spirv_builder_emit_vector_shuffle(&ctx->builder, type,
970 src, src,
971 components, so_output.num_components);
972 result = emit_unop(ctx, SpvOpBitcast, type, result);
973 } else {
974 /* for arrays, we need to manually extract each desired member
975 * and re-pack them into the desired output type
976 */
977 for (unsigned c = 0; c < so_output.num_components; c++) {
978 uint32_t member[] = { so_output.start_component + c };
979 SpvId base_type = get_glsl_type(ctx, glsl_without_array(out_type));
980
981 if (ctx->stage == MESA_SHADER_VERTEX && so_output.register_index == VARYING_SLOT_CLIP_DIST1)
982 member[0] += 4;
983 components[c] = spirv_builder_emit_composite_extract(&ctx->builder, base_type, src, member, 1);
984 }
985 result = spirv_builder_emit_composite_construct(&ctx->builder, type, components, so_output.num_components);
986 }
987 }
988
989 spirv_builder_emit_store(&ctx->builder, so_output_var_id, result);
990 }
991 }
992
993 static SpvId
994 emit_binop(struct ntv_context *ctx, SpvOp op, SpvId type,
995 SpvId src0, SpvId src1)
996 {
997 return spirv_builder_emit_binop(&ctx->builder, op, type, src0, src1);
998 }
999
1000 static SpvId
1001 emit_triop(struct ntv_context *ctx, SpvOp op, SpvId type,
1002 SpvId src0, SpvId src1, SpvId src2)
1003 {
1004 return spirv_builder_emit_triop(&ctx->builder, op, type, src0, src1, src2);
1005 }
1006
1007 static SpvId
1008 emit_builtin_unop(struct ntv_context *ctx, enum GLSLstd450 op, SpvId type,
1009 SpvId src)
1010 {
1011 SpvId args[] = { src };
1012 return spirv_builder_emit_ext_inst(&ctx->builder, type, ctx->GLSL_std_450,
1013 op, args, ARRAY_SIZE(args));
1014 }
1015
1016 static SpvId
1017 emit_builtin_binop(struct ntv_context *ctx, enum GLSLstd450 op, SpvId type,
1018 SpvId src0, SpvId src1)
1019 {
1020 SpvId args[] = { src0, src1 };
1021 return spirv_builder_emit_ext_inst(&ctx->builder, type, ctx->GLSL_std_450,
1022 op, args, ARRAY_SIZE(args));
1023 }
1024
1025 static SpvId
1026 emit_builtin_triop(struct ntv_context *ctx, enum GLSLstd450 op, SpvId type,
1027 SpvId src0, SpvId src1, SpvId src2)
1028 {
1029 SpvId args[] = { src0, src1, src2 };
1030 return spirv_builder_emit_ext_inst(&ctx->builder, type, ctx->GLSL_std_450,
1031 op, args, ARRAY_SIZE(args));
1032 }
1033
1034 static SpvId
1035 get_fvec_constant(struct ntv_context *ctx, unsigned bit_size,
1036 unsigned num_components, float value)
1037 {
1038 assert(bit_size == 32);
1039
1040 SpvId result = emit_float_const(ctx, bit_size, value);
1041 if (num_components == 1)
1042 return result;
1043
1044 assert(num_components > 1);
1045 SpvId components[num_components];
1046 for (int i = 0; i < num_components; i++)
1047 components[i] = result;
1048
1049 SpvId type = get_fvec_type(ctx, bit_size, num_components);
1050 return spirv_builder_const_composite(&ctx->builder, type, components,
1051 num_components);
1052 }
1053
1054 static SpvId
1055 get_uvec_constant(struct ntv_context *ctx, unsigned bit_size,
1056 unsigned num_components, uint32_t value)
1057 {
1058 assert(bit_size == 32);
1059
1060 SpvId result = emit_uint_const(ctx, bit_size, value);
1061 if (num_components == 1)
1062 return result;
1063
1064 assert(num_components > 1);
1065 SpvId components[num_components];
1066 for (int i = 0; i < num_components; i++)
1067 components[i] = result;
1068
1069 SpvId type = get_uvec_type(ctx, bit_size, num_components);
1070 return spirv_builder_const_composite(&ctx->builder, type, components,
1071 num_components);
1072 }
1073
1074 static SpvId
1075 get_ivec_constant(struct ntv_context *ctx, unsigned bit_size,
1076 unsigned num_components, int32_t value)
1077 {
1078 assert(bit_size == 32);
1079
1080 SpvId result = emit_int_const(ctx, bit_size, value);
1081 if (num_components == 1)
1082 return result;
1083
1084 assert(num_components > 1);
1085 SpvId components[num_components];
1086 for (int i = 0; i < num_components; i++)
1087 components[i] = result;
1088
1089 SpvId type = get_ivec_type(ctx, bit_size, num_components);
1090 return spirv_builder_const_composite(&ctx->builder, type, components,
1091 num_components);
1092 }
1093
1094 static inline unsigned
1095 alu_instr_src_components(const nir_alu_instr *instr, unsigned src)
1096 {
1097 if (nir_op_infos[instr->op].input_sizes[src] > 0)
1098 return nir_op_infos[instr->op].input_sizes[src];
1099
1100 if (instr->dest.dest.is_ssa)
1101 return instr->dest.dest.ssa.num_components;
1102 else
1103 return instr->dest.dest.reg.reg->num_components;
1104 }
1105
1106 static SpvId
1107 get_alu_src(struct ntv_context *ctx, nir_alu_instr *alu, unsigned src)
1108 {
1109 SpvId raw_value = get_alu_src_raw(ctx, alu, src);
1110
1111 unsigned num_components = alu_instr_src_components(alu, src);
1112 unsigned bit_size = nir_src_bit_size(alu->src[src].src);
1113 nir_alu_type type = nir_op_infos[alu->op].input_types[src];
1114
1115 if (bit_size == 1)
1116 return raw_value;
1117 else {
1118 switch (nir_alu_type_get_base_type(type)) {
1119 case nir_type_bool:
1120 unreachable("bool should have bit-size 1");
1121
1122 case nir_type_int:
1123 return bitcast_to_ivec(ctx, raw_value, bit_size, num_components);
1124
1125 case nir_type_uint:
1126 return raw_value;
1127
1128 case nir_type_float:
1129 return bitcast_to_fvec(ctx, raw_value, bit_size, num_components);
1130
1131 default:
1132 unreachable("unknown nir_alu_type");
1133 }
1134 }
1135 }
1136
1137 static SpvId
1138 store_alu_result(struct ntv_context *ctx, nir_alu_instr *alu, SpvId result)
1139 {
1140 assert(!alu->dest.saturate);
1141 return store_dest(ctx, &alu->dest.dest, result,
1142 nir_op_infos[alu->op].output_type);
1143 }
1144
1145 static SpvId
1146 get_dest_type(struct ntv_context *ctx, nir_dest *dest, nir_alu_type type)
1147 {
1148 unsigned num_components = nir_dest_num_components(*dest);
1149 unsigned bit_size = nir_dest_bit_size(*dest);
1150
1151 if (bit_size == 1)
1152 return get_bvec_type(ctx, num_components);
1153
1154 switch (nir_alu_type_get_base_type(type)) {
1155 case nir_type_bool:
1156 unreachable("bool should have bit-size 1");
1157
1158 case nir_type_int:
1159 return get_ivec_type(ctx, bit_size, num_components);
1160
1161 case nir_type_uint:
1162 return get_uvec_type(ctx, bit_size, num_components);
1163
1164 case nir_type_float:
1165 return get_fvec_type(ctx, bit_size, num_components);
1166
1167 default:
1168 unreachable("unsupported nir_alu_type");
1169 }
1170 }
1171
1172 static void
1173 emit_alu(struct ntv_context *ctx, nir_alu_instr *alu)
1174 {
1175 SpvId src[nir_op_infos[alu->op].num_inputs];
1176 unsigned in_bit_sizes[nir_op_infos[alu->op].num_inputs];
1177 for (unsigned i = 0; i < nir_op_infos[alu->op].num_inputs; i++) {
1178 src[i] = get_alu_src(ctx, alu, i);
1179 in_bit_sizes[i] = nir_src_bit_size(alu->src[i].src);
1180 }
1181
1182 SpvId dest_type = get_dest_type(ctx, &alu->dest.dest,
1183 nir_op_infos[alu->op].output_type);
1184 unsigned bit_size = nir_dest_bit_size(alu->dest.dest);
1185 unsigned num_components = nir_dest_num_components(alu->dest.dest);
1186
1187 SpvId result = 0;
1188 switch (alu->op) {
1189 case nir_op_mov:
1190 assert(nir_op_infos[alu->op].num_inputs == 1);
1191 result = src[0];
1192 break;
1193
1194 #define UNOP(nir_op, spirv_op) \
1195 case nir_op: \
1196 assert(nir_op_infos[alu->op].num_inputs == 1); \
1197 result = emit_unop(ctx, spirv_op, dest_type, src[0]); \
1198 break;
1199
1200 UNOP(nir_op_ineg, SpvOpSNegate)
1201 UNOP(nir_op_fneg, SpvOpFNegate)
1202 UNOP(nir_op_fddx, SpvOpDPdx)
1203 UNOP(nir_op_fddx_coarse, SpvOpDPdxCoarse)
1204 UNOP(nir_op_fddx_fine, SpvOpDPdxFine)
1205 UNOP(nir_op_fddy, SpvOpDPdy)
1206 UNOP(nir_op_fddy_coarse, SpvOpDPdyCoarse)
1207 UNOP(nir_op_fddy_fine, SpvOpDPdyFine)
1208 UNOP(nir_op_f2i32, SpvOpConvertFToS)
1209 UNOP(nir_op_f2u32, SpvOpConvertFToU)
1210 UNOP(nir_op_i2f32, SpvOpConvertSToF)
1211 UNOP(nir_op_u2f32, SpvOpConvertUToF)
1212 UNOP(nir_op_bitfield_reverse, SpvOpBitReverse)
1213 #undef UNOP
1214
1215 case nir_op_inot:
1216 if (bit_size == 1)
1217 result = emit_unop(ctx, SpvOpLogicalNot, dest_type, src[0]);
1218 else
1219 result = emit_unop(ctx, SpvOpNot, dest_type, src[0]);
1220 break;
1221
1222 case nir_op_b2i32:
1223 assert(nir_op_infos[alu->op].num_inputs == 1);
1224 result = emit_select(ctx, dest_type, src[0],
1225 get_ivec_constant(ctx, 32, num_components, 1),
1226 get_ivec_constant(ctx, 32, num_components, 0));
1227 break;
1228
1229 case nir_op_b2f32:
1230 assert(nir_op_infos[alu->op].num_inputs == 1);
1231 result = emit_select(ctx, dest_type, src[0],
1232 get_fvec_constant(ctx, 32, num_components, 1),
1233 get_fvec_constant(ctx, 32, num_components, 0));
1234 break;
1235
1236 #define BUILTIN_UNOP(nir_op, spirv_op) \
1237 case nir_op: \
1238 assert(nir_op_infos[alu->op].num_inputs == 1); \
1239 result = emit_builtin_unop(ctx, spirv_op, dest_type, src[0]); \
1240 break;
1241
1242 BUILTIN_UNOP(nir_op_iabs, GLSLstd450SAbs)
1243 BUILTIN_UNOP(nir_op_fabs, GLSLstd450FAbs)
1244 BUILTIN_UNOP(nir_op_fsqrt, GLSLstd450Sqrt)
1245 BUILTIN_UNOP(nir_op_frsq, GLSLstd450InverseSqrt)
1246 BUILTIN_UNOP(nir_op_flog2, GLSLstd450Log2)
1247 BUILTIN_UNOP(nir_op_fexp2, GLSLstd450Exp2)
1248 BUILTIN_UNOP(nir_op_ffract, GLSLstd450Fract)
1249 BUILTIN_UNOP(nir_op_ffloor, GLSLstd450Floor)
1250 BUILTIN_UNOP(nir_op_fceil, GLSLstd450Ceil)
1251 BUILTIN_UNOP(nir_op_ftrunc, GLSLstd450Trunc)
1252 BUILTIN_UNOP(nir_op_fround_even, GLSLstd450RoundEven)
1253 BUILTIN_UNOP(nir_op_fsign, GLSLstd450FSign)
1254 BUILTIN_UNOP(nir_op_isign, GLSLstd450SSign)
1255 BUILTIN_UNOP(nir_op_fsin, GLSLstd450Sin)
1256 BUILTIN_UNOP(nir_op_fcos, GLSLstd450Cos)
1257 #undef BUILTIN_UNOP
1258
1259 case nir_op_frcp:
1260 assert(nir_op_infos[alu->op].num_inputs == 1);
1261 result = emit_binop(ctx, SpvOpFDiv, dest_type,
1262 get_fvec_constant(ctx, bit_size, num_components, 1),
1263 src[0]);
1264 break;
1265
1266 case nir_op_f2b1:
1267 assert(nir_op_infos[alu->op].num_inputs == 1);
1268 result = emit_binop(ctx, SpvOpFOrdNotEqual, dest_type, src[0],
1269 get_fvec_constant(ctx,
1270 nir_src_bit_size(alu->src[0].src),
1271 num_components, 0));
1272 break;
1273 case nir_op_i2b1:
1274 assert(nir_op_infos[alu->op].num_inputs == 1);
1275 result = emit_binop(ctx, SpvOpINotEqual, dest_type, src[0],
1276 get_ivec_constant(ctx,
1277 nir_src_bit_size(alu->src[0].src),
1278 num_components, 0));
1279 break;
1280
1281
1282 #define BINOP(nir_op, spirv_op) \
1283 case nir_op: \
1284 assert(nir_op_infos[alu->op].num_inputs == 2); \
1285 result = emit_binop(ctx, spirv_op, dest_type, src[0], src[1]); \
1286 break;
1287
1288 BINOP(nir_op_iadd, SpvOpIAdd)
1289 BINOP(nir_op_isub, SpvOpISub)
1290 BINOP(nir_op_imul, SpvOpIMul)
1291 BINOP(nir_op_idiv, SpvOpSDiv)
1292 BINOP(nir_op_udiv, SpvOpUDiv)
1293 BINOP(nir_op_umod, SpvOpUMod)
1294 BINOP(nir_op_fadd, SpvOpFAdd)
1295 BINOP(nir_op_fsub, SpvOpFSub)
1296 BINOP(nir_op_fmul, SpvOpFMul)
1297 BINOP(nir_op_fdiv, SpvOpFDiv)
1298 BINOP(nir_op_fmod, SpvOpFMod)
1299 BINOP(nir_op_ilt, SpvOpSLessThan)
1300 BINOP(nir_op_ige, SpvOpSGreaterThanEqual)
1301 BINOP(nir_op_ult, SpvOpULessThan)
1302 BINOP(nir_op_uge, SpvOpUGreaterThanEqual)
1303 BINOP(nir_op_flt, SpvOpFOrdLessThan)
1304 BINOP(nir_op_fge, SpvOpFOrdGreaterThanEqual)
1305 BINOP(nir_op_feq, SpvOpFOrdEqual)
1306 BINOP(nir_op_fne, SpvOpFUnordNotEqual)
1307 BINOP(nir_op_ishl, SpvOpShiftLeftLogical)
1308 BINOP(nir_op_ishr, SpvOpShiftRightArithmetic)
1309 BINOP(nir_op_ushr, SpvOpShiftRightLogical)
1310 BINOP(nir_op_ixor, SpvOpBitwiseXor)
1311 #undef BINOP
1312
1313 #define BINOP_LOG(nir_op, spv_op, spv_log_op) \
1314 case nir_op: \
1315 assert(nir_op_infos[alu->op].num_inputs == 2); \
1316 if (nir_src_bit_size(alu->src[0].src) == 1) \
1317 result = emit_binop(ctx, spv_log_op, dest_type, src[0], src[1]); \
1318 else \
1319 result = emit_binop(ctx, spv_op, dest_type, src[0], src[1]); \
1320 break;
1321
1322 BINOP_LOG(nir_op_iand, SpvOpBitwiseAnd, SpvOpLogicalAnd)
1323 BINOP_LOG(nir_op_ior, SpvOpBitwiseOr, SpvOpLogicalOr)
1324 BINOP_LOG(nir_op_ieq, SpvOpIEqual, SpvOpLogicalEqual)
1325 BINOP_LOG(nir_op_ine, SpvOpINotEqual, SpvOpLogicalNotEqual)
1326 #undef BINOP_LOG
1327
1328 #define BUILTIN_BINOP(nir_op, spirv_op) \
1329 case nir_op: \
1330 assert(nir_op_infos[alu->op].num_inputs == 2); \
1331 result = emit_builtin_binop(ctx, spirv_op, dest_type, src[0], src[1]); \
1332 break;
1333
1334 BUILTIN_BINOP(nir_op_fmin, GLSLstd450FMin)
1335 BUILTIN_BINOP(nir_op_fmax, GLSLstd450FMax)
1336 BUILTIN_BINOP(nir_op_imin, GLSLstd450SMin)
1337 BUILTIN_BINOP(nir_op_imax, GLSLstd450SMax)
1338 BUILTIN_BINOP(nir_op_umin, GLSLstd450UMin)
1339 BUILTIN_BINOP(nir_op_umax, GLSLstd450UMax)
1340 #undef BUILTIN_BINOP
1341
1342 case nir_op_fdot2:
1343 case nir_op_fdot3:
1344 case nir_op_fdot4:
1345 assert(nir_op_infos[alu->op].num_inputs == 2);
1346 result = emit_binop(ctx, SpvOpDot, dest_type, src[0], src[1]);
1347 break;
1348
1349 case nir_op_fdph:
1350 unreachable("should already be lowered away");
1351
1352 case nir_op_seq:
1353 case nir_op_sne:
1354 case nir_op_slt:
1355 case nir_op_sge: {
1356 assert(nir_op_infos[alu->op].num_inputs == 2);
1357 int num_components = nir_dest_num_components(alu->dest.dest);
1358 SpvId bool_type = get_bvec_type(ctx, num_components);
1359
1360 SpvId zero = emit_float_const(ctx, bit_size, 0.0f);
1361 SpvId one = emit_float_const(ctx, bit_size, 1.0f);
1362 if (num_components > 1) {
1363 SpvId zero_comps[num_components], one_comps[num_components];
1364 for (int i = 0; i < num_components; i++) {
1365 zero_comps[i] = zero;
1366 one_comps[i] = one;
1367 }
1368
1369 zero = spirv_builder_const_composite(&ctx->builder, dest_type,
1370 zero_comps, num_components);
1371 one = spirv_builder_const_composite(&ctx->builder, dest_type,
1372 one_comps, num_components);
1373 }
1374
1375 SpvOp op;
1376 switch (alu->op) {
1377 case nir_op_seq: op = SpvOpFOrdEqual; break;
1378 case nir_op_sne: op = SpvOpFOrdNotEqual; break;
1379 case nir_op_slt: op = SpvOpFOrdLessThan; break;
1380 case nir_op_sge: op = SpvOpFOrdGreaterThanEqual; break;
1381 default: unreachable("unexpected op");
1382 }
1383
1384 result = emit_binop(ctx, op, bool_type, src[0], src[1]);
1385 result = emit_select(ctx, dest_type, result, one, zero);
1386 }
1387 break;
1388
1389 case nir_op_flrp:
1390 assert(nir_op_infos[alu->op].num_inputs == 3);
1391 result = emit_builtin_triop(ctx, GLSLstd450FMix, dest_type,
1392 src[0], src[1], src[2]);
1393 break;
1394
1395 case nir_op_fcsel:
1396 result = emit_binop(ctx, SpvOpFOrdGreaterThan,
1397 get_bvec_type(ctx, num_components),
1398 src[0],
1399 get_fvec_constant(ctx,
1400 nir_src_bit_size(alu->src[0].src),
1401 num_components, 0));
1402 result = emit_select(ctx, dest_type, result, src[1], src[2]);
1403 break;
1404
1405 case nir_op_bcsel:
1406 assert(nir_op_infos[alu->op].num_inputs == 3);
1407 result = emit_select(ctx, dest_type, src[0], src[1], src[2]);
1408 break;
1409
1410 case nir_op_bany_fnequal2:
1411 case nir_op_bany_fnequal3:
1412 case nir_op_bany_fnequal4: {
1413 assert(nir_op_infos[alu->op].num_inputs == 2);
1414 assert(alu_instr_src_components(alu, 0) ==
1415 alu_instr_src_components(alu, 1));
1416 assert(in_bit_sizes[0] == in_bit_sizes[1]);
1417 /* The type of Operand 1 and Operand 2 must be a scalar or vector of floating-point type. */
1418 SpvOp op = in_bit_sizes[0] == 1 ? SpvOpLogicalNotEqual : SpvOpFOrdNotEqual;
1419 result = emit_binop(ctx, op,
1420 get_bvec_type(ctx, alu_instr_src_components(alu, 0)),
1421 src[0], src[1]);
1422 result = emit_unop(ctx, SpvOpAny, dest_type, result);
1423 break;
1424 }
1425
1426 case nir_op_ball_fequal2:
1427 case nir_op_ball_fequal3:
1428 case nir_op_ball_fequal4: {
1429 assert(nir_op_infos[alu->op].num_inputs == 2);
1430 assert(alu_instr_src_components(alu, 0) ==
1431 alu_instr_src_components(alu, 1));
1432 assert(in_bit_sizes[0] == in_bit_sizes[1]);
1433 /* The type of Operand 1 and Operand 2 must be a scalar or vector of floating-point type. */
1434 SpvOp op = in_bit_sizes[0] == 1 ? SpvOpLogicalEqual : SpvOpFOrdEqual;
1435 result = emit_binop(ctx, op,
1436 get_bvec_type(ctx, alu_instr_src_components(alu, 0)),
1437 src[0], src[1]);
1438 result = emit_unop(ctx, SpvOpAll, dest_type, result);
1439 break;
1440 }
1441
1442 case nir_op_bany_inequal2:
1443 case nir_op_bany_inequal3:
1444 case nir_op_bany_inequal4: {
1445 assert(nir_op_infos[alu->op].num_inputs == 2);
1446 assert(alu_instr_src_components(alu, 0) ==
1447 alu_instr_src_components(alu, 1));
1448 assert(in_bit_sizes[0] == in_bit_sizes[1]);
1449 /* The type of Operand 1 and Operand 2 must be a scalar or vector of integer type. */
1450 SpvOp op = in_bit_sizes[0] == 1 ? SpvOpLogicalNotEqual : SpvOpINotEqual;
1451 result = emit_binop(ctx, op,
1452 get_bvec_type(ctx, alu_instr_src_components(alu, 0)),
1453 src[0], src[1]);
1454 result = emit_unop(ctx, SpvOpAny, dest_type, result);
1455 break;
1456 }
1457
1458 case nir_op_ball_iequal2:
1459 case nir_op_ball_iequal3:
1460 case nir_op_ball_iequal4: {
1461 assert(nir_op_infos[alu->op].num_inputs == 2);
1462 assert(alu_instr_src_components(alu, 0) ==
1463 alu_instr_src_components(alu, 1));
1464 assert(in_bit_sizes[0] == in_bit_sizes[1]);
1465 /* The type of Operand 1 and Operand 2 must be a scalar or vector of integer type. */
1466 SpvOp op = in_bit_sizes[0] == 1 ? SpvOpLogicalEqual : SpvOpIEqual;
1467 result = emit_binop(ctx, op,
1468 get_bvec_type(ctx, alu_instr_src_components(alu, 0)),
1469 src[0], src[1]);
1470 result = emit_unop(ctx, SpvOpAll, dest_type, result);
1471 break;
1472 }
1473
1474 case nir_op_vec2:
1475 case nir_op_vec3:
1476 case nir_op_vec4: {
1477 int num_inputs = nir_op_infos[alu->op].num_inputs;
1478 assert(2 <= num_inputs && num_inputs <= 4);
1479 result = spirv_builder_emit_composite_construct(&ctx->builder, dest_type,
1480 src, num_inputs);
1481 }
1482 break;
1483
1484 default:
1485 fprintf(stderr, "emit_alu: not implemented (%s)\n",
1486 nir_op_infos[alu->op].name);
1487
1488 unreachable("unsupported opcode");
1489 return;
1490 }
1491
1492 store_alu_result(ctx, alu, result);
1493 }
1494
1495 static void
1496 emit_load_const(struct ntv_context *ctx, nir_load_const_instr *load_const)
1497 {
1498 unsigned bit_size = load_const->def.bit_size;
1499 unsigned num_components = load_const->def.num_components;
1500
1501 SpvId constant;
1502 if (num_components > 1) {
1503 SpvId components[num_components];
1504 SpvId type;
1505 if (bit_size == 1) {
1506 for (int i = 0; i < num_components; i++)
1507 components[i] = spirv_builder_const_bool(&ctx->builder,
1508 load_const->value[i].b);
1509
1510 type = get_bvec_type(ctx, num_components);
1511 } else {
1512 for (int i = 0; i < num_components; i++)
1513 components[i] = emit_uint_const(ctx, bit_size,
1514 load_const->value[i].u32);
1515
1516 type = get_uvec_type(ctx, bit_size, num_components);
1517 }
1518 constant = spirv_builder_const_composite(&ctx->builder, type,
1519 components, num_components);
1520 } else {
1521 assert(num_components == 1);
1522 if (bit_size == 1)
1523 constant = spirv_builder_const_bool(&ctx->builder,
1524 load_const->value[0].b);
1525 else
1526 constant = emit_uint_const(ctx, bit_size, load_const->value[0].u32);
1527 }
1528
1529 store_ssa_def(ctx, &load_const->def, constant);
1530 }
1531
1532 static void
1533 emit_load_ubo(struct ntv_context *ctx, nir_intrinsic_instr *intr)
1534 {
1535 nir_const_value *const_block_index = nir_src_as_const_value(intr->src[0]);
1536 assert(const_block_index); // no dynamic indexing for now
1537 assert(const_block_index->u32 == 0); // we only support the default UBO for now
1538
1539 nir_const_value *const_offset = nir_src_as_const_value(intr->src[1]);
1540 if (const_offset) {
1541 SpvId uvec4_type = get_uvec_type(ctx, 32, 4);
1542 SpvId pointer_type = spirv_builder_type_pointer(&ctx->builder,
1543 SpvStorageClassUniform,
1544 uvec4_type);
1545
1546 unsigned idx = const_offset->u32;
1547 SpvId member = emit_uint_const(ctx, 32, 0);
1548 SpvId offset = emit_uint_const(ctx, 32, idx);
1549 SpvId offsets[] = { member, offset };
1550 SpvId ptr = spirv_builder_emit_access_chain(&ctx->builder, pointer_type,
1551 ctx->ubos[0], offsets,
1552 ARRAY_SIZE(offsets));
1553 SpvId result = spirv_builder_emit_load(&ctx->builder, uvec4_type, ptr);
1554
1555 SpvId type = get_dest_uvec_type(ctx, &intr->dest);
1556 unsigned num_components = nir_dest_num_components(intr->dest);
1557 if (num_components == 1) {
1558 uint32_t components[] = { 0 };
1559 result = spirv_builder_emit_composite_extract(&ctx->builder,
1560 type,
1561 result, components,
1562 1);
1563 } else if (num_components < 4) {
1564 SpvId constituents[num_components];
1565 SpvId uint_type = spirv_builder_type_uint(&ctx->builder, 32);
1566 for (uint32_t i = 0; i < num_components; ++i)
1567 constituents[i] = spirv_builder_emit_composite_extract(&ctx->builder,
1568 uint_type,
1569 result, &i,
1570 1);
1571
1572 result = spirv_builder_emit_composite_construct(&ctx->builder,
1573 type,
1574 constituents,
1575 num_components);
1576 }
1577
1578 if (nir_dest_bit_size(intr->dest) == 1)
1579 result = uvec_to_bvec(ctx, result, num_components);
1580
1581 store_dest(ctx, &intr->dest, result, nir_type_uint);
1582 } else
1583 unreachable("uniform-addressing not yet supported");
1584 }
1585
1586 static void
1587 emit_discard(struct ntv_context *ctx, nir_intrinsic_instr *intr)
1588 {
1589 assert(ctx->block_started);
1590 spirv_builder_emit_kill(&ctx->builder);
1591 /* discard is weird in NIR, so let's just create an unreachable block after
1592 it and hope that the vulkan driver will DCE any instructinos in it. */
1593 spirv_builder_label(&ctx->builder, spirv_builder_new_id(&ctx->builder));
1594 }
1595
1596 static void
1597 emit_load_deref(struct ntv_context *ctx, nir_intrinsic_instr *intr)
1598 {
1599 SpvId ptr = get_src(ctx, intr->src);
1600
1601 SpvId result = spirv_builder_emit_load(&ctx->builder,
1602 get_glsl_type(ctx, nir_src_as_deref(intr->src[0])->type),
1603 ptr);
1604 unsigned num_components = nir_dest_num_components(intr->dest);
1605 unsigned bit_size = nir_dest_bit_size(intr->dest);
1606 result = bitcast_to_uvec(ctx, result, bit_size, num_components);
1607 store_dest(ctx, &intr->dest, result, nir_type_uint);
1608 }
1609
1610 static void
1611 emit_store_deref(struct ntv_context *ctx, nir_intrinsic_instr *intr)
1612 {
1613 SpvId ptr = get_src(ctx, &intr->src[0]);
1614 SpvId src = get_src(ctx, &intr->src[1]);
1615
1616 SpvId type = get_glsl_type(ctx, nir_src_as_deref(intr->src[0])->type);
1617 SpvId result = emit_bitcast(ctx, type, src);
1618 spirv_builder_emit_store(&ctx->builder, ptr, result);
1619 }
1620
1621 static SpvId
1622 create_builtin_var(struct ntv_context *ctx, SpvId var_type,
1623 SpvStorageClass storage_class,
1624 const char *name, SpvBuiltIn builtin)
1625 {
1626 SpvId pointer_type = spirv_builder_type_pointer(&ctx->builder,
1627 storage_class,
1628 var_type);
1629 SpvId var = spirv_builder_emit_var(&ctx->builder, pointer_type,
1630 storage_class);
1631 spirv_builder_emit_name(&ctx->builder, var, name);
1632 spirv_builder_emit_builtin(&ctx->builder, var, builtin);
1633
1634 assert(ctx->num_entry_ifaces < ARRAY_SIZE(ctx->entry_ifaces));
1635 ctx->entry_ifaces[ctx->num_entry_ifaces++] = var;
1636 return var;
1637 }
1638
1639 static void
1640 emit_load_front_face(struct ntv_context *ctx, nir_intrinsic_instr *intr)
1641 {
1642 SpvId var_type = spirv_builder_type_bool(&ctx->builder);
1643 if (!ctx->front_face_var)
1644 ctx->front_face_var = create_builtin_var(ctx, var_type,
1645 SpvStorageClassInput,
1646 "gl_FrontFacing",
1647 SpvBuiltInFrontFacing);
1648
1649 SpvId result = spirv_builder_emit_load(&ctx->builder, var_type,
1650 ctx->front_face_var);
1651 assert(1 == nir_dest_num_components(intr->dest));
1652 store_dest(ctx, &intr->dest, result, nir_type_bool);
1653 }
1654
1655 static void
1656 emit_load_instance_id(struct ntv_context *ctx, nir_intrinsic_instr *intr)
1657 {
1658 SpvId var_type = spirv_builder_type_uint(&ctx->builder, 32);
1659 if (!ctx->instance_id_var)
1660 ctx->instance_id_var = create_builtin_var(ctx, var_type,
1661 SpvStorageClassInput,
1662 "gl_InstanceId",
1663 SpvBuiltInInstanceIndex);
1664
1665 SpvId result = spirv_builder_emit_load(&ctx->builder, var_type,
1666 ctx->instance_id_var);
1667 assert(1 == nir_dest_num_components(intr->dest));
1668 store_dest(ctx, &intr->dest, result, nir_type_uint);
1669 }
1670
1671 static void
1672 emit_load_vertex_id(struct ntv_context *ctx, nir_intrinsic_instr *intr)
1673 {
1674 SpvId var_type = spirv_builder_type_uint(&ctx->builder, 32);
1675 if (!ctx->vertex_id_var)
1676 ctx->vertex_id_var = create_builtin_var(ctx, var_type,
1677 SpvStorageClassInput,
1678 "gl_VertexID",
1679 SpvBuiltInVertexIndex);
1680
1681 SpvId result = spirv_builder_emit_load(&ctx->builder, var_type,
1682 ctx->vertex_id_var);
1683 assert(1 == nir_dest_num_components(intr->dest));
1684 store_dest(ctx, &intr->dest, result, nir_type_uint);
1685 }
1686
1687 static void
1688 emit_intrinsic(struct ntv_context *ctx, nir_intrinsic_instr *intr)
1689 {
1690 switch (intr->intrinsic) {
1691 case nir_intrinsic_load_ubo:
1692 emit_load_ubo(ctx, intr);
1693 break;
1694
1695 case nir_intrinsic_discard:
1696 emit_discard(ctx, intr);
1697 break;
1698
1699 case nir_intrinsic_load_deref:
1700 emit_load_deref(ctx, intr);
1701 break;
1702
1703 case nir_intrinsic_store_deref:
1704 emit_store_deref(ctx, intr);
1705 break;
1706
1707 case nir_intrinsic_load_front_face:
1708 emit_load_front_face(ctx, intr);
1709 break;
1710
1711 case nir_intrinsic_load_instance_id:
1712 emit_load_instance_id(ctx, intr);
1713 break;
1714
1715 case nir_intrinsic_load_vertex_id:
1716 emit_load_vertex_id(ctx, intr);
1717 break;
1718
1719 default:
1720 fprintf(stderr, "emit_intrinsic: not implemented (%s)\n",
1721 nir_intrinsic_infos[intr->intrinsic].name);
1722 unreachable("unsupported intrinsic");
1723 }
1724 }
1725
1726 static void
1727 emit_undef(struct ntv_context *ctx, nir_ssa_undef_instr *undef)
1728 {
1729 SpvId type = get_uvec_type(ctx, undef->def.bit_size,
1730 undef->def.num_components);
1731
1732 store_ssa_def(ctx, &undef->def,
1733 spirv_builder_emit_undef(&ctx->builder, type));
1734 }
1735
1736 static SpvId
1737 get_src_float(struct ntv_context *ctx, nir_src *src)
1738 {
1739 SpvId def = get_src(ctx, src);
1740 unsigned num_components = nir_src_num_components(*src);
1741 unsigned bit_size = nir_src_bit_size(*src);
1742 return bitcast_to_fvec(ctx, def, bit_size, num_components);
1743 }
1744
1745 static SpvId
1746 get_src_int(struct ntv_context *ctx, nir_src *src)
1747 {
1748 SpvId def = get_src(ctx, src);
1749 unsigned num_components = nir_src_num_components(*src);
1750 unsigned bit_size = nir_src_bit_size(*src);
1751 return bitcast_to_ivec(ctx, def, bit_size, num_components);
1752 }
1753
1754 static void
1755 emit_tex(struct ntv_context *ctx, nir_tex_instr *tex)
1756 {
1757 assert(tex->op == nir_texop_tex ||
1758 tex->op == nir_texop_txb ||
1759 tex->op == nir_texop_txl ||
1760 tex->op == nir_texop_txd ||
1761 tex->op == nir_texop_txf ||
1762 tex->op == nir_texop_txf_ms ||
1763 tex->op == nir_texop_txs);
1764 assert(tex->texture_index == tex->sampler_index);
1765
1766 SpvId coord = 0, proj = 0, bias = 0, lod = 0, dref = 0, dx = 0, dy = 0,
1767 offset = 0, sample = 0;
1768 unsigned coord_components = 0;
1769 for (unsigned i = 0; i < tex->num_srcs; i++) {
1770 switch (tex->src[i].src_type) {
1771 case nir_tex_src_coord:
1772 if (tex->op == nir_texop_txf ||
1773 tex->op == nir_texop_txf_ms)
1774 coord = get_src_int(ctx, &tex->src[i].src);
1775 else
1776 coord = get_src_float(ctx, &tex->src[i].src);
1777 coord_components = nir_src_num_components(tex->src[i].src);
1778 break;
1779
1780 case nir_tex_src_projector:
1781 assert(nir_src_num_components(tex->src[i].src) == 1);
1782 proj = get_src_float(ctx, &tex->src[i].src);
1783 assert(proj != 0);
1784 break;
1785
1786 case nir_tex_src_offset:
1787 offset = get_src_int(ctx, &tex->src[i].src);
1788 break;
1789
1790 case nir_tex_src_bias:
1791 assert(tex->op == nir_texop_txb);
1792 bias = get_src_float(ctx, &tex->src[i].src);
1793 assert(bias != 0);
1794 break;
1795
1796 case nir_tex_src_lod:
1797 assert(nir_src_num_components(tex->src[i].src) == 1);
1798 if (tex->op == nir_texop_txf ||
1799 tex->op == nir_texop_txf_ms ||
1800 tex->op == nir_texop_txs)
1801 lod = get_src_int(ctx, &tex->src[i].src);
1802 else
1803 lod = get_src_float(ctx, &tex->src[i].src);
1804 assert(lod != 0);
1805 break;
1806
1807 case nir_tex_src_ms_index:
1808 assert(nir_src_num_components(tex->src[i].src) == 1);
1809 sample = get_src_int(ctx, &tex->src[i].src);
1810 break;
1811
1812 case nir_tex_src_comparator:
1813 assert(nir_src_num_components(tex->src[i].src) == 1);
1814 dref = get_src_float(ctx, &tex->src[i].src);
1815 assert(dref != 0);
1816 break;
1817
1818 case nir_tex_src_ddx:
1819 dx = get_src_float(ctx, &tex->src[i].src);
1820 assert(dx != 0);
1821 break;
1822
1823 case nir_tex_src_ddy:
1824 dy = get_src_float(ctx, &tex->src[i].src);
1825 assert(dy != 0);
1826 break;
1827
1828 default:
1829 fprintf(stderr, "texture source: %d\n", tex->src[i].src_type);
1830 unreachable("unknown texture source");
1831 }
1832 }
1833
1834 if (lod == 0 && ctx->stage != MESA_SHADER_FRAGMENT) {
1835 lod = emit_float_const(ctx, 32, 0.0f);
1836 assert(lod != 0);
1837 }
1838
1839 SpvId image_type = ctx->image_types[tex->texture_index];
1840 SpvId sampled_type = spirv_builder_type_sampled_image(&ctx->builder,
1841 image_type);
1842
1843 assert(ctx->samplers_used & (1u << tex->texture_index));
1844 SpvId load = spirv_builder_emit_load(&ctx->builder, sampled_type,
1845 ctx->samplers[tex->texture_index]);
1846
1847 SpvId dest_type = get_dest_type(ctx, &tex->dest, tex->dest_type);
1848
1849 if (tex->op == nir_texop_txs) {
1850 SpvId image = spirv_builder_emit_image(&ctx->builder, image_type, load);
1851 SpvId result = spirv_builder_emit_image_query_size(&ctx->builder,
1852 dest_type, image,
1853 lod);
1854 store_dest(ctx, &tex->dest, result, tex->dest_type);
1855 return;
1856 }
1857
1858 if (proj && coord_components > 0) {
1859 SpvId constituents[coord_components + 1];
1860 if (coord_components == 1)
1861 constituents[0] = coord;
1862 else {
1863 assert(coord_components > 1);
1864 SpvId float_type = spirv_builder_type_float(&ctx->builder, 32);
1865 for (uint32_t i = 0; i < coord_components; ++i)
1866 constituents[i] = spirv_builder_emit_composite_extract(&ctx->builder,
1867 float_type,
1868 coord,
1869 &i, 1);
1870 }
1871
1872 constituents[coord_components++] = proj;
1873
1874 SpvId vec_type = get_fvec_type(ctx, 32, coord_components);
1875 coord = spirv_builder_emit_composite_construct(&ctx->builder,
1876 vec_type,
1877 constituents,
1878 coord_components);
1879 }
1880
1881 SpvId actual_dest_type = dest_type;
1882 if (dref)
1883 actual_dest_type = spirv_builder_type_float(&ctx->builder, 32);
1884
1885 SpvId result;
1886 if (tex->op == nir_texop_txf ||
1887 tex->op == nir_texop_txf_ms) {
1888 SpvId image = spirv_builder_emit_image(&ctx->builder, image_type, load);
1889 result = spirv_builder_emit_image_fetch(&ctx->builder, dest_type,
1890 image, coord, lod, sample);
1891 } else {
1892 result = spirv_builder_emit_image_sample(&ctx->builder,
1893 actual_dest_type, load,
1894 coord,
1895 proj != 0,
1896 lod, bias, dref, dx, dy,
1897 offset);
1898 }
1899
1900 spirv_builder_emit_decoration(&ctx->builder, result,
1901 SpvDecorationRelaxedPrecision);
1902
1903 if (dref && nir_dest_num_components(tex->dest) > 1) {
1904 SpvId components[4] = { result, result, result, result };
1905 result = spirv_builder_emit_composite_construct(&ctx->builder,
1906 dest_type,
1907 components,
1908 4);
1909 }
1910
1911 store_dest(ctx, &tex->dest, result, tex->dest_type);
1912 }
1913
1914 static void
1915 start_block(struct ntv_context *ctx, SpvId label)
1916 {
1917 /* terminate previous block if needed */
1918 if (ctx->block_started)
1919 spirv_builder_emit_branch(&ctx->builder, label);
1920
1921 /* start new block */
1922 spirv_builder_label(&ctx->builder, label);
1923 ctx->block_started = true;
1924 }
1925
1926 static void
1927 branch(struct ntv_context *ctx, SpvId label)
1928 {
1929 assert(ctx->block_started);
1930 spirv_builder_emit_branch(&ctx->builder, label);
1931 ctx->block_started = false;
1932 }
1933
1934 static void
1935 branch_conditional(struct ntv_context *ctx, SpvId condition, SpvId then_id,
1936 SpvId else_id)
1937 {
1938 assert(ctx->block_started);
1939 spirv_builder_emit_branch_conditional(&ctx->builder, condition,
1940 then_id, else_id);
1941 ctx->block_started = false;
1942 }
1943
1944 static void
1945 emit_jump(struct ntv_context *ctx, nir_jump_instr *jump)
1946 {
1947 switch (jump->type) {
1948 case nir_jump_break:
1949 assert(ctx->loop_break);
1950 branch(ctx, ctx->loop_break);
1951 break;
1952
1953 case nir_jump_continue:
1954 assert(ctx->loop_cont);
1955 branch(ctx, ctx->loop_cont);
1956 break;
1957
1958 default:
1959 unreachable("Unsupported jump type\n");
1960 }
1961 }
1962
1963 static void
1964 emit_deref_var(struct ntv_context *ctx, nir_deref_instr *deref)
1965 {
1966 assert(deref->deref_type == nir_deref_type_var);
1967
1968 struct hash_entry *he = _mesa_hash_table_search(ctx->vars, deref->var);
1969 assert(he);
1970 SpvId result = (SpvId)(intptr_t)he->data;
1971 store_dest_raw(ctx, &deref->dest, result);
1972 }
1973
1974 static void
1975 emit_deref_array(struct ntv_context *ctx, nir_deref_instr *deref)
1976 {
1977 assert(deref->deref_type == nir_deref_type_array);
1978 nir_variable *var = nir_deref_instr_get_variable(deref);
1979
1980 SpvStorageClass storage_class;
1981 switch (var->data.mode) {
1982 case nir_var_shader_in:
1983 storage_class = SpvStorageClassInput;
1984 break;
1985
1986 case nir_var_shader_out:
1987 storage_class = SpvStorageClassOutput;
1988 break;
1989
1990 default:
1991 unreachable("Unsupported nir_variable_mode\n");
1992 }
1993
1994 SpvId index = get_src(ctx, &deref->arr.index);
1995
1996 SpvId ptr_type = spirv_builder_type_pointer(&ctx->builder,
1997 storage_class,
1998 get_glsl_type(ctx, deref->type));
1999
2000 SpvId result = spirv_builder_emit_access_chain(&ctx->builder,
2001 ptr_type,
2002 get_src(ctx, &deref->parent),
2003 &index, 1);
2004 /* uint is a bit of a lie here, it's really just an opaque type */
2005 store_dest(ctx, &deref->dest, result, nir_type_uint);
2006 }
2007
2008 static void
2009 emit_deref(struct ntv_context *ctx, nir_deref_instr *deref)
2010 {
2011 switch (deref->deref_type) {
2012 case nir_deref_type_var:
2013 emit_deref_var(ctx, deref);
2014 break;
2015
2016 case nir_deref_type_array:
2017 emit_deref_array(ctx, deref);
2018 break;
2019
2020 default:
2021 unreachable("unexpected deref_type");
2022 }
2023 }
2024
2025 static void
2026 emit_block(struct ntv_context *ctx, struct nir_block *block)
2027 {
2028 start_block(ctx, block_label(ctx, block));
2029 nir_foreach_instr(instr, block) {
2030 switch (instr->type) {
2031 case nir_instr_type_alu:
2032 emit_alu(ctx, nir_instr_as_alu(instr));
2033 break;
2034 case nir_instr_type_intrinsic:
2035 emit_intrinsic(ctx, nir_instr_as_intrinsic(instr));
2036 break;
2037 case nir_instr_type_load_const:
2038 emit_load_const(ctx, nir_instr_as_load_const(instr));
2039 break;
2040 case nir_instr_type_ssa_undef:
2041 emit_undef(ctx, nir_instr_as_ssa_undef(instr));
2042 break;
2043 case nir_instr_type_tex:
2044 emit_tex(ctx, nir_instr_as_tex(instr));
2045 break;
2046 case nir_instr_type_phi:
2047 unreachable("nir_instr_type_phi not supported");
2048 break;
2049 case nir_instr_type_jump:
2050 emit_jump(ctx, nir_instr_as_jump(instr));
2051 break;
2052 case nir_instr_type_call:
2053 unreachable("nir_instr_type_call not supported");
2054 break;
2055 case nir_instr_type_parallel_copy:
2056 unreachable("nir_instr_type_parallel_copy not supported");
2057 break;
2058 case nir_instr_type_deref:
2059 emit_deref(ctx, nir_instr_as_deref(instr));
2060 break;
2061 }
2062 }
2063 }
2064
2065 static void
2066 emit_cf_list(struct ntv_context *ctx, struct exec_list *list);
2067
2068 static SpvId
2069 get_src_bool(struct ntv_context *ctx, nir_src *src)
2070 {
2071 assert(nir_src_bit_size(*src) == 1);
2072 return get_src(ctx, src);
2073 }
2074
2075 static void
2076 emit_if(struct ntv_context *ctx, nir_if *if_stmt)
2077 {
2078 SpvId condition = get_src_bool(ctx, &if_stmt->condition);
2079
2080 SpvId header_id = spirv_builder_new_id(&ctx->builder);
2081 SpvId then_id = block_label(ctx, nir_if_first_then_block(if_stmt));
2082 SpvId endif_id = spirv_builder_new_id(&ctx->builder);
2083 SpvId else_id = endif_id;
2084
2085 bool has_else = !exec_list_is_empty(&if_stmt->else_list);
2086 if (has_else) {
2087 assert(nir_if_first_else_block(if_stmt)->index < ctx->num_blocks);
2088 else_id = block_label(ctx, nir_if_first_else_block(if_stmt));
2089 }
2090
2091 /* create a header-block */
2092 start_block(ctx, header_id);
2093 spirv_builder_emit_selection_merge(&ctx->builder, endif_id,
2094 SpvSelectionControlMaskNone);
2095 branch_conditional(ctx, condition, then_id, else_id);
2096
2097 emit_cf_list(ctx, &if_stmt->then_list);
2098
2099 if (has_else) {
2100 if (ctx->block_started)
2101 branch(ctx, endif_id);
2102
2103 emit_cf_list(ctx, &if_stmt->else_list);
2104 }
2105
2106 start_block(ctx, endif_id);
2107 }
2108
2109 static void
2110 emit_loop(struct ntv_context *ctx, nir_loop *loop)
2111 {
2112 SpvId header_id = spirv_builder_new_id(&ctx->builder);
2113 SpvId begin_id = block_label(ctx, nir_loop_first_block(loop));
2114 SpvId break_id = spirv_builder_new_id(&ctx->builder);
2115 SpvId cont_id = spirv_builder_new_id(&ctx->builder);
2116
2117 /* create a header-block */
2118 start_block(ctx, header_id);
2119 spirv_builder_loop_merge(&ctx->builder, break_id, cont_id, SpvLoopControlMaskNone);
2120 branch(ctx, begin_id);
2121
2122 SpvId save_break = ctx->loop_break;
2123 SpvId save_cont = ctx->loop_cont;
2124 ctx->loop_break = break_id;
2125 ctx->loop_cont = cont_id;
2126
2127 emit_cf_list(ctx, &loop->body);
2128
2129 ctx->loop_break = save_break;
2130 ctx->loop_cont = save_cont;
2131
2132 /* loop->body may have already ended our block */
2133 if (ctx->block_started)
2134 branch(ctx, cont_id);
2135 start_block(ctx, cont_id);
2136 branch(ctx, header_id);
2137
2138 start_block(ctx, break_id);
2139 }
2140
2141 static void
2142 emit_cf_list(struct ntv_context *ctx, struct exec_list *list)
2143 {
2144 foreach_list_typed(nir_cf_node, node, node, list) {
2145 switch (node->type) {
2146 case nir_cf_node_block:
2147 emit_block(ctx, nir_cf_node_as_block(node));
2148 break;
2149
2150 case nir_cf_node_if:
2151 emit_if(ctx, nir_cf_node_as_if(node));
2152 break;
2153
2154 case nir_cf_node_loop:
2155 emit_loop(ctx, nir_cf_node_as_loop(node));
2156 break;
2157
2158 case nir_cf_node_function:
2159 unreachable("nir_cf_node_function not supported");
2160 break;
2161 }
2162 }
2163 }
2164
2165 struct spirv_shader *
2166 nir_to_spirv(struct nir_shader *s, const struct pipe_stream_output_info *so_info, struct pipe_stream_output_info *local_so_info)
2167 {
2168 struct spirv_shader *ret = NULL;
2169
2170 struct ntv_context ctx = {};
2171
2172 switch (s->info.stage) {
2173 case MESA_SHADER_VERTEX:
2174 case MESA_SHADER_FRAGMENT:
2175 case MESA_SHADER_COMPUTE:
2176 spirv_builder_emit_cap(&ctx.builder, SpvCapabilityShader);
2177 break;
2178
2179 case MESA_SHADER_TESS_CTRL:
2180 case MESA_SHADER_TESS_EVAL:
2181 spirv_builder_emit_cap(&ctx.builder, SpvCapabilityTessellation);
2182 break;
2183
2184 case MESA_SHADER_GEOMETRY:
2185 spirv_builder_emit_cap(&ctx.builder, SpvCapabilityGeometry);
2186 break;
2187
2188 default:
2189 unreachable("invalid stage");
2190 }
2191
2192 // TODO: only enable when needed
2193 if (s->info.stage == MESA_SHADER_FRAGMENT) {
2194 spirv_builder_emit_cap(&ctx.builder, SpvCapabilitySampled1D);
2195 spirv_builder_emit_cap(&ctx.builder, SpvCapabilityImageQuery);
2196 spirv_builder_emit_cap(&ctx.builder, SpvCapabilityDerivativeControl);
2197 }
2198
2199 ctx.stage = s->info.stage;
2200 ctx.GLSL_std_450 = spirv_builder_import(&ctx.builder, "GLSL.std.450");
2201 spirv_builder_emit_source(&ctx.builder, SpvSourceLanguageGLSL, 450);
2202
2203 spirv_builder_emit_mem_model(&ctx.builder, SpvAddressingModelLogical,
2204 SpvMemoryModelGLSL450);
2205
2206 SpvExecutionModel exec_model;
2207 switch (s->info.stage) {
2208 case MESA_SHADER_VERTEX:
2209 exec_model = SpvExecutionModelVertex;
2210 break;
2211 case MESA_SHADER_TESS_CTRL:
2212 exec_model = SpvExecutionModelTessellationControl;
2213 break;
2214 case MESA_SHADER_TESS_EVAL:
2215 exec_model = SpvExecutionModelTessellationEvaluation;
2216 break;
2217 case MESA_SHADER_GEOMETRY:
2218 exec_model = SpvExecutionModelGeometry;
2219 break;
2220 case MESA_SHADER_FRAGMENT:
2221 exec_model = SpvExecutionModelFragment;
2222 break;
2223 case MESA_SHADER_COMPUTE:
2224 exec_model = SpvExecutionModelGLCompute;
2225 break;
2226 default:
2227 unreachable("invalid stage");
2228 }
2229
2230 SpvId type_void = spirv_builder_type_void(&ctx.builder);
2231 SpvId type_main = spirv_builder_type_function(&ctx.builder, type_void,
2232 NULL, 0);
2233 SpvId entry_point = spirv_builder_new_id(&ctx.builder);
2234 spirv_builder_emit_name(&ctx.builder, entry_point, "main");
2235
2236 ctx.vars = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
2237 _mesa_key_pointer_equal);
2238
2239 ctx.so_outputs = _mesa_hash_table_create(NULL, _mesa_hash_u32,
2240 _mesa_key_u32_equal);
2241
2242 nir_foreach_variable(var, &s->inputs)
2243 emit_input(&ctx, var);
2244
2245 nir_foreach_variable(var, &s->outputs)
2246 emit_output(&ctx, var);
2247
2248 if (so_info)
2249 emit_so_info(&ctx, util_last_bit64(s->info.outputs_written), so_info, local_so_info);
2250 nir_foreach_variable(var, &s->uniforms)
2251 emit_uniform(&ctx, var);
2252
2253 if (s->info.stage == MESA_SHADER_FRAGMENT) {
2254 spirv_builder_emit_exec_mode(&ctx.builder, entry_point,
2255 SpvExecutionModeOriginUpperLeft);
2256 if (s->info.outputs_written & BITFIELD64_BIT(FRAG_RESULT_DEPTH))
2257 spirv_builder_emit_exec_mode(&ctx.builder, entry_point,
2258 SpvExecutionModeDepthReplacing);
2259 }
2260
2261 if (so_info && so_info->num_outputs) {
2262 spirv_builder_emit_cap(&ctx.builder, SpvCapabilityTransformFeedback);
2263 spirv_builder_emit_exec_mode(&ctx.builder, entry_point,
2264 SpvExecutionModeXfb);
2265 }
2266
2267 spirv_builder_function(&ctx.builder, entry_point, type_void,
2268 SpvFunctionControlMaskNone,
2269 type_main);
2270
2271 nir_function_impl *entry = nir_shader_get_entrypoint(s);
2272 nir_metadata_require(entry, nir_metadata_block_index);
2273
2274 ctx.defs = (SpvId *)malloc(sizeof(SpvId) * entry->ssa_alloc);
2275 if (!ctx.defs)
2276 goto fail;
2277 ctx.num_defs = entry->ssa_alloc;
2278
2279 nir_index_local_regs(entry);
2280 ctx.regs = malloc(sizeof(SpvId) * entry->reg_alloc);
2281 if (!ctx.regs)
2282 goto fail;
2283 ctx.num_regs = entry->reg_alloc;
2284
2285 SpvId *block_ids = (SpvId *)malloc(sizeof(SpvId) * entry->num_blocks);
2286 if (!block_ids)
2287 goto fail;
2288
2289 for (int i = 0; i < entry->num_blocks; ++i)
2290 block_ids[i] = spirv_builder_new_id(&ctx.builder);
2291
2292 ctx.block_ids = block_ids;
2293 ctx.num_blocks = entry->num_blocks;
2294
2295 /* emit a block only for the variable declarations */
2296 start_block(&ctx, spirv_builder_new_id(&ctx.builder));
2297 foreach_list_typed(nir_register, reg, node, &entry->registers) {
2298 SpvId type = get_uvec_type(&ctx, reg->bit_size, reg->num_components);
2299 SpvId pointer_type = spirv_builder_type_pointer(&ctx.builder,
2300 SpvStorageClassFunction,
2301 type);
2302 SpvId var = spirv_builder_emit_var(&ctx.builder, pointer_type,
2303 SpvStorageClassFunction);
2304
2305 ctx.regs[reg->index] = var;
2306 }
2307
2308 emit_cf_list(&ctx, &entry->body);
2309
2310 free(ctx.defs);
2311
2312 if (so_info)
2313 emit_so_outputs(&ctx, so_info, local_so_info);
2314
2315 spirv_builder_return(&ctx.builder); // doesn't belong here, but whatevz
2316 spirv_builder_function_end(&ctx.builder);
2317
2318 spirv_builder_emit_entry_point(&ctx.builder, exec_model, entry_point,
2319 "main", ctx.entry_ifaces,
2320 ctx.num_entry_ifaces);
2321
2322 size_t num_words = spirv_builder_get_num_words(&ctx.builder);
2323
2324 ret = CALLOC_STRUCT(spirv_shader);
2325 if (!ret)
2326 goto fail;
2327
2328 ret->words = MALLOC(sizeof(uint32_t) * num_words);
2329 if (!ret->words)
2330 goto fail;
2331
2332 ret->num_words = spirv_builder_get_words(&ctx.builder, ret->words, num_words);
2333 assert(ret->num_words == num_words);
2334
2335 return ret;
2336
2337 fail:
2338
2339 if (ret)
2340 spirv_shader_delete(ret);
2341
2342 if (ctx.vars)
2343 _mesa_hash_table_destroy(ctx.vars, NULL);
2344
2345 if (ctx.so_outputs)
2346 _mesa_hash_table_destroy(ctx.so_outputs, NULL);
2347
2348 return NULL;
2349 }
2350
2351 void
2352 spirv_shader_delete(struct spirv_shader *s)
2353 {
2354 FREE(s->words);
2355 FREE(s);
2356 }