src/gallium/drivers/zink/nir_to_spirv/nir_to_spirv.c

   1 /*
   2  * Copyright 2018 Collabora Ltd.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * on the rights to use, copy, modify, merge, publish, distribute, sub
   8  * license, and/or sell copies of the Software, and to permit persons to whom
   9  * the Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  21  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  22  */
  23
  24 #include "nir_to_spirv.h"
  25 #include "spirv_builder.h"
  26
  27 #include "nir.h"
  28 #include "pipe/p_state.h"
  29 #include "util/u_memory.h"
  30
  31 struct ntv_context {
  32    struct spirv_builder builder;
  33
  34    SpvId GLSL_std_450;
  35
  36    gl_shader_stage stage;
  37    SpvId inputs[PIPE_MAX_SHADER_INPUTS][4];
  38    SpvId input_types[PIPE_MAX_SHADER_INPUTS][4];
  39    SpvId outputs[PIPE_MAX_SHADER_OUTPUTS][4];
  40    SpvId output_types[PIPE_MAX_SHADER_OUTPUTS][4];
  41
  42    SpvId ubos[128];
  43    size_t num_ubos;
  44    SpvId samplers[PIPE_MAX_SAMPLERS];
  45    size_t num_samplers;
  46    SpvId entry_ifaces[PIPE_MAX_SHADER_INPUTS * 4 + PIPE_MAX_SHADER_OUTPUTS * 4];
  47    size_t num_entry_ifaces;
  48
  49    SpvId *defs;
  50    size_t num_defs;
  51
  52    struct hash_table *vars;
  53 };
  54
  55 static SpvId
  56 get_fvec_constant(struct ntv_context *ctx, int bit_size, int num_components,
  57                   const float values[]);
  58
  59 static SpvId
  60 get_uvec_constant(struct ntv_context *ctx, int bit_size, int num_components,
  61                   const uint32_t values[]);
  62
  63 static SpvId
  64 emit_unop(struct ntv_context *ctx, SpvOp op, SpvId type, SpvId src);
  65
  66 static SpvId
  67 emit_binop(struct ntv_context *ctx, SpvOp op, SpvId type,
  68            SpvId src0, SpvId src1);
  69
  70 static SpvId
  71 emit_triop(struct ntv_context *ctx, SpvOp op, SpvId type,
  72            SpvId src0, SpvId src1, SpvId src2);
  73
  74 static SpvId
  75 get_bvec_type(struct ntv_context *ctx, int num_components)
  76 {
  77    SpvId bool_type = spirv_builder_type_bool(&ctx->builder);
  78    if (num_components > 1)
  79       return spirv_builder_type_vector(&ctx->builder, bool_type,
  80                                        num_components);
  81
  82    assert(num_components == 1);
  83    return bool_type;
  84 }
  85
  86 static SpvId
  87 get_fvec_type(struct ntv_context *ctx, unsigned bit_size, unsigned num_components)
  88 {
  89    assert(bit_size == 32); // only 32-bit floats supported so far
  90
  91    SpvId float_type = spirv_builder_type_float(&ctx->builder, bit_size);
  92    if (num_components > 1)
  93       return spirv_builder_type_vector(&ctx->builder, float_type,
  94                                        num_components);
  95
  96    assert(num_components == 1);
  97    return float_type;
  98 }
  99
 100 static SpvId
 101 get_ivec_type(struct ntv_context *ctx, unsigned bit_size, unsigned num_components)
 102 {
 103    assert(bit_size == 32); // only 32-bit ints supported so far
 104
 105    SpvId int_type = spirv_builder_type_int(&ctx->builder, bit_size);
 106    if (num_components > 1)
 107       return spirv_builder_type_vector(&ctx->builder, int_type,
 108                                        num_components);
 109
 110    assert(num_components == 1);
 111    return int_type;
 112 }
 113
 114 static SpvId
 115 get_uvec_type(struct ntv_context *ctx, unsigned bit_size, unsigned num_components)
 116 {
 117    assert(bit_size == 32); // only 32-bit uints supported so far
 118
 119    SpvId uint_type = spirv_builder_type_uint(&ctx->builder, bit_size);
 120    if (num_components > 1)
 121       return spirv_builder_type_vector(&ctx->builder, uint_type,
 122                                        num_components);
 123
 124    assert(num_components == 1);
 125    return uint_type;
 126 }
 127
 128 static SpvId
 129 get_dest_uvec_type(struct ntv_context *ctx, nir_dest *dest)
 130 {
 131    return get_uvec_type(ctx, nir_dest_bit_size(*dest),
 132                              nir_dest_num_components(*dest));
 133 }
 134
 135 static SpvId
 136 get_glsl_basetype(struct ntv_context *ctx, enum glsl_base_type type)
 137 {
 138    switch (type) {
 139    case GLSL_TYPE_FLOAT:
 140       return spirv_builder_type_float(&ctx->builder, 32);
 141
 142    case GLSL_TYPE_INT:
 143       return spirv_builder_type_int(&ctx->builder, 32);
 144
 145    case GLSL_TYPE_UINT:
 146       return spirv_builder_type_uint(&ctx->builder, 32);
 147    /* TODO: handle more types */
 148
 149    default:
 150       unreachable("unknown GLSL type");
 151    }
 152 }
 153
 154 static SpvId
 155 get_glsl_type(struct ntv_context *ctx, const struct glsl_type *type)
 156 {
 157    assert(type);
 158    if (glsl_type_is_scalar(type))
 159       return get_glsl_basetype(ctx, glsl_get_base_type(type));
 160
 161    if (glsl_type_is_vector(type))
 162       return spirv_builder_type_vector(&ctx->builder,
 163          get_glsl_basetype(ctx, glsl_get_base_type(type)),
 164          glsl_get_vector_elements(type));
 165
 166    unreachable("we shouldn't get here, I think...");
 167 }
 168
 169 static void
 170 emit_input(struct ntv_context *ctx, struct nir_variable *var)
 171 {
 172    SpvId vec_type = get_glsl_type(ctx, var->type);
 173    SpvId pointer_type = spirv_builder_type_pointer(&ctx->builder,
 174                                                    SpvStorageClassInput,
 175                                                    vec_type);
 176    SpvId var_id = spirv_builder_emit_var(&ctx->builder, pointer_type,
 177                                          SpvStorageClassInput);
 178
 179    if (var->name)
 180       spirv_builder_emit_name(&ctx->builder, var_id, var->name);
 181
 182    if (ctx->stage == MESA_SHADER_FRAGMENT) {
 183       switch (var->data.location) {
 184       case VARYING_SLOT_POS:
 185          spirv_builder_emit_builtin(&ctx->builder, var_id, SpvBuiltInFragCoord);
 186          break;
 187
 188       case VARYING_SLOT_PNTC:
 189          spirv_builder_emit_builtin(&ctx->builder, var_id, SpvBuiltInPointCoord);
 190          break;
 191
 192       default:
 193          spirv_builder_emit_location(&ctx->builder, var_id,
 194                                      var->data.driver_location);
 195          break;
 196       }
 197    } else {
 198       spirv_builder_emit_location(&ctx->builder, var_id,
 199                                   var->data.driver_location);
 200    }
 201
 202    if (var->data.location_frac)
 203       spirv_builder_emit_component(&ctx->builder, var_id,
 204                                    var->data.location_frac);
 205
 206    if (var->data.interpolation == INTERP_MODE_FLAT)
 207       spirv_builder_emit_decoration(&ctx->builder, var_id, SpvDecorationFlat);
 208
 209    assert(var->data.driver_location < PIPE_MAX_SHADER_INPUTS);
 210    assert(var->data.location_frac < 4);
 211    assert(ctx->inputs[var->data.driver_location][var->data.location_frac] == 0);
 212    ctx->inputs[var->data.driver_location][var->data.location_frac] = var_id;
 213    ctx->input_types[var->data.driver_location][var->data.location_frac] = vec_type;
 214
 215    assert(ctx->num_entry_ifaces < ARRAY_SIZE(ctx->entry_ifaces));
 216    ctx->entry_ifaces[ctx->num_entry_ifaces++] = var_id;
 217 }
 218
 219 static void
 220 emit_output(struct ntv_context *ctx, struct nir_variable *var)
 221 {
 222    SpvId vec_type = get_glsl_type(ctx, var->type);
 223    SpvId pointer_type = spirv_builder_type_pointer(&ctx->builder,
 224                                                    SpvStorageClassOutput,
 225                                                    vec_type);
 226    SpvId var_id = spirv_builder_emit_var(&ctx->builder, pointer_type,
 227                                          SpvStorageClassOutput);
 228    if (var->name)
 229       spirv_builder_emit_name(&ctx->builder, var_id, var->name);
 230
 231
 232    if (ctx->stage == MESA_SHADER_VERTEX) {
 233       switch (var->data.location) {
 234       case VARYING_SLOT_POS:
 235          spirv_builder_emit_builtin(&ctx->builder, var_id, SpvBuiltInPosition);
 236          break;
 237
 238       case VARYING_SLOT_PSIZ:
 239          spirv_builder_emit_builtin(&ctx->builder, var_id, SpvBuiltInPointSize);
 240          break;
 241
 242       default:
 243          spirv_builder_emit_location(&ctx->builder, var_id,
 244                                      var->data.driver_location - 1);
 245       }
 246    } else if (ctx->stage == MESA_SHADER_FRAGMENT) {
 247       switch (var->data.location) {
 248       case FRAG_RESULT_DEPTH:
 249          spirv_builder_emit_builtin(&ctx->builder, var_id, SpvBuiltInFragDepth);
 250          break;
 251
 252       default:
 253          spirv_builder_emit_location(&ctx->builder, var_id,
 254                                      var->data.driver_location);
 255       }
 256    }
 257
 258    if (var->data.location_frac)
 259       spirv_builder_emit_component(&ctx->builder, var_id,
 260                                    var->data.location_frac);
 261
 262    assert(var->data.driver_location < PIPE_MAX_SHADER_INPUTS);
 263    assert(var->data.location_frac < 4);
 264    assert(ctx->outputs[var->data.driver_location][var->data.location_frac] == 0);
 265    ctx->outputs[var->data.driver_location][var->data.location_frac] = var_id;
 266    ctx->output_types[var->data.driver_location][var->data.location_frac] = vec_type;
 267
 268    assert(ctx->num_entry_ifaces < ARRAY_SIZE(ctx->entry_ifaces));
 269    ctx->entry_ifaces[ctx->num_entry_ifaces++] = var_id;
 270 }
 271
 272 static SpvDim
 273 type_to_dim(enum glsl_sampler_dim gdim, bool *is_ms)
 274 {
 275    *is_ms = false;
 276    switch (gdim) {
 277    case GLSL_SAMPLER_DIM_1D:
 278       return SpvDim1D;
 279    case GLSL_SAMPLER_DIM_2D:
 280       return SpvDim2D;
 281    case GLSL_SAMPLER_DIM_RECT:
 282       return SpvDimRect;
 283    case GLSL_SAMPLER_DIM_CUBE:
 284       return SpvDimCube;
 285    case GLSL_SAMPLER_DIM_3D:
 286       return SpvDim3D;
 287    case GLSL_SAMPLER_DIM_MS:
 288       *is_ms = true;
 289       return SpvDim2D;
 290    default:
 291       fprintf(stderr, "unknown sampler type %d\n", gdim);
 292       break;
 293    }
 294    return SpvDim2D;
 295 }
 296
 297 static void
 298 emit_sampler(struct ntv_context *ctx, struct nir_variable *var)
 299 {
 300    bool is_ms;
 301    SpvDim dimension = type_to_dim(glsl_get_sampler_dim(var->type), &is_ms);
 302    SpvId float_type = spirv_builder_type_float(&ctx->builder, 32);
 303    SpvId image_type = spirv_builder_type_image(&ctx->builder, float_type,
 304                             dimension, false, glsl_sampler_type_is_array(var->type), is_ms, 1,
 305                             SpvImageFormatUnknown);
 306
 307    SpvId sampled_type = spirv_builder_type_sampled_image(&ctx->builder,
 308                                                          image_type);
 309    SpvId pointer_type = spirv_builder_type_pointer(&ctx->builder,
 310                                                    SpvStorageClassUniformConstant,
 311                                                    sampled_type);
 312    SpvId var_id = spirv_builder_emit_var(&ctx->builder, pointer_type,
 313                                          SpvStorageClassUniformConstant);
 314
 315    if (var->name)
 316       spirv_builder_emit_name(&ctx->builder, var_id, var->name);
 317
 318    assert(ctx->num_samplers < ARRAY_SIZE(ctx->samplers));
 319    ctx->samplers[ctx->num_samplers++] = var_id;
 320
 321    spirv_builder_emit_descriptor_set(&ctx->builder, var_id,
 322                                      var->data.descriptor_set);
 323    spirv_builder_emit_binding(&ctx->builder, var_id, var->data.binding);
 324 }
 325
 326 static void
 327 emit_ubo(struct ntv_context *ctx, struct nir_variable *var)
 328 {
 329    uint32_t size = glsl_count_attribute_slots(var->type, false);
 330    SpvId vec4_type = get_uvec_type(ctx, 32, 4);
 331    SpvId array_length = spirv_builder_const_uint(&ctx->builder, 32, size);
 332    SpvId array_type = spirv_builder_type_array(&ctx->builder, vec4_type,
 333                                                array_length);
 334    spirv_builder_emit_array_stride(&ctx->builder, array_type, 16);
 335
 336    // wrap UBO-array in a struct
 337    SpvId struct_type = spirv_builder_type_struct(&ctx->builder, &array_type, 1);
 338    if (var->name) {
 339       char struct_name[100];
 340       snprintf(struct_name, sizeof(struct_name), "struct_%s", var->name);
 341       spirv_builder_emit_name(&ctx->builder, struct_type, struct_name);
 342    }
 343
 344    spirv_builder_emit_decoration(&ctx->builder, struct_type,
 345                                  SpvDecorationBlock);
 346    spirv_builder_emit_member_offset(&ctx->builder, struct_type, 0, 0);
 347
 348
 349    SpvId pointer_type = spirv_builder_type_pointer(&ctx->builder,
 350                                                    SpvStorageClassUniform,
 351                                                    struct_type);
 352
 353    SpvId var_id = spirv_builder_emit_var(&ctx->builder, pointer_type,
 354                                          SpvStorageClassUniform);
 355    if (var->name)
 356       spirv_builder_emit_name(&ctx->builder, var_id, var->name);
 357
 358    assert(ctx->num_ubos < ARRAY_SIZE(ctx->ubos));
 359    ctx->ubos[ctx->num_ubos++] = var_id;
 360
 361    spirv_builder_emit_descriptor_set(&ctx->builder, var_id,
 362                                      var->data.descriptor_set);
 363    spirv_builder_emit_binding(&ctx->builder, var_id, var->data.binding);
 364 }
 365
 366 static void
 367 emit_uniform(struct ntv_context *ctx, struct nir_variable *var)
 368 {
 369    if (glsl_type_is_sampler(var->type))
 370       emit_sampler(ctx, var);
 371    else if (var->interface_type)
 372       emit_ubo(ctx, var);
 373 }
 374
 375 static SpvId
 376 get_src_uint_ssa(struct ntv_context *ctx, const nir_ssa_def *ssa)
 377 {
 378    assert(ssa->index < ctx->num_defs);
 379    assert(ctx->defs[ssa->index] != 0);
 380    return ctx->defs[ssa->index];
 381 }
 382
 383 static SpvId
 384 get_var_from_reg(struct ntv_context *ctx, nir_register *reg)
 385 {
 386    struct hash_entry *he = _mesa_hash_table_search(ctx->vars, reg);
 387    if (!he) {
 388       SpvId type = get_uvec_type(ctx, reg->bit_size, reg->num_components);
 389       SpvId pointer_type = spirv_builder_type_pointer(&ctx->builder,
 390                                                       SpvStorageClassFunction,
 391                                                       type);
 392
 393       SpvId var = spirv_builder_emit_var(&ctx->builder, pointer_type,
 394                                          SpvStorageClassFunction);
 395
 396       he = _mesa_hash_table_insert(ctx->vars, reg, (void *)(intptr_t)var);
 397    }
 398    return (SpvId)(intptr_t)he->data;
 399 }
 400
 401 static SpvId
 402 get_src_uint_reg(struct ntv_context *ctx, const nir_reg_src *reg)
 403 {
 404    assert(reg->reg);
 405    assert(!reg->indirect);
 406    assert(!reg->base_offset);
 407
 408    SpvId var = get_var_from_reg(ctx, reg->reg);
 409    SpvId type = get_uvec_type(ctx, reg->reg->bit_size, reg->reg->num_components);
 410    return spirv_builder_emit_load(&ctx->builder, type, var);
 411 }
 412
 413 static SpvId
 414 get_src_uint(struct ntv_context *ctx, nir_src *src)
 415 {
 416    if (src->is_ssa)
 417       return get_src_uint_ssa(ctx, src->ssa);
 418    else
 419       return get_src_uint_reg(ctx, &src->reg);
 420 }
 421
 422 static SpvId
 423 get_alu_src_uint(struct ntv_context *ctx, nir_alu_instr *alu, unsigned src)
 424 {
 425    assert(!alu->src[src].negate);
 426    assert(!alu->src[src].abs);
 427
 428    SpvId def = get_src_uint(ctx, &alu->src[src].src);
 429
 430    unsigned used_channels = 0;
 431    bool need_swizzle = false;
 432    for (unsigned i = 0; i < NIR_MAX_VEC_COMPONENTS; i++) {
 433       if (!nir_alu_instr_channel_used(alu, src, i))
 434          continue;
 435
 436       used_channels++;
 437
 438       if (alu->src[src].swizzle[i] != i)
 439          need_swizzle = true;
 440    }
 441    assert(used_channels != 0);
 442
 443    unsigned live_channels = nir_src_num_components(alu->src[src].src);
 444    if (used_channels != live_channels)
 445       need_swizzle = true;
 446
 447    if (!need_swizzle)
 448       return def;
 449
 450    int bit_size = nir_src_bit_size(alu->src[src].src);
 451
 452    SpvId uint_type = spirv_builder_type_uint(&ctx->builder, bit_size);
 453    if (used_channels == 1) {
 454       uint32_t indices[] =  { alu->src[src].swizzle[0] };
 455       return spirv_builder_emit_composite_extract(&ctx->builder, uint_type,
 456                                                   def, indices,
 457                                                   ARRAY_SIZE(indices));
 458    } else if (live_channels == 1) {
 459       SpvId uvec_type = spirv_builder_type_vector(&ctx->builder, uint_type,
 460                                                   used_channels);
 461
 462       SpvId constituents[NIR_MAX_VEC_COMPONENTS];
 463       for (unsigned i = 0; i < used_channels; ++i)
 464         constituents[i] = def;
 465
 466       return spirv_builder_emit_composite_construct(&ctx->builder, uvec_type,
 467                                                     constituents,
 468                                                     used_channels);
 469    } else {
 470       SpvId uvec_type = spirv_builder_type_vector(&ctx->builder, uint_type,
 471                                                   used_channels);
 472
 473       uint32_t components[NIR_MAX_VEC_COMPONENTS];
 474       size_t num_components = 0;
 475       for (unsigned i = 0; i < NIR_MAX_VEC_COMPONENTS; i++) {
 476          if (!nir_alu_instr_channel_used(alu, src, i))
 477             continue;
 478
 479          components[num_components++] = alu->src[src].swizzle[i];
 480       }
 481
 482       return spirv_builder_emit_vector_shuffle(&ctx->builder, uvec_type,
 483                                         def, def, components, num_components);
 484    }
 485 }
 486
 487 static void
 488 store_ssa_def_uint(struct ntv_context *ctx, nir_ssa_def *ssa, SpvId result)
 489 {
 490    assert(result != 0);
 491    assert(ssa->index < ctx->num_defs);
 492    ctx->defs[ssa->index] = result;
 493 }
 494
 495 static SpvId
 496 bvec_to_uvec(struct ntv_context *ctx, SpvId value, unsigned num_components)
 497 {
 498    SpvId otype = get_uvec_type(ctx, 32, num_components);
 499    uint32_t zeros[4] = { 0, 0, 0, 0 };
 500    uint32_t ones[4] = { 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff };
 501    SpvId zero = get_uvec_constant(ctx, 32, num_components, zeros);
 502    SpvId one = get_uvec_constant(ctx, 32, num_components, ones);
 503    return emit_triop(ctx, SpvOpSelect, otype, value, one, zero);
 504 }
 505
 506 static SpvId
 507 uvec_to_bvec(struct ntv_context *ctx, SpvId value, unsigned num_components)
 508 {
 509    SpvId type = get_bvec_type(ctx, num_components);
 510
 511    uint32_t zeros[NIR_MAX_VEC_COMPONENTS] = { 0 };
 512    SpvId zero = get_uvec_constant(ctx, 32, num_components, zeros);
 513
 514    return emit_binop(ctx, SpvOpINotEqual, type, value, zero);
 515 }
 516
 517 static SpvId
 518 bitcast_to_uvec(struct ntv_context *ctx, SpvId value, unsigned bit_size,
 519                 unsigned num_components)
 520 {
 521    SpvId type = get_uvec_type(ctx, bit_size, num_components);
 522    return emit_unop(ctx, SpvOpBitcast, type, value);
 523 }
 524
 525 static SpvId
 526 bitcast_to_ivec(struct ntv_context *ctx, SpvId value, unsigned bit_size,
 527                 unsigned num_components)
 528 {
 529    SpvId type = get_ivec_type(ctx, bit_size, num_components);
 530    return emit_unop(ctx, SpvOpBitcast, type, value);
 531 }
 532
 533 static SpvId
 534 bitcast_to_fvec(struct ntv_context *ctx, SpvId value, unsigned bit_size,
 535                unsigned num_components)
 536 {
 537    SpvId type = get_fvec_type(ctx, bit_size, num_components);
 538    return emit_unop(ctx, SpvOpBitcast, type, value);
 539 }
 540
 541 static void
 542 store_reg_def(struct ntv_context *ctx, nir_reg_dest *reg, SpvId result)
 543 {
 544    SpvId var = get_var_from_reg(ctx, reg->reg);
 545    assert(var);
 546    spirv_builder_emit_store(&ctx->builder, var, result);
 547 }
 548
 549 static void
 550 store_dest_uint(struct ntv_context *ctx, nir_dest *dest, SpvId result)
 551 {
 552    if (dest->is_ssa)
 553       store_ssa_def_uint(ctx, &dest->ssa, result);
 554    else
 555       store_reg_def(ctx, &dest->reg, result);
 556 }
 557
 558 static void
 559 store_dest(struct ntv_context *ctx, nir_dest *dest, SpvId result, nir_alu_type type)
 560 {
 561    unsigned num_components = nir_dest_num_components(*dest);
 562    unsigned bit_size = nir_dest_bit_size(*dest);
 563
 564    switch (nir_alu_type_get_base_type(type)) {
 565    case nir_type_bool:
 566       assert(bit_size == 1);
 567       result = bvec_to_uvec(ctx, result, num_components);
 568       break;
 569
 570    case nir_type_uint:
 571       break; /* nothing to do! */
 572
 573    case nir_type_int:
 574    case nir_type_float:
 575       result = bitcast_to_uvec(ctx, result, bit_size, num_components);
 576       break;
 577
 578    default:
 579       unreachable("unsupported nir_alu_type");
 580    }
 581
 582    store_dest_uint(ctx, dest, result);
 583 }
 584
 585 static SpvId
 586 emit_unop(struct ntv_context *ctx, SpvOp op, SpvId type, SpvId src)
 587 {
 588    return spirv_builder_emit_unop(&ctx->builder, op, type, src);
 589 }
 590
 591 static SpvId
 592 emit_binop(struct ntv_context *ctx, SpvOp op, SpvId type,
 593            SpvId src0, SpvId src1)
 594 {
 595    return spirv_builder_emit_binop(&ctx->builder, op, type, src0, src1);
 596 }
 597
 598 static SpvId
 599 emit_triop(struct ntv_context *ctx, SpvOp op, SpvId type,
 600            SpvId src0, SpvId src1, SpvId src2)
 601 {
 602    return spirv_builder_emit_triop(&ctx->builder, op, type, src0, src1, src2);
 603 }
 604
 605 static SpvId
 606 emit_builtin_unop(struct ntv_context *ctx, enum GLSLstd450 op, SpvId type,
 607                   SpvId src)
 608 {
 609    SpvId args[] = { src };
 610    return spirv_builder_emit_ext_inst(&ctx->builder, type, ctx->GLSL_std_450,
 611                                       op, args, ARRAY_SIZE(args));
 612 }
 613
 614 static SpvId
 615 emit_builtin_binop(struct ntv_context *ctx, enum GLSLstd450 op, SpvId type,
 616                    SpvId src0, SpvId src1)
 617 {
 618    SpvId args[] = { src0, src1 };
 619    return spirv_builder_emit_ext_inst(&ctx->builder, type, ctx->GLSL_std_450,
 620                                       op, args, ARRAY_SIZE(args));
 621 }
 622
 623 static SpvId
 624 get_fvec_constant(struct ntv_context *ctx, int bit_size, int num_components,
 625                   const float values[])
 626 {
 627    assert(bit_size == 32);
 628
 629    if (num_components > 1) {
 630       SpvId components[num_components];
 631       for (int i = 0; i < num_components; i++)
 632          components[i] = spirv_builder_const_float(&ctx->builder, bit_size,
 633                                                    values[i]);
 634
 635       SpvId type = get_fvec_type(ctx, bit_size, num_components);
 636       return spirv_builder_const_composite(&ctx->builder, type, components,
 637                                            num_components);
 638    }
 639
 640    assert(num_components == 1);
 641    return spirv_builder_const_float(&ctx->builder, bit_size, values[0]);
 642 }
 643
 644 static SpvId
 645 get_uvec_constant(struct ntv_context *ctx, int bit_size, int num_components,
 646                   const uint32_t values[])
 647 {
 648    assert(bit_size == 32);
 649
 650    if (num_components > 1) {
 651       SpvId components[num_components];
 652       for (int i = 0; i < num_components; i++)
 653          components[i] = spirv_builder_const_uint(&ctx->builder, bit_size,
 654                                                   values[i]);
 655
 656       SpvId type = get_uvec_type(ctx, bit_size, num_components);
 657       return spirv_builder_const_composite(&ctx->builder, type, components,
 658                                            num_components);
 659    }
 660
 661    assert(num_components == 1);
 662    return spirv_builder_const_uint(&ctx->builder, bit_size, values[0]);
 663 }
 664
 665 static inline unsigned
 666 alu_instr_src_components(const nir_alu_instr *instr, unsigned src)
 667 {
 668    if (nir_op_infos[instr->op].input_sizes[src] > 0)
 669       return nir_op_infos[instr->op].input_sizes[src];
 670
 671    if (instr->dest.dest.is_ssa)
 672       return instr->dest.dest.ssa.num_components;
 673    else
 674       return instr->dest.dest.reg.reg->num_components;
 675 }
 676
 677 static SpvId
 678 get_alu_src(struct ntv_context *ctx, nir_alu_instr *alu, unsigned src)
 679 {
 680    SpvId uint_value = get_alu_src_uint(ctx, alu, src);
 681
 682    unsigned num_components = alu_instr_src_components(alu, src);
 683    unsigned bit_size = nir_src_bit_size(alu->src[src].src);
 684    nir_alu_type type = nir_op_infos[alu->op].input_types[src];
 685
 686    switch (nir_alu_type_get_base_type(type)) {
 687    case nir_type_bool:
 688       assert(bit_size == 1);
 689       return uvec_to_bvec(ctx, uint_value, num_components);
 690
 691    case nir_type_int:
 692       return bitcast_to_ivec(ctx, uint_value, bit_size, num_components);
 693
 694    case nir_type_uint:
 695       return uint_value;
 696
 697    case nir_type_float:
 698       return bitcast_to_fvec(ctx, uint_value, bit_size, num_components);
 699
 700    default:
 701       unreachable("unknown nir_alu_type");
 702    }
 703 }
 704
 705 static void
 706 store_alu_result(struct ntv_context *ctx, nir_alu_instr *alu, SpvId result)
 707 {
 708    assert(!alu->dest.saturate);
 709    return store_dest(ctx, &alu->dest.dest, result, nir_op_infos[alu->op].output_type);
 710 }
 711
 712 static SpvId
 713 get_dest_type(struct ntv_context *ctx, nir_dest *dest, nir_alu_type type)
 714 {
 715    unsigned num_components = nir_dest_num_components(*dest);
 716    unsigned bit_size = nir_dest_bit_size(*dest);
 717
 718    switch (nir_alu_type_get_base_type(type)) {
 719    case nir_type_bool:
 720       return get_bvec_type(ctx, num_components);
 721
 722    case nir_type_int:
 723       return get_ivec_type(ctx, bit_size, num_components);
 724
 725    case nir_type_uint:
 726       return get_uvec_type(ctx, bit_size, num_components);
 727
 728    case nir_type_float:
 729       return get_fvec_type(ctx, bit_size, num_components);
 730
 731    default:
 732       unreachable("unsupported nir_alu_type");
 733    }
 734 }
 735
 736 static void
 737 emit_alu(struct ntv_context *ctx, nir_alu_instr *alu)
 738 {
 739    SpvId src[nir_op_infos[alu->op].num_inputs];
 740    for (unsigned i = 0; i < nir_op_infos[alu->op].num_inputs; i++)
 741       src[i] = get_alu_src(ctx, alu, i);
 742
 743    SpvId dest_type = get_dest_type(ctx, &alu->dest.dest,
 744                                    nir_op_infos[alu->op].output_type);
 745    unsigned bit_size = nir_dest_bit_size(alu->dest.dest);
 746    unsigned num_components = nir_dest_num_components(alu->dest.dest);
 747
 748    SpvId result = 0;
 749    switch (alu->op) {
 750    case nir_op_mov:
 751       assert(nir_op_infos[alu->op].num_inputs == 1);
 752       result = src[0];
 753       break;
 754
 755 #define UNOP(nir_op, spirv_op) \
 756    case nir_op: \
 757       assert(nir_op_infos[alu->op].num_inputs == 1); \
 758       result = emit_unop(ctx, spirv_op, dest_type, src[0]); \
 759       break;
 760
 761 #define BUILTIN_UNOP(nir_op, spirv_op) \
 762    case nir_op: \
 763       assert(nir_op_infos[alu->op].num_inputs == 1); \
 764       result = emit_builtin_unop(ctx, spirv_op, dest_type, src[0]); \
 765       break;
 766
 767    UNOP(nir_op_fneg, SpvOpFNegate)
 768    UNOP(nir_op_fddx, SpvOpDPdx)
 769    UNOP(nir_op_fddy, SpvOpDPdy)
 770
 771    BUILTIN_UNOP(nir_op_fabs, GLSLstd450FAbs)
 772    BUILTIN_UNOP(nir_op_fsqrt, GLSLstd450Sqrt)
 773    BUILTIN_UNOP(nir_op_frsq, GLSLstd450InverseSqrt)
 774    BUILTIN_UNOP(nir_op_flog2, GLSLstd450Log2)
 775    BUILTIN_UNOP(nir_op_fexp2, GLSLstd450Exp2)
 776    BUILTIN_UNOP(nir_op_ffract, GLSLstd450Fract)
 777    BUILTIN_UNOP(nir_op_ffloor, GLSLstd450Floor)
 778    BUILTIN_UNOP(nir_op_fceil, GLSLstd450Ceil)
 779    BUILTIN_UNOP(nir_op_ftrunc, GLSLstd450Trunc)
 780    BUILTIN_UNOP(nir_op_fround_even, GLSLstd450RoundEven)
 781    BUILTIN_UNOP(nir_op_fsign, GLSLstd450FSign)
 782    BUILTIN_UNOP(nir_op_fsin, GLSLstd450Sin)
 783    BUILTIN_UNOP(nir_op_fcos, GLSLstd450Cos)
 784
 785    case nir_op_frcp: {
 786       assert(nir_op_infos[alu->op].num_inputs == 1);
 787       float one[4] = { 1, 1, 1, 1 };
 788       src[1] = src[0];
 789       src[0] = get_fvec_constant(ctx, bit_size, num_components, one);
 790       result = emit_binop(ctx, SpvOpFDiv, dest_type, src[0], src[1]);
 791       }
 792       break;
 793
 794 #undef UNOP
 795 #undef BUILTIN_UNOP
 796
 797 #define BINOP(nir_op, spirv_op) \
 798    case nir_op: \
 799       assert(nir_op_infos[alu->op].num_inputs == 2); \
 800       result = emit_binop(ctx, spirv_op, dest_type, src[0], src[1]); \
 801       break;
 802
 803 #define BUILTIN_BINOP(nir_op, spirv_op) \
 804    case nir_op: \
 805       assert(nir_op_infos[alu->op].num_inputs == 2); \
 806       result = emit_builtin_binop(ctx, spirv_op, dest_type, src[0], src[1]); \
 807       break;
 808
 809    BINOP(nir_op_iadd, SpvOpIAdd)
 810    BINOP(nir_op_isub, SpvOpISub)
 811    BINOP(nir_op_imul, SpvOpIMul)
 812    BINOP(nir_op_fadd, SpvOpFAdd)
 813    BINOP(nir_op_fsub, SpvOpFSub)
 814    BINOP(nir_op_fmul, SpvOpFMul)
 815    BINOP(nir_op_flt, SpvOpFUnordLessThan)
 816    BINOP(nir_op_fge, SpvOpFUnordGreaterThanEqual)
 817
 818    BUILTIN_BINOP(nir_op_fmin, GLSLstd450FMin)
 819    BUILTIN_BINOP(nir_op_fmax, GLSLstd450FMax)
 820
 821 #undef BINOP
 822 #undef BUILTIN_BINOP
 823
 824    case nir_op_fdot2:
 825    case nir_op_fdot3:
 826    case nir_op_fdot4:
 827       assert(nir_op_infos[alu->op].num_inputs == 2);
 828       result = emit_binop(ctx, SpvOpDot, dest_type, src[0], src[1]);
 829       break;
 830
 831    case nir_op_seq:
 832    case nir_op_sne:
 833    case nir_op_slt:
 834    case nir_op_sge: {
 835       assert(nir_op_infos[alu->op].num_inputs == 2);
 836       int num_components = nir_dest_num_components(alu->dest.dest);
 837       SpvId bool_type = get_bvec_type(ctx, num_components);
 838
 839       SpvId zero = spirv_builder_const_float(&ctx->builder, 32, 0.0f);
 840       SpvId one = spirv_builder_const_float(&ctx->builder, 32, 1.0f);
 841       if (num_components > 1) {
 842          SpvId zero_comps[num_components], one_comps[num_components];
 843          for (int i = 0; i < num_components; i++) {
 844             zero_comps[i] = zero;
 845             one_comps[i] = one;
 846          }
 847
 848          zero = spirv_builder_const_composite(&ctx->builder, dest_type,
 849                                               zero_comps, num_components);
 850          one = spirv_builder_const_composite(&ctx->builder, dest_type,
 851                                              one_comps, num_components);
 852       }
 853
 854       SpvOp op;
 855       switch (alu->op) {
 856       case nir_op_seq: op = SpvOpFOrdEqual; break;
 857       case nir_op_sne: op = SpvOpFOrdNotEqual; break;
 858       case nir_op_slt: op = SpvOpFOrdLessThan; break;
 859       case nir_op_sge: op = SpvOpFOrdGreaterThanEqual; break;
 860       default: unreachable("unexpected op");
 861       }
 862
 863       result = emit_binop(ctx, op, bool_type, src[0], src[1]);
 864       result = emit_triop(ctx, SpvOpSelect, dest_type, result, one, zero);
 865       }
 866       break;
 867
 868    case nir_op_fcsel: {
 869       assert(nir_op_infos[alu->op].num_inputs == 3);
 870       int num_components = nir_dest_num_components(alu->dest.dest);
 871       SpvId bool_type = get_bvec_type(ctx, num_components);
 872
 873       float zero[4] = { 0, 0, 0, 0 };
 874       SpvId cmp = get_fvec_constant(ctx, nir_src_bit_size(alu->src[0].src),
 875                                          num_components, zero);
 876
 877       result = emit_binop(ctx, SpvOpFOrdGreaterThan, bool_type, src[0], cmp);
 878       result = emit_triop(ctx, SpvOpSelect, dest_type, result, src[1], src[2]);
 879       }
 880       break;
 881
 882    case nir_op_vec2:
 883    case nir_op_vec3:
 884    case nir_op_vec4: {
 885       int num_inputs = nir_op_infos[alu->op].num_inputs;
 886       assert(2 <= num_inputs && num_inputs <= 4);
 887       result = spirv_builder_emit_composite_construct(&ctx->builder, dest_type,
 888                                                       src, num_inputs);
 889    }
 890    break;
 891
 892    default:
 893       fprintf(stderr, "emit_alu: not implemented (%s)\n",
 894               nir_op_infos[alu->op].name);
 895
 896       unreachable("unsupported opcode");
 897       return;
 898    }
 899
 900    store_alu_result(ctx, alu, result);
 901 }
 902
 903 static void
 904 emit_load_const(struct ntv_context *ctx, nir_load_const_instr *load_const)
 905 {
 906    uint32_t values[NIR_MAX_VEC_COMPONENTS];
 907    for (int i = 0; i < load_const->def.num_components; ++i)
 908       values[i] = load_const->value[i].u32;
 909
 910    SpvId constant = get_uvec_constant(ctx, load_const->def.bit_size,
 911                                            load_const->def.num_components,
 912                                            values);
 913    store_ssa_def_uint(ctx, &load_const->def, constant);
 914 }
 915
 916 static void
 917 emit_load_input(struct ntv_context *ctx, nir_intrinsic_instr *intr)
 918 {
 919    nir_const_value *const_offset = nir_src_as_const_value(intr->src[0]);
 920    if (const_offset) {
 921       int driver_location = (int)nir_intrinsic_base(intr) + const_offset->u32;
 922       assert(driver_location < PIPE_MAX_SHADER_INPUTS);
 923       int location_frac = nir_intrinsic_component(intr);
 924       assert(location_frac < 4);
 925
 926       SpvId ptr = ctx->inputs[driver_location][location_frac];
 927       SpvId type = ctx->input_types[driver_location][location_frac];
 928       assert(ptr && type);
 929
 930       SpvId result = spirv_builder_emit_load(&ctx->builder, type, ptr);
 931
 932       unsigned num_components = nir_dest_num_components(intr->dest);
 933       unsigned bit_size = nir_dest_bit_size(intr->dest);
 934       result = bitcast_to_uvec(ctx, result, bit_size, num_components);
 935
 936       store_dest_uint(ctx, &intr->dest, result);
 937    } else
 938       unreachable("input-addressing not yet supported");
 939 }
 940
 941 static void
 942 emit_load_ubo(struct ntv_context *ctx, nir_intrinsic_instr *intr)
 943 {
 944    nir_const_value *const_block_index = nir_src_as_const_value(intr->src[0]);
 945    assert(const_block_index); // no dynamic indexing for now
 946    assert(const_block_index->u32 == 0); // we only support the default UBO for now
 947
 948    nir_const_value *const_offset = nir_src_as_const_value(intr->src[1]);
 949    if (const_offset) {
 950       SpvId uvec4_type = get_uvec_type(ctx, 32, 4);
 951       SpvId pointer_type = spirv_builder_type_pointer(&ctx->builder,
 952                                                       SpvStorageClassUniform,
 953                                                       uvec4_type);
 954
 955       unsigned idx = const_offset->u32;
 956       SpvId member = spirv_builder_const_uint(&ctx->builder, 32, 0);
 957       SpvId offset = spirv_builder_const_uint(&ctx->builder, 32, idx);
 958       SpvId offsets[] = { member, offset };
 959       SpvId ptr = spirv_builder_emit_access_chain(&ctx->builder, pointer_type,
 960                                                   ctx->ubos[0], offsets,
 961                                                   ARRAY_SIZE(offsets));
 962       SpvId result = spirv_builder_emit_load(&ctx->builder, uvec4_type, ptr);
 963
 964       SpvId type = get_dest_uvec_type(ctx, &intr->dest);
 965       unsigned num_components = nir_dest_num_components(intr->dest);
 966       if (num_components == 1) {
 967          uint32_t components[] = { 0 };
 968          result = spirv_builder_emit_composite_extract(&ctx->builder,
 969                                                        type,
 970                                                        result, components,
 971                                                        1);
 972       } else if (num_components < 4) {
 973          SpvId constituents[num_components];
 974          SpvId uint_type = spirv_builder_type_uint(&ctx->builder, 32);
 975          for (uint32_t i = 0; i < num_components; ++i)
 976             constituents[i] = spirv_builder_emit_composite_extract(&ctx->builder,
 977                                                                    uint_type,
 978                                                                    result, &i,
 979                                                                    1);
 980
 981          result = spirv_builder_emit_composite_construct(&ctx->builder,
 982                                                          type,
 983                                                          constituents,
 984                                                          num_components);
 985       }
 986
 987       store_dest_uint(ctx, &intr->dest, result);
 988    } else
 989       unreachable("uniform-addressing not yet supported");
 990 }
 991
 992 static void
 993 emit_store_output(struct ntv_context *ctx, nir_intrinsic_instr *intr)
 994 {
 995    nir_const_value *const_offset = nir_src_as_const_value(intr->src[1]);
 996    if (const_offset) {
 997       int driver_location = (int)nir_intrinsic_base(intr) + const_offset->u32;
 998       assert(driver_location < PIPE_MAX_SHADER_OUTPUTS);
 999       int location_frac = nir_intrinsic_component(intr);
1000       assert(location_frac < 4);
1001
1002       SpvId ptr = ctx->outputs[driver_location][location_frac];
1003       assert(ptr > 0);
1004
1005       SpvId src = get_src_uint(ctx, &intr->src[0]);
1006       SpvId spirv_type = ctx->output_types[driver_location][location_frac];
1007       SpvId result = emit_unop(ctx, SpvOpBitcast, spirv_type, src);
1008       spirv_builder_emit_store(&ctx->builder, ptr, result);
1009    } else
1010       unreachable("output-addressing not yet supported");
1011 }
1012
1013 static void
1014 emit_intrinsic(struct ntv_context *ctx, nir_intrinsic_instr *intr)
1015 {
1016    switch (intr->intrinsic) {
1017    case nir_intrinsic_load_input:
1018       emit_load_input(ctx, intr);
1019       break;
1020
1021    case nir_intrinsic_load_ubo:
1022       emit_load_ubo(ctx, intr);
1023       break;
1024
1025    case nir_intrinsic_store_output:
1026       emit_store_output(ctx, intr);
1027       break;
1028
1029    default:
1030       fprintf(stderr, "emit_intrinsic: not implemented (%s)\n",
1031               nir_intrinsic_infos[intr->intrinsic].name);
1032       unreachable("unsupported intrinsic");
1033    }
1034 }
1035
1036 static void
1037 emit_undef(struct ntv_context *ctx, nir_ssa_undef_instr *undef)
1038 {
1039    SpvId type = get_fvec_type(ctx, undef->def.bit_size,
1040                               undef->def.num_components);
1041
1042    store_ssa_def_uint(ctx, &undef->def,
1043                       spirv_builder_emit_undef(&ctx->builder, type));
1044 }
1045
1046 static SpvId
1047 get_src_float(struct ntv_context *ctx, nir_src *src)
1048 {
1049    SpvId def = get_src_uint(ctx, src);
1050    unsigned num_components = nir_src_num_components(*src);
1051    unsigned bit_size = nir_src_bit_size(*src);
1052    return bitcast_to_fvec(ctx, def, bit_size, num_components);
1053 }
1054
1055 static void
1056 emit_tex(struct ntv_context *ctx, nir_tex_instr *tex)
1057 {
1058    assert(tex->op == nir_texop_tex);
1059    assert(nir_alu_type_get_base_type(tex->dest_type) == nir_type_float);
1060    assert(tex->texture_index == tex->sampler_index);
1061
1062    bool has_proj = false;
1063    SpvId coord = 0, proj;
1064    unsigned coord_components;
1065    for (unsigned i = 0; i < tex->num_srcs; i++) {
1066       switch (tex->src[i].src_type) {
1067       case nir_tex_src_coord:
1068          coord = get_src_float(ctx, &tex->src[i].src);
1069          coord_components = nir_src_num_components(tex->src[i].src);
1070          break;
1071
1072       case nir_tex_src_projector:
1073          has_proj = true;
1074          proj = get_src_float(ctx, &tex->src[i].src);
1075          assert(nir_src_num_components(tex->src[i].src) == 1);
1076          break;
1077
1078       default:
1079          fprintf(stderr, "texture source: %d\n", tex->src[i].src_type);
1080          unreachable("unknown texture source");
1081       }
1082    }
1083
1084    bool is_ms;
1085    SpvDim dimension = type_to_dim(tex->sampler_dim, &is_ms);
1086    SpvId float_type = spirv_builder_type_float(&ctx->builder, 32);
1087    SpvId image_type = spirv_builder_type_image(&ctx->builder, float_type,
1088                             dimension, false, tex->is_array, is_ms, 1,
1089                             SpvImageFormatUnknown);
1090    SpvId sampled_type = spirv_builder_type_sampled_image(&ctx->builder,
1091                                                          image_type);
1092
1093    assert(tex->texture_index < ctx->num_samplers);
1094    SpvId load = spirv_builder_emit_load(&ctx->builder, sampled_type,
1095                                         ctx->samplers[tex->texture_index]);
1096
1097    SpvId dest_type = get_dest_type(ctx, &tex->dest, tex->dest_type);
1098
1099    SpvId result;
1100    if (has_proj) {
1101       SpvId constituents[coord_components + 1];
1102       SpvId float_type = spirv_builder_type_float(&ctx->builder, 32);
1103       for (uint32_t i = 0; i < coord_components; ++i)
1104          constituents[i] = spirv_builder_emit_composite_extract(&ctx->builder,
1105                                               float_type,
1106                                               coord,
1107                                               &i, 1);
1108
1109       constituents[coord_components++] = proj;
1110
1111       SpvId vec_type = get_fvec_type(ctx, 32, coord_components);
1112       SpvId merged = spirv_builder_emit_composite_construct(&ctx->builder,
1113                                                             vec_type,
1114                                                             constituents,
1115                                                             coord_components);
1116
1117       result = spirv_builder_emit_image_sample_proj_implicit_lod(&ctx->builder,
1118                                                                  dest_type,
1119                                                                  load,
1120                                                                  merged);
1121    } else
1122       result = spirv_builder_emit_image_sample_implicit_lod(&ctx->builder,
1123                                                             dest_type, load,
1124                                                             coord);
1125    spirv_builder_emit_decoration(&ctx->builder, result,
1126                                  SpvDecorationRelaxedPrecision);
1127
1128    store_dest(ctx, &tex->dest, result, tex->dest_type);
1129 }
1130
1131 static void
1132 emit_block(struct ntv_context *ctx, struct nir_block *block)
1133 {
1134    nir_foreach_instr(instr, block) {
1135       switch (instr->type) {
1136       case nir_instr_type_alu:
1137          emit_alu(ctx, nir_instr_as_alu(instr));
1138          break;
1139       case nir_instr_type_intrinsic:
1140          emit_intrinsic(ctx, nir_instr_as_intrinsic(instr));
1141          break;
1142       case nir_instr_type_load_const:
1143          emit_load_const(ctx, nir_instr_as_load_const(instr));
1144          break;
1145       case nir_instr_type_ssa_undef:
1146          emit_undef(ctx, nir_instr_as_ssa_undef(instr));
1147          break;
1148       case nir_instr_type_tex:
1149          emit_tex(ctx, nir_instr_as_tex(instr));
1150          break;
1151       case nir_instr_type_phi:
1152          unreachable("nir_instr_type_phi not supported");
1153          break;
1154       case nir_instr_type_jump:
1155          unreachable("nir_instr_type_jump not supported");
1156          break;
1157       case nir_instr_type_call:
1158          unreachable("nir_instr_type_call not supported");
1159          break;
1160       case nir_instr_type_parallel_copy:
1161          unreachable("nir_instr_type_parallel_copy not supported");
1162          break;
1163       case nir_instr_type_deref:
1164          unreachable("nir_instr_type_deref not supported");
1165          break;
1166       }
1167    }
1168 }
1169
1170 static void
1171 emit_cf_list(struct ntv_context *ctx, struct exec_list *list)
1172 {
1173    foreach_list_typed(nir_cf_node, node, node, list) {
1174       switch (node->type) {
1175       case nir_cf_node_block:
1176          emit_block(ctx, nir_cf_node_as_block(node));
1177          break;
1178
1179       case nir_cf_node_if:
1180          unreachable("nir_cf_node_if not supported");
1181          break;
1182
1183       case nir_cf_node_loop:
1184          unreachable("nir_cf_node_loop not supported");
1185          break;
1186
1187       case nir_cf_node_function:
1188          unreachable("nir_cf_node_function not supported");
1189          break;
1190       }
1191    }
1192 }
1193
1194 struct spirv_shader *
1195 nir_to_spirv(struct nir_shader *s)
1196 {
1197    struct spirv_shader *ret = NULL;
1198
1199    struct ntv_context ctx = {};
1200
1201    switch (s->info.stage) {
1202    case MESA_SHADER_VERTEX:
1203    case MESA_SHADER_FRAGMENT:
1204    case MESA_SHADER_COMPUTE:
1205       spirv_builder_emit_cap(&ctx.builder, SpvCapabilityShader);
1206       break;
1207
1208    case MESA_SHADER_TESS_CTRL:
1209    case MESA_SHADER_TESS_EVAL:
1210       spirv_builder_emit_cap(&ctx.builder, SpvCapabilityTessellation);
1211       break;
1212
1213    case MESA_SHADER_GEOMETRY:
1214       spirv_builder_emit_cap(&ctx.builder, SpvCapabilityGeometry);
1215       break;
1216
1217    default:
1218       unreachable("invalid stage");
1219    }
1220
1221    ctx.stage = s->info.stage;
1222    ctx.GLSL_std_450 = spirv_builder_import(&ctx.builder, "GLSL.std.450");
1223    spirv_builder_emit_source(&ctx.builder, SpvSourceLanguageGLSL, 450);
1224
1225    spirv_builder_emit_mem_model(&ctx.builder, SpvAddressingModelLogical,
1226                                 SpvMemoryModelGLSL450);
1227
1228    SpvExecutionModel exec_model;
1229    switch (s->info.stage) {
1230    case MESA_SHADER_VERTEX:
1231       exec_model = SpvExecutionModelVertex;
1232       break;
1233    case MESA_SHADER_TESS_CTRL:
1234       exec_model = SpvExecutionModelTessellationControl;
1235       break;
1236    case MESA_SHADER_TESS_EVAL:
1237       exec_model = SpvExecutionModelTessellationEvaluation;
1238       break;
1239    case MESA_SHADER_GEOMETRY:
1240       exec_model = SpvExecutionModelGeometry;
1241       break;
1242    case MESA_SHADER_FRAGMENT:
1243       exec_model = SpvExecutionModelFragment;
1244       break;
1245    case MESA_SHADER_COMPUTE:
1246       exec_model = SpvExecutionModelGLCompute;
1247       break;
1248    default:
1249       unreachable("invalid stage");
1250    }
1251
1252    SpvId type_void = spirv_builder_type_void(&ctx.builder);
1253    SpvId type_main = spirv_builder_type_function(&ctx.builder, type_void,
1254                                                  NULL, 0);
1255    SpvId entry_point = spirv_builder_new_id(&ctx.builder);
1256    SpvId label = spirv_builder_new_id(&ctx.builder);
1257    spirv_builder_emit_name(&ctx.builder, entry_point, "main");
1258
1259    nir_foreach_variable(var, &s->inputs)
1260       emit_input(&ctx, var);
1261
1262    nir_foreach_variable(var, &s->outputs)
1263       emit_output(&ctx, var);
1264
1265    nir_foreach_variable(var, &s->uniforms)
1266       emit_uniform(&ctx, var);
1267
1268    spirv_builder_emit_entry_point(&ctx.builder, exec_model, entry_point,
1269                                   "main", ctx.entry_ifaces,
1270                                   ctx.num_entry_ifaces);
1271    if (s->info.stage == MESA_SHADER_FRAGMENT)
1272       spirv_builder_emit_exec_mode(&ctx.builder, entry_point,
1273                                    SpvExecutionModeOriginUpperLeft);
1274
1275
1276    spirv_builder_function(&ctx.builder, entry_point, type_void,
1277                                             SpvFunctionControlMaskNone,
1278                                             type_main);
1279    spirv_builder_label(&ctx.builder, label);
1280
1281    nir_function_impl *entry = nir_shader_get_entrypoint(s);
1282
1283    ctx.defs = (SpvId *)malloc(sizeof(SpvId) * entry->ssa_alloc);
1284    if (!ctx.defs)
1285       goto fail;
1286    ctx.num_defs = entry->ssa_alloc;
1287
1288    ctx.vars = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
1289                                             _mesa_key_pointer_equal);
1290    if (!ctx.vars)
1291       goto fail;
1292
1293    emit_cf_list(&ctx, &entry->body);
1294    free(ctx.defs);
1295
1296    spirv_builder_return(&ctx.builder); // doesn't belong here, but whatevz
1297    spirv_builder_function_end(&ctx.builder);
1298
1299    size_t num_words = spirv_builder_get_num_words(&ctx.builder);
1300
1301    ret = CALLOC_STRUCT(spirv_shader);
1302    if (!ret)
1303       goto fail;
1304
1305    ret->words = MALLOC(sizeof(uint32_t) * num_words);
1306    if (!ret->words)
1307       goto fail;
1308
1309    ret->num_words = spirv_builder_get_words(&ctx.builder, ret->words, num_words);
1310    assert(ret->num_words == num_words);
1311
1312    return ret;
1313
1314 fail:
1315
1316    if (ret)
1317       spirv_shader_delete(ret);
1318
1319    return NULL;
1320 }
1321
1322 void
1323 spirv_shader_delete(struct spirv_shader *s)
1324 {
1325    FREE(s->words);
1326    FREE(s);
1327 }