2 * Copyright 2018 Collabora Ltd.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
24 #include "zink_context.h"
26 #include "zink_batch.h"
27 #include "zink_compiler.h"
28 #include "zink_fence.h"
29 #include "zink_framebuffer.h"
30 #include "zink_helpers.h"
31 #include "zink_pipeline.h"
32 #include "zink_render_pass.h"
33 #include "zink_resource.h"
34 #include "zink_screen.h"
35 #include "zink_state.h"
36 #include "zink_surface.h"
38 #include "indices/u_primconvert.h"
39 #include "util/u_blitter.h"
40 #include "util/u_debug.h"
41 #include "util/format/u_format.h"
42 #include "util/u_framebuffer.h"
43 #include "util/u_helpers.h"
44 #include "util/u_inlines.h"
48 #include "util/u_memory.h"
49 #include "util/u_upload_mgr.h"
52 zink_context_destroy(struct pipe_context
*pctx
)
54 struct zink_context
*ctx
= zink_context(pctx
);
55 struct zink_screen
*screen
= zink_screen(pctx
->screen
);
57 if (vkQueueWaitIdle(ctx
->queue
) != VK_SUCCESS
)
58 debug_printf("vkQueueWaitIdle failed\n");
60 for (int i
= 0; i
< ARRAY_SIZE(ctx
->batches
); ++i
)
61 vkFreeCommandBuffers(screen
->dev
, ctx
->cmdpool
, 1, &ctx
->batches
[i
].cmdbuf
);
62 vkDestroyCommandPool(screen
->dev
, ctx
->cmdpool
, NULL
);
64 util_primconvert_destroy(ctx
->primconvert
);
65 u_upload_destroy(pctx
->stream_uploader
);
66 slab_destroy_child(&ctx
->transfer_pool
);
67 util_blitter_destroy(ctx
->blitter
);
71 static VkSamplerMipmapMode
72 sampler_mipmap_mode(enum pipe_tex_mipfilter filter
)
75 case PIPE_TEX_MIPFILTER_NEAREST
: return VK_SAMPLER_MIPMAP_MODE_NEAREST
;
76 case PIPE_TEX_MIPFILTER_LINEAR
: return VK_SAMPLER_MIPMAP_MODE_LINEAR
;
77 case PIPE_TEX_MIPFILTER_NONE
:
78 unreachable("PIPE_TEX_MIPFILTER_NONE should be dealt with earlier");
80 unreachable("unexpected filter");
83 static VkSamplerAddressMode
84 sampler_address_mode(enum pipe_tex_wrap filter
)
87 case PIPE_TEX_WRAP_REPEAT
: return VK_SAMPLER_ADDRESS_MODE_REPEAT
;
88 case PIPE_TEX_WRAP_CLAMP
: return VK_SAMPLER_ADDRESS_MODE_CLAMP_TO_EDGE
; /* not technically correct, but kinda works */
89 case PIPE_TEX_WRAP_CLAMP_TO_EDGE
: return VK_SAMPLER_ADDRESS_MODE_CLAMP_TO_EDGE
;
90 case PIPE_TEX_WRAP_CLAMP_TO_BORDER
: return VK_SAMPLER_ADDRESS_MODE_CLAMP_TO_BORDER
;
91 case PIPE_TEX_WRAP_MIRROR_REPEAT
: return VK_SAMPLER_ADDRESS_MODE_MIRRORED_REPEAT
;
92 case PIPE_TEX_WRAP_MIRROR_CLAMP
: return VK_SAMPLER_ADDRESS_MODE_MIRROR_CLAMP_TO_EDGE
; /* not technically correct, but kinda works */
93 case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE
: return VK_SAMPLER_ADDRESS_MODE_MIRROR_CLAMP_TO_EDGE
;
94 case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_BORDER
: return VK_SAMPLER_ADDRESS_MODE_MIRROR_CLAMP_TO_EDGE
; /* not technically correct, but kinda works */
96 unreachable("unexpected wrap");
100 compare_op(enum pipe_compare_func op
)
103 case PIPE_FUNC_NEVER
: return VK_COMPARE_OP_NEVER
;
104 case PIPE_FUNC_LESS
: return VK_COMPARE_OP_LESS
;
105 case PIPE_FUNC_EQUAL
: return VK_COMPARE_OP_EQUAL
;
106 case PIPE_FUNC_LEQUAL
: return VK_COMPARE_OP_LESS_OR_EQUAL
;
107 case PIPE_FUNC_GREATER
: return VK_COMPARE_OP_GREATER
;
108 case PIPE_FUNC_NOTEQUAL
: return VK_COMPARE_OP_NOT_EQUAL
;
109 case PIPE_FUNC_GEQUAL
: return VK_COMPARE_OP_GREATER_OR_EQUAL
;
110 case PIPE_FUNC_ALWAYS
: return VK_COMPARE_OP_ALWAYS
;
112 unreachable("unexpected compare");
116 zink_create_sampler_state(struct pipe_context
*pctx
,
117 const struct pipe_sampler_state
*state
)
119 struct zink_screen
*screen
= zink_screen(pctx
->screen
);
121 VkSamplerCreateInfo sci
= {};
122 sci
.sType
= VK_STRUCTURE_TYPE_SAMPLER_CREATE_INFO
;
123 sci
.magFilter
= zink_filter(state
->mag_img_filter
);
124 sci
.minFilter
= zink_filter(state
->min_img_filter
);
126 if (state
->min_mip_filter
!= PIPE_TEX_MIPFILTER_NONE
) {
127 sci
.mipmapMode
= sampler_mipmap_mode(state
->min_mip_filter
);
128 sci
.minLod
= state
->min_lod
;
129 sci
.maxLod
= state
->max_lod
;
131 sci
.mipmapMode
= VK_SAMPLER_MIPMAP_MODE_NEAREST
;
136 sci
.addressModeU
= sampler_address_mode(state
->wrap_s
);
137 sci
.addressModeV
= sampler_address_mode(state
->wrap_t
);
138 sci
.addressModeW
= sampler_address_mode(state
->wrap_r
);
139 sci
.mipLodBias
= state
->lod_bias
;
141 if (state
->compare_mode
== PIPE_TEX_COMPARE_NONE
)
142 sci
.compareOp
= VK_COMPARE_OP_NEVER
;
144 sci
.compareOp
= compare_op(state
->compare_func
);
145 sci
.compareEnable
= VK_TRUE
;
148 sci
.borderColor
= VK_BORDER_COLOR_FLOAT_TRANSPARENT_BLACK
; // TODO
149 sci
.unnormalizedCoordinates
= !state
->normalized_coords
;
151 if (state
->max_anisotropy
> 1) {
152 sci
.maxAnisotropy
= state
->max_anisotropy
;
153 sci
.anisotropyEnable
= VK_TRUE
;
156 VkSampler
*sampler
= CALLOC(1, sizeof(VkSampler
));
160 if (vkCreateSampler(screen
->dev
, &sci
, NULL
, sampler
) != VK_SUCCESS
) {
169 zink_bind_sampler_states(struct pipe_context
*pctx
,
170 enum pipe_shader_type shader
,
172 unsigned num_samplers
,
175 struct zink_context
*ctx
= zink_context(pctx
);
176 for (unsigned i
= 0; i
< num_samplers
; ++i
) {
177 VkSampler
*sampler
= samplers
[i
];
178 ctx
->sampler_states
[shader
][start_slot
+ i
] = sampler
;
179 ctx
->samplers
[shader
][start_slot
+ i
] = sampler
? *sampler
: VK_NULL_HANDLE
;
181 ctx
->num_samplers
[shader
] = start_slot
+ num_samplers
;
185 zink_delete_sampler_state(struct pipe_context
*pctx
,
188 struct zink_batch
*batch
= zink_curr_batch(zink_context(pctx
));
189 util_dynarray_append(&batch
->zombie_samplers
, VkSampler
,
190 *(VkSampler
*)sampler_state
);
195 static VkImageViewType
196 image_view_type(enum pipe_texture_target target
)
199 case PIPE_TEXTURE_1D
: return VK_IMAGE_VIEW_TYPE_1D
;
200 case PIPE_TEXTURE_1D_ARRAY
: return VK_IMAGE_VIEW_TYPE_1D_ARRAY
;
201 case PIPE_TEXTURE_2D
: return VK_IMAGE_VIEW_TYPE_2D
;
202 case PIPE_TEXTURE_2D_ARRAY
: return VK_IMAGE_VIEW_TYPE_2D_ARRAY
;
203 case PIPE_TEXTURE_CUBE
: return VK_IMAGE_VIEW_TYPE_CUBE
;
204 case PIPE_TEXTURE_CUBE_ARRAY
: return VK_IMAGE_VIEW_TYPE_CUBE_ARRAY
;
205 case PIPE_TEXTURE_3D
: return VK_IMAGE_VIEW_TYPE_3D
;
206 case PIPE_TEXTURE_RECT
: return VK_IMAGE_VIEW_TYPE_2D
;
208 unreachable("unexpected target");
212 static VkComponentSwizzle
213 component_mapping(enum pipe_swizzle swizzle
)
216 case PIPE_SWIZZLE_X
: return VK_COMPONENT_SWIZZLE_R
;
217 case PIPE_SWIZZLE_Y
: return VK_COMPONENT_SWIZZLE_G
;
218 case PIPE_SWIZZLE_Z
: return VK_COMPONENT_SWIZZLE_B
;
219 case PIPE_SWIZZLE_W
: return VK_COMPONENT_SWIZZLE_A
;
220 case PIPE_SWIZZLE_0
: return VK_COMPONENT_SWIZZLE_ZERO
;
221 case PIPE_SWIZZLE_1
: return VK_COMPONENT_SWIZZLE_ONE
;
222 case PIPE_SWIZZLE_NONE
: return VK_COMPONENT_SWIZZLE_IDENTITY
; // ???
224 unreachable("unexpected swizzle");
228 static VkImageAspectFlags
229 sampler_aspect_from_format(enum pipe_format fmt
)
231 if (util_format_is_depth_or_stencil(fmt
)) {
232 const struct util_format_description
*desc
= util_format_description(fmt
);
233 if (util_format_has_depth(desc
))
234 return VK_IMAGE_ASPECT_DEPTH_BIT
;
235 assert(util_format_has_stencil(desc
));
236 return VK_IMAGE_ASPECT_STENCIL_BIT
;
238 return VK_IMAGE_ASPECT_COLOR_BIT
;
241 static struct pipe_sampler_view
*
242 zink_create_sampler_view(struct pipe_context
*pctx
, struct pipe_resource
*pres
,
243 const struct pipe_sampler_view
*state
)
245 struct zink_screen
*screen
= zink_screen(pctx
->screen
);
246 struct zink_resource
*res
= zink_resource(pres
);
247 struct zink_sampler_view
*sampler_view
= CALLOC_STRUCT(zink_sampler_view
);
249 sampler_view
->base
= *state
;
250 sampler_view
->base
.texture
= NULL
;
251 pipe_resource_reference(&sampler_view
->base
.texture
, pres
);
252 sampler_view
->base
.reference
.count
= 1;
253 sampler_view
->base
.context
= pctx
;
255 VkImageViewCreateInfo ivci
= {};
256 ivci
.sType
= VK_STRUCTURE_TYPE_IMAGE_VIEW_CREATE_INFO
;
257 ivci
.image
= res
->image
;
258 ivci
.viewType
= image_view_type(state
->target
);
259 ivci
.format
= zink_get_format(screen
, state
->format
);
260 ivci
.components
.r
= component_mapping(state
->swizzle_r
);
261 ivci
.components
.g
= component_mapping(state
->swizzle_g
);
262 ivci
.components
.b
= component_mapping(state
->swizzle_b
);
263 ivci
.components
.a
= component_mapping(state
->swizzle_a
);
265 ivci
.subresourceRange
.aspectMask
= sampler_aspect_from_format(state
->format
);
266 ivci
.subresourceRange
.baseMipLevel
= state
->u
.tex
.first_level
;
267 ivci
.subresourceRange
.baseArrayLayer
= state
->u
.tex
.first_layer
;
268 ivci
.subresourceRange
.levelCount
= state
->u
.tex
.last_level
- state
->u
.tex
.first_level
+ 1;
269 ivci
.subresourceRange
.layerCount
= state
->u
.tex
.last_layer
- state
->u
.tex
.first_layer
+ 1;
271 VkResult err
= vkCreateImageView(screen
->dev
, &ivci
, NULL
, &sampler_view
->image_view
);
272 if (err
!= VK_SUCCESS
) {
277 return &sampler_view
->base
;
281 zink_sampler_view_destroy(struct pipe_context
*pctx
,
282 struct pipe_sampler_view
*pview
)
284 struct zink_sampler_view
*view
= zink_sampler_view(pview
);
285 vkDestroyImageView(zink_screen(pctx
->screen
)->dev
, view
->image_view
, NULL
);
290 zink_create_vs_state(struct pipe_context
*pctx
,
291 const struct pipe_shader_state
*shader
)
293 struct nir_shader
*nir
;
294 if (shader
->type
!= PIPE_SHADER_IR_NIR
)
295 nir
= zink_tgsi_to_nir(pctx
->screen
, shader
->tokens
);
297 nir
= (struct nir_shader
*)shader
->ir
.nir
;
299 return zink_compile_nir(zink_screen(pctx
->screen
), nir
, &shader
->stream_output
);
303 bind_stage(struct zink_context
*ctx
, enum pipe_shader_type stage
,
304 struct zink_shader
*shader
)
306 assert(stage
< PIPE_SHADER_COMPUTE
);
307 ctx
->gfx_stages
[stage
] = shader
;
308 ctx
->dirty_program
= true;
312 zink_bind_vs_state(struct pipe_context
*pctx
,
315 bind_stage(zink_context(pctx
), PIPE_SHADER_VERTEX
, cso
);
319 zink_delete_vs_state(struct pipe_context
*pctx
,
322 zink_shader_free(zink_screen(pctx
->screen
), cso
);
326 zink_create_fs_state(struct pipe_context
*pctx
,
327 const struct pipe_shader_state
*shader
)
329 struct nir_shader
*nir
;
330 if (shader
->type
!= PIPE_SHADER_IR_NIR
)
331 nir
= zink_tgsi_to_nir(pctx
->screen
, shader
->tokens
);
333 nir
= (struct nir_shader
*)shader
->ir
.nir
;
335 return zink_compile_nir(zink_screen(pctx
->screen
), nir
, NULL
);
339 zink_bind_fs_state(struct pipe_context
*pctx
,
342 bind_stage(zink_context(pctx
), PIPE_SHADER_FRAGMENT
, cso
);
346 zink_delete_fs_state(struct pipe_context
*pctx
,
349 zink_shader_free(zink_screen(pctx
->screen
), cso
);
353 zink_set_polygon_stipple(struct pipe_context
*pctx
,
354 const struct pipe_poly_stipple
*ps
)
359 zink_set_vertex_buffers(struct pipe_context
*pctx
,
361 unsigned num_buffers
,
362 const struct pipe_vertex_buffer
*buffers
)
364 struct zink_context
*ctx
= zink_context(pctx
);
367 for (int i
= 0; i
< num_buffers
; ++i
) {
368 const struct pipe_vertex_buffer
*vb
= buffers
+ i
;
369 ctx
->gfx_pipeline_state
.bindings
[start_slot
+ i
].stride
= vb
->stride
;
373 util_set_vertex_buffers_mask(ctx
->buffers
, &ctx
->buffers_enabled_mask
,
374 buffers
, start_slot
, num_buffers
);
378 zink_set_viewport_states(struct pipe_context
*pctx
,
380 unsigned num_viewports
,
381 const struct pipe_viewport_state
*state
)
383 struct zink_context
*ctx
= zink_context(pctx
);
385 for (unsigned i
= 0; i
< num_viewports
; ++i
) {
386 VkViewport viewport
= {
387 state
[i
].translate
[0] - state
[i
].scale
[0],
388 state
[i
].translate
[1] - state
[i
].scale
[1],
389 state
[i
].scale
[0] * 2,
390 state
[i
].scale
[1] * 2,
391 state
[i
].translate
[2] - state
[i
].scale
[2],
392 state
[i
].translate
[2] + state
[i
].scale
[2]
394 ctx
->viewport_states
[start_slot
+ i
] = state
[i
];
395 ctx
->viewports
[start_slot
+ i
] = viewport
;
397 ctx
->num_viewports
= start_slot
+ num_viewports
;
401 zink_set_scissor_states(struct pipe_context
*pctx
,
402 unsigned start_slot
, unsigned num_scissors
,
403 const struct pipe_scissor_state
*states
)
405 struct zink_context
*ctx
= zink_context(pctx
);
407 for (unsigned i
= 0; i
< num_scissors
; i
++) {
410 scissor
.offset
.x
= states
[i
].minx
;
411 scissor
.offset
.y
= states
[i
].miny
;
412 scissor
.extent
.width
= states
[i
].maxx
- states
[i
].minx
;
413 scissor
.extent
.height
= states
[i
].maxy
- states
[i
].miny
;
414 ctx
->scissor_states
[start_slot
+ i
] = states
[i
];
415 ctx
->scissors
[start_slot
+ i
] = scissor
;
420 zink_set_constant_buffer(struct pipe_context
*pctx
,
421 enum pipe_shader_type shader
, uint index
,
422 const struct pipe_constant_buffer
*cb
)
424 struct zink_context
*ctx
= zink_context(pctx
);
427 struct pipe_resource
*buffer
= cb
->buffer
;
428 unsigned offset
= cb
->buffer_offset
;
429 if (cb
->user_buffer
) {
430 struct zink_screen
*screen
= zink_screen(pctx
->screen
);
431 u_upload_data(ctx
->base
.const_uploader
, 0, cb
->buffer_size
,
432 screen
->props
.limits
.minUniformBufferOffsetAlignment
,
433 cb
->user_buffer
, &offset
, &buffer
);
436 pipe_resource_reference(&ctx
->ubos
[shader
][index
].buffer
, buffer
);
437 ctx
->ubos
[shader
][index
].buffer_offset
= offset
;
438 ctx
->ubos
[shader
][index
].buffer_size
= cb
->buffer_size
;
439 ctx
->ubos
[shader
][index
].user_buffer
= NULL
;
442 pipe_resource_reference(&buffer
, NULL
);
444 pipe_resource_reference(&ctx
->ubos
[shader
][index
].buffer
, NULL
);
445 ctx
->ubos
[shader
][index
].buffer_offset
= 0;
446 ctx
->ubos
[shader
][index
].buffer_size
= 0;
447 ctx
->ubos
[shader
][index
].user_buffer
= NULL
;
452 zink_set_sampler_views(struct pipe_context
*pctx
,
453 enum pipe_shader_type shader_type
,
456 struct pipe_sampler_view
**views
)
458 struct zink_context
*ctx
= zink_context(pctx
);
460 for (unsigned i
= 0; i
< num_views
; ++i
) {
461 pipe_sampler_view_reference(
462 &ctx
->image_views
[shader_type
][start_slot
+ i
],
465 ctx
->num_image_views
[shader_type
] = start_slot
+ num_views
;
469 zink_set_stencil_ref(struct pipe_context
*pctx
,
470 const struct pipe_stencil_ref
*ref
)
472 struct zink_context
*ctx
= zink_context(pctx
);
473 ctx
->stencil_ref
= *ref
;
477 zink_set_clip_state(struct pipe_context
*pctx
,
478 const struct pipe_clip_state
*pcs
)
482 static struct zink_render_pass
*
483 get_render_pass(struct zink_context
*ctx
)
485 struct zink_screen
*screen
= zink_screen(ctx
->base
.screen
);
486 const struct pipe_framebuffer_state
*fb
= &ctx
->fb_state
;
487 struct zink_render_pass_state state
= { 0 };
489 for (int i
= 0; i
< fb
->nr_cbufs
; i
++) {
490 struct pipe_surface
*surf
= fb
->cbufs
[i
];
491 state
.rts
[i
].format
= zink_get_format(screen
, surf
->format
);
492 state
.rts
[i
].samples
= surf
->nr_samples
> 0 ? surf
->nr_samples
:
493 VK_SAMPLE_COUNT_1_BIT
;
495 state
.num_cbufs
= fb
->nr_cbufs
;
498 struct zink_resource
*zsbuf
= zink_resource(fb
->zsbuf
->texture
);
499 state
.rts
[fb
->nr_cbufs
].format
= zsbuf
->format
;
500 state
.rts
[fb
->nr_cbufs
].samples
= zsbuf
->base
.nr_samples
> 0 ? zsbuf
->base
.nr_samples
: VK_SAMPLE_COUNT_1_BIT
;
502 state
.have_zsbuf
= fb
->zsbuf
!= NULL
;
504 struct hash_entry
*entry
= _mesa_hash_table_search(ctx
->render_pass_cache
,
507 struct zink_render_pass
*rp
;
508 rp
= zink_create_render_pass(screen
, &state
);
509 entry
= _mesa_hash_table_insert(ctx
->render_pass_cache
, &state
, rp
);
517 static struct zink_framebuffer
*
518 create_framebuffer(struct zink_context
*ctx
)
520 struct zink_screen
*screen
= zink_screen(ctx
->base
.screen
);
522 struct zink_framebuffer_state state
= {};
523 state
.rp
= get_render_pass(ctx
);
524 for (int i
= 0; i
< ctx
->fb_state
.nr_cbufs
; i
++) {
525 struct pipe_surface
*psurf
= ctx
->fb_state
.cbufs
[i
];
526 state
.attachments
[i
] = zink_surface(psurf
);
529 state
.num_attachments
= ctx
->fb_state
.nr_cbufs
;
530 if (ctx
->fb_state
.zsbuf
) {
531 struct pipe_surface
*psurf
= ctx
->fb_state
.zsbuf
;
532 state
.attachments
[state
.num_attachments
++] = zink_surface(psurf
);
535 state
.width
= ctx
->fb_state
.width
;
536 state
.height
= ctx
->fb_state
.height
;
537 state
.layers
= MAX2(ctx
->fb_state
.layers
, 1);
539 return zink_create_framebuffer(screen
, &state
);
543 zink_begin_render_pass(struct zink_context
*ctx
, struct zink_batch
*batch
)
545 struct zink_screen
*screen
= zink_screen(ctx
->base
.screen
);
546 assert(batch
== zink_curr_batch(ctx
));
547 assert(ctx
->gfx_pipeline_state
.render_pass
);
549 struct pipe_framebuffer_state
*fb_state
= &ctx
->fb_state
;
551 VkRenderPassBeginInfo rpbi
= {};
552 rpbi
.sType
= VK_STRUCTURE_TYPE_RENDER_PASS_BEGIN_INFO
;
553 rpbi
.renderPass
= ctx
->gfx_pipeline_state
.render_pass
->render_pass
;
554 rpbi
.renderArea
.offset
.x
= 0;
555 rpbi
.renderArea
.offset
.y
= 0;
556 rpbi
.renderArea
.extent
.width
= fb_state
->width
;
557 rpbi
.renderArea
.extent
.height
= fb_state
->height
;
558 rpbi
.clearValueCount
= 0;
559 rpbi
.pClearValues
= NULL
;
560 rpbi
.framebuffer
= ctx
->framebuffer
->fb
;
562 assert(ctx
->gfx_pipeline_state
.render_pass
&& ctx
->framebuffer
);
563 assert(!batch
->rp
|| batch
->rp
== ctx
->gfx_pipeline_state
.render_pass
);
564 assert(!batch
->fb
|| batch
->fb
== ctx
->framebuffer
);
566 for (int i
= 0; i
< fb_state
->nr_cbufs
; i
++) {
567 struct zink_resource
*res
= zink_resource(fb_state
->cbufs
[i
]->texture
);
568 if (res
->layout
!= VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL
)
569 zink_resource_barrier(batch
->cmdbuf
, res
, res
->aspect
,
570 VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL
);
573 if (fb_state
->zsbuf
) {
574 struct zink_resource
*res
= zink_resource(fb_state
->zsbuf
->texture
);
575 if (res
->layout
!= VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL
)
576 zink_resource_barrier(batch
->cmdbuf
, res
, res
->aspect
,
577 VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL
);
580 zink_render_pass_reference(screen
, &batch
->rp
, ctx
->gfx_pipeline_state
.render_pass
);
581 zink_framebuffer_reference(screen
, &batch
->fb
, ctx
->framebuffer
);
583 vkCmdBeginRenderPass(batch
->cmdbuf
, &rpbi
, VK_SUBPASS_CONTENTS_INLINE
);
587 flush_batch(struct zink_context
*ctx
)
589 struct zink_batch
*batch
= zink_curr_batch(ctx
);
591 vkCmdEndRenderPass(batch
->cmdbuf
);
593 zink_end_batch(ctx
, batch
);
596 if (ctx
->curr_batch
== ARRAY_SIZE(ctx
->batches
))
599 zink_start_batch(ctx
, zink_curr_batch(ctx
));
603 zink_batch_rp(struct zink_context
*ctx
)
605 struct zink_batch
*batch
= zink_curr_batch(ctx
);
607 zink_begin_render_pass(ctx
, batch
);
614 zink_batch_no_rp(struct zink_context
*ctx
)
616 struct zink_batch
*batch
= zink_curr_batch(ctx
);
618 /* flush batch and get a new one */
620 batch
= zink_curr_batch(ctx
);
627 zink_set_framebuffer_state(struct pipe_context
*pctx
,
628 const struct pipe_framebuffer_state
*state
)
630 struct zink_context
*ctx
= zink_context(pctx
);
631 struct zink_screen
*screen
= zink_screen(pctx
->screen
);
633 util_copy_framebuffer_state(&ctx
->fb_state
, state
);
635 struct zink_framebuffer
*fb
= ctx
->framebuffer
;
636 /* explicitly unref previous fb to ensure it gets destroyed */
638 zink_framebuffer_reference(screen
, &fb
, NULL
);
639 fb
= create_framebuffer(ctx
);
640 zink_framebuffer_reference(screen
, &ctx
->framebuffer
, fb
);
641 zink_render_pass_reference(screen
, &ctx
->gfx_pipeline_state
.render_pass
, fb
->rp
);
643 ctx
->gfx_pipeline_state
.rast_samples
= MAX2(state
->samples
, 1);
644 ctx
->gfx_pipeline_state
.num_attachments
= state
->nr_cbufs
;
646 struct zink_batch
*batch
= zink_batch_no_rp(ctx
);
648 for (int i
= 0; i
< state
->nr_cbufs
; i
++) {
649 struct zink_resource
*res
= zink_resource(state
->cbufs
[i
]->texture
);
650 if (res
->layout
!= VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL
)
651 zink_resource_barrier(batch
->cmdbuf
, res
, res
->aspect
,
652 VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL
);
656 struct zink_resource
*res
= zink_resource(state
->zsbuf
->texture
);
657 if (res
->layout
!= VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL
)
658 zink_resource_barrier(batch
->cmdbuf
, res
, res
->aspect
,
659 VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL
);
664 zink_set_blend_color(struct pipe_context
*pctx
,
665 const struct pipe_blend_color
*color
)
667 struct zink_context
*ctx
= zink_context(pctx
);
668 memcpy(ctx
->blend_constants
, color
->color
, sizeof(float) * 4);
672 zink_set_sample_mask(struct pipe_context
*pctx
, unsigned sample_mask
)
674 struct zink_context
*ctx
= zink_context(pctx
);
675 ctx
->gfx_pipeline_state
.sample_mask
= sample_mask
;
679 access_src_flags(VkImageLayout layout
)
682 case VK_IMAGE_LAYOUT_UNDEFINED
:
683 case VK_IMAGE_LAYOUT_GENERAL
:
686 case VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL
:
687 return VK_ACCESS_COLOR_ATTACHMENT_READ_BIT
;
688 case VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL
:
689 return VK_ACCESS_DEPTH_STENCIL_ATTACHMENT_READ_BIT
;
691 case VK_IMAGE_LAYOUT_SHADER_READ_ONLY_OPTIMAL
:
692 return VK_ACCESS_SHADER_READ_BIT
;
694 case VK_IMAGE_LAYOUT_TRANSFER_SRC_OPTIMAL
:
695 return VK_ACCESS_TRANSFER_READ_BIT
;
697 case VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL
:
698 return VK_ACCESS_TRANSFER_WRITE_BIT
;
700 case VK_IMAGE_LAYOUT_PREINITIALIZED
:
701 return VK_ACCESS_HOST_WRITE_BIT
;
704 unreachable("unexpected layout");
709 access_dst_flags(VkImageLayout layout
)
712 case VK_IMAGE_LAYOUT_UNDEFINED
:
713 case VK_IMAGE_LAYOUT_GENERAL
:
716 case VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL
:
717 return VK_ACCESS_COLOR_ATTACHMENT_WRITE_BIT
;
718 case VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL
:
719 return VK_ACCESS_DEPTH_STENCIL_ATTACHMENT_WRITE_BIT
;
721 case VK_IMAGE_LAYOUT_TRANSFER_SRC_OPTIMAL
:
722 return VK_ACCESS_TRANSFER_READ_BIT
;
724 case VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL
:
725 return VK_ACCESS_TRANSFER_WRITE_BIT
;
728 unreachable("unexpected layout");
732 static VkPipelineStageFlags
733 pipeline_dst_stage(VkImageLayout layout
)
736 case VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL
:
737 return VK_PIPELINE_STAGE_COLOR_ATTACHMENT_OUTPUT_BIT
;
738 case VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL
:
739 return VK_PIPELINE_STAGE_LATE_FRAGMENT_TESTS_BIT
;
741 case VK_IMAGE_LAYOUT_TRANSFER_SRC_OPTIMAL
:
742 return VK_PIPELINE_STAGE_TRANSFER_BIT
;
743 case VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL
:
744 return VK_PIPELINE_STAGE_TRANSFER_BIT
;
747 return VK_PIPELINE_STAGE_BOTTOM_OF_PIPE_BIT
;
751 static VkPipelineStageFlags
752 pipeline_src_stage(VkImageLayout layout
)
755 case VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL
:
756 return VK_PIPELINE_STAGE_COLOR_ATTACHMENT_OUTPUT_BIT
;
757 case VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL
:
758 return VK_PIPELINE_STAGE_EARLY_FRAGMENT_TESTS_BIT
;
760 case VK_IMAGE_LAYOUT_TRANSFER_SRC_OPTIMAL
:
761 return VK_PIPELINE_STAGE_TRANSFER_BIT
;
762 case VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL
:
763 return VK_PIPELINE_STAGE_TRANSFER_BIT
;
766 return VK_PIPELINE_STAGE_TOP_OF_PIPE_BIT
;
772 zink_resource_barrier(VkCommandBuffer cmdbuf
, struct zink_resource
*res
,
773 VkImageAspectFlags aspect
, VkImageLayout new_layout
)
775 VkImageSubresourceRange isr
= {
777 0, VK_REMAINING_MIP_LEVELS
,
778 0, VK_REMAINING_ARRAY_LAYERS
781 VkImageMemoryBarrier imb
= {
782 VK_STRUCTURE_TYPE_IMAGE_MEMORY_BARRIER
,
784 access_src_flags(res
->layout
),
785 access_dst_flags(new_layout
),
788 VK_QUEUE_FAMILY_IGNORED
,
789 VK_QUEUE_FAMILY_IGNORED
,
793 vkCmdPipelineBarrier(
795 pipeline_src_stage(res
->layout
),
796 pipeline_dst_stage(new_layout
),
803 res
->layout
= new_layout
;
807 zink_clear(struct pipe_context
*pctx
,
809 const struct pipe_scissor_state
*scissor_state
,
810 const union pipe_color_union
*pcolor
,
811 double depth
, unsigned stencil
)
813 struct zink_context
*ctx
= zink_context(pctx
);
814 struct pipe_framebuffer_state
*fb
= &ctx
->fb_state
;
816 /* FIXME: this is very inefficient; if no renderpass has been started yet,
817 * we should record the clear if it's full-screen, and apply it as we
818 * start the render-pass. Otherwise we can do a partial out-of-renderpass
821 struct zink_batch
*batch
= zink_batch_rp(ctx
);
823 VkClearAttachment attachments
[1 + PIPE_MAX_COLOR_BUFS
];
824 int num_attachments
= 0;
826 if (buffers
& PIPE_CLEAR_COLOR
) {
827 VkClearColorValue color
;
828 color
.float32
[0] = pcolor
->f
[0];
829 color
.float32
[1] = pcolor
->f
[1];
830 color
.float32
[2] = pcolor
->f
[2];
831 color
.float32
[3] = pcolor
->f
[3];
833 for (unsigned i
= 0; i
< fb
->nr_cbufs
; i
++) {
834 if (!(buffers
& (PIPE_CLEAR_COLOR0
<< i
)) || !fb
->cbufs
[i
])
837 attachments
[num_attachments
].aspectMask
= VK_IMAGE_ASPECT_COLOR_BIT
;
838 attachments
[num_attachments
].colorAttachment
= i
;
839 attachments
[num_attachments
].clearValue
.color
= color
;
844 if (buffers
& PIPE_CLEAR_DEPTHSTENCIL
&& fb
->zsbuf
) {
845 VkImageAspectFlags aspect
= 0;
846 if (buffers
& PIPE_CLEAR_DEPTH
)
847 aspect
|= VK_IMAGE_ASPECT_DEPTH_BIT
;
848 if (buffers
& PIPE_CLEAR_STENCIL
)
849 aspect
|= VK_IMAGE_ASPECT_STENCIL_BIT
;
851 attachments
[num_attachments
].aspectMask
= aspect
;
852 attachments
[num_attachments
].clearValue
.depthStencil
.depth
= depth
;
853 attachments
[num_attachments
].clearValue
.depthStencil
.stencil
= stencil
;
858 cr
.rect
.offset
.x
= 0;
859 cr
.rect
.offset
.y
= 0;
860 cr
.rect
.extent
.width
= fb
->width
;
861 cr
.rect
.extent
.height
= fb
->height
;
862 cr
.baseArrayLayer
= 0;
863 cr
.layerCount
= util_framebuffer_get_num_layers(fb
);
864 vkCmdClearAttachments(batch
->cmdbuf
, num_attachments
, attachments
, 1, &cr
);
867 VkShaderStageFlagBits
868 zink_shader_stage(enum pipe_shader_type type
)
870 VkShaderStageFlagBits stages
[] = {
871 [PIPE_SHADER_VERTEX
] = VK_SHADER_STAGE_VERTEX_BIT
,
872 [PIPE_SHADER_FRAGMENT
] = VK_SHADER_STAGE_FRAGMENT_BIT
,
873 [PIPE_SHADER_GEOMETRY
] = VK_SHADER_STAGE_GEOMETRY_BIT
,
874 [PIPE_SHADER_TESS_CTRL
] = VK_SHADER_STAGE_TESSELLATION_CONTROL_BIT
,
875 [PIPE_SHADER_TESS_EVAL
] = VK_SHADER_STAGE_TESSELLATION_EVALUATION_BIT
,
876 [PIPE_SHADER_COMPUTE
] = VK_SHADER_STAGE_COMPUTE_BIT
,
882 hash_gfx_program(const void *key
)
884 return _mesa_hash_data(key
, sizeof(struct zink_shader
*) * (PIPE_SHADER_TYPES
- 1));
888 equals_gfx_program(const void *a
, const void *b
)
890 return memcmp(a
, b
, sizeof(struct zink_shader
*) * (PIPE_SHADER_TYPES
- 1)) == 0;
894 hash_render_pass_state(const void *key
)
896 return _mesa_hash_data(key
, sizeof(struct zink_render_pass_state
));
900 equals_render_pass_state(const void *a
, const void *b
)
902 return memcmp(a
, b
, sizeof(struct zink_render_pass_state
)) == 0;
906 zink_flush(struct pipe_context
*pctx
,
907 struct pipe_fence_handle
**pfence
,
908 enum pipe_flush_flags flags
)
910 struct zink_context
*ctx
= zink_context(pctx
);
912 struct zink_batch
*batch
= zink_curr_batch(ctx
);
916 zink_fence_reference(zink_screen(pctx
->screen
),
917 (struct zink_fence
**)pfence
,
921 * For some strange reason, we need to finish before presenting, or else
922 * we start rendering on top of the back-buffer for the next frame. This
923 * seems like a bug in the DRI-driver to me, because we really should
924 * be properly protected by fences here, and the back-buffer should
925 * either be swapped with the front-buffer, or blitted from. But for
926 * some strange reason, neither of these things happen.
928 if (flags
& PIPE_FLUSH_END_OF_FRAME
)
929 pctx
->screen
->fence_finish(pctx
->screen
, pctx
,
930 (struct pipe_fence_handle
*)batch
->fence
,
931 PIPE_TIMEOUT_INFINITE
);
935 zink_flush_resource(struct pipe_context
*pipe
,
936 struct pipe_resource
*resource
)
941 zink_resource_copy_region(struct pipe_context
*pctx
,
942 struct pipe_resource
*pdst
,
943 unsigned dst_level
, unsigned dstx
, unsigned dsty
, unsigned dstz
,
944 struct pipe_resource
*psrc
,
945 unsigned src_level
, const struct pipe_box
*src_box
)
947 struct zink_resource
*dst
= zink_resource(pdst
);
948 struct zink_resource
*src
= zink_resource(psrc
);
949 struct zink_context
*ctx
= zink_context(pctx
);
950 if (dst
->base
.target
!= PIPE_BUFFER
&& src
->base
.target
!= PIPE_BUFFER
) {
951 VkImageCopy region
= {};
953 region
.srcSubresource
.aspectMask
= src
->aspect
;
954 region
.srcSubresource
.mipLevel
= src_level
;
955 region
.srcSubresource
.layerCount
= 1;
956 if (src
->base
.array_size
> 1) {
957 region
.srcSubresource
.baseArrayLayer
= src_box
->z
;
958 region
.srcSubresource
.layerCount
= src_box
->depth
;
959 region
.extent
.depth
= 1;
961 region
.srcOffset
.z
= src_box
->z
;
962 region
.srcSubresource
.layerCount
= 1;
963 region
.extent
.depth
= src_box
->depth
;
966 region
.srcOffset
.x
= src_box
->x
;
967 region
.srcOffset
.y
= src_box
->y
;
969 region
.dstSubresource
.aspectMask
= dst
->aspect
;
970 region
.dstSubresource
.mipLevel
= dst_level
;
971 if (dst
->base
.array_size
> 1) {
972 region
.dstSubresource
.baseArrayLayer
= dstz
;
973 region
.dstSubresource
.layerCount
= src_box
->depth
;
975 region
.dstOffset
.z
= dstz
;
976 region
.dstSubresource
.layerCount
= 1;
979 region
.dstOffset
.x
= dstx
;
980 region
.dstOffset
.y
= dsty
;
981 region
.extent
.width
= src_box
->width
;
982 region
.extent
.height
= src_box
->height
;
984 struct zink_batch
*batch
= zink_batch_no_rp(ctx
);
985 zink_batch_reference_resoure(batch
, src
);
986 zink_batch_reference_resoure(batch
, dst
);
988 if (src
->layout
!= VK_IMAGE_LAYOUT_TRANSFER_SRC_OPTIMAL
) {
989 zink_resource_barrier(batch
->cmdbuf
, src
, src
->aspect
,
990 VK_IMAGE_LAYOUT_TRANSFER_SRC_OPTIMAL
);
993 if (dst
->layout
!= VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL
) {
994 zink_resource_barrier(batch
->cmdbuf
, dst
, dst
->aspect
,
995 VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL
);
998 vkCmdCopyImage(batch
->cmdbuf
, src
->image
, src
->layout
,
999 dst
->image
, dst
->layout
,
1001 } else if (dst
->base
.target
== PIPE_BUFFER
&&
1002 src
->base
.target
== PIPE_BUFFER
) {
1003 VkBufferCopy region
;
1004 region
.srcOffset
= src_box
->x
;
1005 region
.dstOffset
= dstx
;
1006 region
.size
= src_box
->width
;
1008 struct zink_batch
*batch
= zink_batch_no_rp(ctx
);
1009 zink_batch_reference_resoure(batch
, src
);
1010 zink_batch_reference_resoure(batch
, dst
);
1012 vkCmdCopyBuffer(batch
->cmdbuf
, src
->buffer
, dst
->buffer
, 1, ®ion
);
1014 debug_printf("zink: TODO resource copy\n");
1017 struct pipe_context
*
1018 zink_context_create(struct pipe_screen
*pscreen
, void *priv
, unsigned flags
)
1020 struct zink_screen
*screen
= zink_screen(pscreen
);
1021 struct zink_context
*ctx
= CALLOC_STRUCT(zink_context
);
1025 ctx
->base
.screen
= pscreen
;
1026 ctx
->base
.priv
= priv
;
1028 ctx
->base
.destroy
= zink_context_destroy
;
1030 zink_context_state_init(&ctx
->base
);
1032 ctx
->base
.create_sampler_state
= zink_create_sampler_state
;
1033 ctx
->base
.bind_sampler_states
= zink_bind_sampler_states
;
1034 ctx
->base
.delete_sampler_state
= zink_delete_sampler_state
;
1036 ctx
->base
.create_sampler_view
= zink_create_sampler_view
;
1037 ctx
->base
.set_sampler_views
= zink_set_sampler_views
;
1038 ctx
->base
.sampler_view_destroy
= zink_sampler_view_destroy
;
1040 ctx
->base
.create_vs_state
= zink_create_vs_state
;
1041 ctx
->base
.bind_vs_state
= zink_bind_vs_state
;
1042 ctx
->base
.delete_vs_state
= zink_delete_vs_state
;
1044 ctx
->base
.create_fs_state
= zink_create_fs_state
;
1045 ctx
->base
.bind_fs_state
= zink_bind_fs_state
;
1046 ctx
->base
.delete_fs_state
= zink_delete_fs_state
;
1048 ctx
->base
.set_polygon_stipple
= zink_set_polygon_stipple
;
1049 ctx
->base
.set_vertex_buffers
= zink_set_vertex_buffers
;
1050 ctx
->base
.set_viewport_states
= zink_set_viewport_states
;
1051 ctx
->base
.set_scissor_states
= zink_set_scissor_states
;
1052 ctx
->base
.set_constant_buffer
= zink_set_constant_buffer
;
1053 ctx
->base
.set_framebuffer_state
= zink_set_framebuffer_state
;
1054 ctx
->base
.set_stencil_ref
= zink_set_stencil_ref
;
1055 ctx
->base
.set_clip_state
= zink_set_clip_state
;
1056 ctx
->base
.set_blend_color
= zink_set_blend_color
;
1058 ctx
->base
.set_sample_mask
= zink_set_sample_mask
;
1060 ctx
->base
.clear
= zink_clear
;
1061 ctx
->base
.draw_vbo
= zink_draw_vbo
;
1062 ctx
->base
.flush
= zink_flush
;
1064 ctx
->base
.resource_copy_region
= zink_resource_copy_region
;
1065 ctx
->base
.blit
= zink_blit
;
1067 ctx
->base
.flush_resource
= zink_flush_resource
;
1068 zink_context_surface_init(&ctx
->base
);
1069 zink_context_resource_init(&ctx
->base
);
1070 zink_context_query_init(&ctx
->base
);
1072 slab_create_child(&ctx
->transfer_pool
, &screen
->transfer_pool
);
1074 ctx
->base
.stream_uploader
= u_upload_create_default(&ctx
->base
);
1075 ctx
->base
.const_uploader
= ctx
->base
.stream_uploader
;
1077 int prim_hwsupport
= 1 << PIPE_PRIM_POINTS
|
1078 1 << PIPE_PRIM_LINES
|
1079 1 << PIPE_PRIM_LINE_STRIP
|
1080 1 << PIPE_PRIM_TRIANGLES
|
1081 1 << PIPE_PRIM_TRIANGLE_STRIP
|
1082 1 << PIPE_PRIM_TRIANGLE_FAN
;
1084 ctx
->primconvert
= util_primconvert_create(&ctx
->base
, prim_hwsupport
);
1085 if (!ctx
->primconvert
)
1088 ctx
->blitter
= util_blitter_create(&ctx
->base
);
1092 VkCommandPoolCreateInfo cpci
= {};
1093 cpci
.sType
= VK_STRUCTURE_TYPE_COMMAND_POOL_CREATE_INFO
;
1094 cpci
.queueFamilyIndex
= screen
->gfx_queue
;
1095 cpci
.flags
= VK_COMMAND_POOL_CREATE_RESET_COMMAND_BUFFER_BIT
;
1096 if (vkCreateCommandPool(screen
->dev
, &cpci
, NULL
, &ctx
->cmdpool
) != VK_SUCCESS
)
1099 VkCommandBufferAllocateInfo cbai
= {};
1100 cbai
.sType
= VK_STRUCTURE_TYPE_COMMAND_BUFFER_ALLOCATE_INFO
;
1101 cbai
.commandPool
= ctx
->cmdpool
;
1102 cbai
.level
= VK_COMMAND_BUFFER_LEVEL_PRIMARY
;
1103 cbai
.commandBufferCount
= 1;
1105 VkDescriptorPoolSize sizes
[] = {
1106 {VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER
, ZINK_BATCH_DESC_SIZE
},
1107 {VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER
, ZINK_BATCH_DESC_SIZE
}
1109 VkDescriptorPoolCreateInfo dpci
= {};
1110 dpci
.sType
= VK_STRUCTURE_TYPE_DESCRIPTOR_POOL_CREATE_INFO
;
1111 dpci
.pPoolSizes
= sizes
;
1112 dpci
.poolSizeCount
= ARRAY_SIZE(sizes
);
1113 dpci
.flags
= VK_DESCRIPTOR_POOL_CREATE_FREE_DESCRIPTOR_SET_BIT
;
1114 dpci
.maxSets
= ZINK_BATCH_DESC_SIZE
;
1116 for (int i
= 0; i
< ARRAY_SIZE(ctx
->batches
); ++i
) {
1117 if (vkAllocateCommandBuffers(screen
->dev
, &cbai
, &ctx
->batches
[i
].cmdbuf
) != VK_SUCCESS
)
1120 ctx
->batches
[i
].resources
= _mesa_set_create(NULL
, _mesa_hash_pointer
,
1121 _mesa_key_pointer_equal
);
1122 ctx
->batches
[i
].sampler_views
= _mesa_set_create(NULL
,
1124 _mesa_key_pointer_equal
);
1126 if (!ctx
->batches
[i
].resources
|| !ctx
->batches
[i
].sampler_views
)
1129 util_dynarray_init(&ctx
->batches
[i
].zombie_samplers
, NULL
);
1131 if (vkCreateDescriptorPool(screen
->dev
, &dpci
, 0,
1132 &ctx
->batches
[i
].descpool
) != VK_SUCCESS
)
1136 vkGetDeviceQueue(screen
->dev
, screen
->gfx_queue
, 0, &ctx
->queue
);
1138 ctx
->program_cache
= _mesa_hash_table_create(NULL
,
1140 equals_gfx_program
);
1141 ctx
->render_pass_cache
= _mesa_hash_table_create(NULL
,
1142 hash_render_pass_state
,
1143 equals_render_pass_state
);
1144 if (!ctx
->program_cache
|| !ctx
->render_pass_cache
)
1147 const uint8_t data
[] = { 0 };
1148 ctx
->dummy_buffer
= pipe_buffer_create_with_data(&ctx
->base
,
1149 PIPE_BIND_VERTEX_BUFFER
, PIPE_USAGE_IMMUTABLE
, sizeof(data
), data
);
1150 if (!ctx
->dummy_buffer
)
1153 ctx
->dirty_program
= true;
1155 /* start the first batch */
1156 zink_start_batch(ctx
, zink_curr_batch(ctx
));
1162 vkDestroyCommandPool(screen
->dev
, ctx
->cmdpool
, NULL
);