2 * Copyright 2018 Collabora Ltd.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
24 #include "zink_screen.h"
26 #include "zink_compiler.h"
27 #include "zink_context.h"
28 #include "zink_fence.h"
29 #include "zink_public.h"
30 #include "zink_resource.h"
32 #include "os/os_process.h"
33 #include "util/u_debug.h"
34 #include "util/u_format.h"
35 #include "util/u_math.h"
36 #include "util/u_memory.h"
37 #include "util/u_screen.h"
38 #include "util/u_string.h"
40 #include "state_tracker/sw_winsys.h"
42 static const struct debug_named_value
44 { "nir", ZINK_DEBUG_NIR
, "Dump NIR during program compile" },
45 { "spirv", ZINK_DEBUG_SPIRV
, "Dump SPIR-V during program compile" },
46 { "tgsi", ZINK_DEBUG_TGSI
, "Dump TGSI during program compile" },
50 DEBUG_GET_ONCE_FLAGS_OPTION(zink_debug
, "ZINK_DEBUG", debug_options
, 0)
56 zink_get_vendor(struct pipe_screen
*pscreen
)
58 return "Collabora Ltd";
62 zink_get_device_vendor(struct pipe_screen
*pscreen
)
64 struct zink_screen
*screen
= zink_screen(pscreen
);
65 static char buf
[1000];
66 snprintf(buf
, sizeof(buf
), "Unknown (vendor-id: 0x%04x)", screen
->props
.vendorID
);
71 zink_get_name(struct pipe_screen
*pscreen
)
73 struct zink_screen
*screen
= zink_screen(pscreen
);
74 static char buf
[1000];
75 snprintf(buf
, sizeof(buf
), "zink (%s)", screen
->props
.deviceName
);
80 get_video_mem(struct zink_screen
*screen
)
82 VkDeviceSize size
= 0;
83 for (uint32_t i
= 0; i
< screen
->mem_props
.memoryHeapCount
; ++i
)
84 size
+= screen
->mem_props
.memoryHeaps
[i
].size
;
85 return (int)(size
>> 20);
89 zink_get_param(struct pipe_screen
*pscreen
, enum pipe_cap param
)
91 struct zink_screen
*screen
= zink_screen(pscreen
);
94 case PIPE_CAP_NPOT_TEXTURES
:
97 case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS
:
98 return screen
->props
.limits
.maxFragmentDualSrcAttachments
;
100 case PIPE_CAP_POINT_SPRITE
:
103 case PIPE_CAP_MAX_RENDER_TARGETS
:
104 return screen
->props
.limits
.maxColorAttachments
;
106 case PIPE_CAP_OCCLUSION_QUERY
:
109 #if 0 /* TODO: Enable me */
110 case PIPE_CAP_QUERY_TIME_ELAPSED
:
114 case PIPE_CAP_TEXTURE_SWIZZLE
:
117 case PIPE_CAP_MAX_TEXTURE_2D_SIZE
:
118 return screen
->props
.limits
.maxImageDimension2D
;
119 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS
:
120 return 1 + util_logbase2(screen
->props
.limits
.maxImageDimension3D
);
121 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS
:
122 return 1 + util_logbase2(screen
->props
.limits
.maxImageDimensionCube
);
124 case PIPE_CAP_BLEND_EQUATION_SEPARATE
:
127 case PIPE_CAP_FRAGMENT_SHADER_TEXTURE_LOD
:
128 case PIPE_CAP_FRAGMENT_SHADER_DERIVATIVES
:
129 case PIPE_CAP_VERTEX_SHADER_SATURATE
:
132 case PIPE_CAP_INDEP_BLEND_ENABLE
:
133 case PIPE_CAP_INDEP_BLEND_FUNC
:
136 case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS
:
137 return screen
->props
.limits
.maxImageArrayLayers
;
139 #if 0 /* TODO: Enable me */
140 case PIPE_CAP_DEPTH_CLIP_DISABLE
:
144 #if 0 /* TODO: Enable me */
145 case PIPE_CAP_MIXED_COLORBUFFER_FORMATS
:
149 case PIPE_CAP_SEAMLESS_CUBE_MAP
:
152 case PIPE_CAP_MIN_TEXEL_OFFSET
:
153 return screen
->props
.limits
.minTexelOffset
;
154 case PIPE_CAP_MAX_TEXEL_OFFSET
:
155 return screen
->props
.limits
.maxTexelOffset
;
157 case PIPE_CAP_VERTEX_COLOR_UNCLAMPED
:
160 case PIPE_CAP_GLSL_FEATURE_LEVEL
:
161 case PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY
:
164 #if 0 /* TODO: Enable me */
165 case PIPE_CAP_COMPUTE
:
169 case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT
:
170 return screen
->props
.limits
.minUniformBufferOffsetAlignment
;
172 #if 0 /* TODO: Enable me */
173 case PIPE_CAP_QUERY_TIMESTAMP
:
177 case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT
:
178 return screen
->props
.limits
.minMemoryMapAlignment
;
180 case PIPE_CAP_CUBE_MAP_ARRAY
:
181 return screen
->feats
.imageCubeArray
;
183 case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER
:
184 return 0; /* unsure */
186 case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE
:
187 return screen
->props
.limits
.maxTexelBufferElements
;
189 case PIPE_CAP_ENDIANNESS
:
190 return PIPE_ENDIAN_NATIVE
; /* unsure */
192 case PIPE_CAP_MAX_VIEWPORTS
:
193 return screen
->props
.limits
.maxViewports
;
195 case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES
:
198 case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES
:
199 return screen
->props
.limits
.maxGeometryOutputVertices
;
200 case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS
:
201 return screen
->props
.limits
.maxGeometryOutputComponents
;
203 #if 0 /* TODO: Enable me. Enables ARB_texture_gather */
204 case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS
:
208 case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET
:
209 return screen
->props
.limits
.minTexelGatherOffset
;
210 case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET
:
211 return screen
->props
.limits
.maxTexelGatherOffset
;
213 case PIPE_CAP_VENDOR_ID
:
214 return screen
->props
.vendorID
;
215 case PIPE_CAP_DEVICE_ID
:
216 return screen
->props
.deviceID
;
218 case PIPE_CAP_ACCELERATED
:
220 case PIPE_CAP_VIDEO_MEMORY
:
221 return get_video_mem(screen
);
223 return screen
->props
.deviceType
== VK_PHYSICAL_DEVICE_TYPE_INTEGRATED_GPU
;
225 case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE
:
226 return screen
->props
.limits
.maxVertexInputBindingStride
;
228 #if 0 /* TODO: Enable me */
229 case PIPE_CAP_SAMPLER_VIEW_TARGET
:
233 #if 0 /* TODO: Enable me */
234 case PIPE_CAP_CLIP_HALFZ
:
238 #if 0 /* TODO: Enable me */
239 case PIPE_CAP_TEXTURE_FLOAT_LINEAR
:
240 case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR
:
244 case PIPE_CAP_SHAREABLE_SHADERS
:
247 #if 0 /* TODO: Enable me. Enables GL_ARB_shader_storage_buffer_object */
248 case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT
:
249 return screen
->props
.limits
.minStorageBufferOffsetAlignment
;
252 case PIPE_CAP_PCI_GROUP
:
253 case PIPE_CAP_PCI_BUS
:
254 case PIPE_CAP_PCI_DEVICE
:
255 case PIPE_CAP_PCI_FUNCTION
:
256 return 0; /* TODO: figure these out */
258 #if 0 /* TODO: Enable me */
259 case PIPE_CAP_CULL_DISTANCE
:
260 return screen
->feats
.shaderCullDistance
;
263 case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS
:
264 return screen
->props
.limits
.viewportSubPixelBits
;
266 case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY
:
267 return 0; /* not sure */
269 case PIPE_CAP_MAX_GS_INVOCATIONS
:
270 return 0; /* not implemented */
272 case PIPE_CAP_MAX_COMBINED_SHADER_BUFFERS
:
273 return screen
->props
.limits
.maxDescriptorSetStorageBuffers
;
275 case PIPE_CAP_MAX_SHADER_BUFFER_SIZE
:
276 return screen
->props
.limits
.maxStorageBufferRange
; /* unsure */
278 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT
:
279 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER
:
282 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT
:
283 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER
:
286 case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT
:
289 case PIPE_CAP_NIR_COMPACT_ARRAYS
:
292 case PIPE_CAP_FLATSHADE
:
293 case PIPE_CAP_ALPHA_TEST
:
294 case PIPE_CAP_CLIP_PLANES
:
298 return u_pipe_screen_get_param_defaults(pscreen
, param
);
303 zink_get_paramf(struct pipe_screen
*pscreen
, enum pipe_capf param
)
305 struct zink_screen
*screen
= zink_screen(pscreen
);
308 case PIPE_CAPF_MAX_LINE_WIDTH
:
309 case PIPE_CAPF_MAX_LINE_WIDTH_AA
:
310 return screen
->props
.limits
.lineWidthRange
[1];
312 case PIPE_CAPF_MAX_POINT_WIDTH
:
313 case PIPE_CAPF_MAX_POINT_WIDTH_AA
:
314 return screen
->props
.limits
.pointSizeRange
[1];
316 case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY
:
317 return screen
->props
.limits
.maxSamplerAnisotropy
;
319 case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS
:
320 return screen
->props
.limits
.maxSamplerLodBias
;
322 case PIPE_CAPF_MIN_CONSERVATIVE_RASTER_DILATE
:
323 case PIPE_CAPF_MAX_CONSERVATIVE_RASTER_DILATE
:
324 case PIPE_CAPF_CONSERVATIVE_RASTER_DILATE_GRANULARITY
:
325 return 0.0f
; /* not implemented */
328 /* should only get here on unhandled cases */
333 zink_get_shader_param(struct pipe_screen
*pscreen
,
334 enum pipe_shader_type shader
,
335 enum pipe_shader_cap param
)
337 struct zink_screen
*screen
= zink_screen(pscreen
);
340 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS
:
341 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS
:
342 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS
:
343 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS
:
344 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH
:
345 if (shader
== PIPE_SHADER_VERTEX
||
346 shader
== PIPE_SHADER_FRAGMENT
)
350 case PIPE_SHADER_CAP_MAX_INPUTS
:
352 case PIPE_SHADER_VERTEX
:
353 return MIN2(screen
->props
.limits
.maxVertexInputAttributes
,
354 PIPE_MAX_SHADER_INPUTS
);
355 case PIPE_SHADER_FRAGMENT
:
356 return MIN2(screen
->props
.limits
.maxFragmentInputComponents
/ 4,
357 PIPE_MAX_SHADER_INPUTS
);
359 return 0; /* unsupported stage */
362 case PIPE_SHADER_CAP_MAX_OUTPUTS
:
364 case PIPE_SHADER_VERTEX
:
365 return MIN2(screen
->props
.limits
.maxVertexOutputComponents
/ 4,
366 PIPE_MAX_SHADER_OUTPUTS
);
367 case PIPE_SHADER_FRAGMENT
:
368 return MIN2(screen
->props
.limits
.maxColorAttachments
,
369 PIPE_MAX_SHADER_OUTPUTS
);
371 return 0; /* unsupported stage */
374 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS
:
375 /* this might be a bit simplistic... */
376 return MIN2(screen
->props
.limits
.maxPerStageDescriptorSamplers
,
379 case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE
:
380 return MIN2(screen
->props
.limits
.maxUniformBufferRange
, INT_MAX
);
382 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS
:
383 return screen
->props
.limits
.maxPerStageDescriptorUniformBuffers
;
385 case PIPE_SHADER_CAP_MAX_TEMPS
:
388 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR
:
389 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR
:
390 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR
:
391 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR
:
392 case PIPE_SHADER_CAP_SUBROUTINES
:
393 case PIPE_SHADER_CAP_INTEGERS
:
394 case PIPE_SHADER_CAP_INT64_ATOMICS
:
395 case PIPE_SHADER_CAP_FP16
:
396 return 0; /* not implemented */
398 case PIPE_SHADER_CAP_PREFERRED_IR
:
399 return PIPE_SHADER_IR_NIR
;
401 case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED
:
402 return 0; /* not implemented */
404 case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS
:
405 return MIN2(screen
->props
.limits
.maxPerStageDescriptorSampledImages
,
406 PIPE_MAX_SHADER_SAMPLER_VIEWS
);
408 case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED
:
409 case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED
:
410 case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED
:
411 return 0; /* not implemented */
413 case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE
:
414 return 0; /* no idea */
416 case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT
:
417 return 32; /* arbitrary */
419 case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS
:
420 /* TODO: this limitation is dumb, and will need some fixes in mesa */
421 return MIN2(screen
->props
.limits
.maxPerStageDescriptorStorageBuffers
, 8);
423 case PIPE_SHADER_CAP_SUPPORTED_IRS
:
424 return (1 << PIPE_SHADER_IR_NIR
) | (1 << PIPE_SHADER_IR_TGSI
);
426 case PIPE_SHADER_CAP_MAX_SHADER_IMAGES
:
427 return MIN2(screen
->props
.limits
.maxPerStageDescriptorStorageImages
,
428 PIPE_MAX_SHADER_IMAGES
);
430 case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD
:
431 case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS
:
432 return 0; /* unsure */
434 case PIPE_SHADER_CAP_TGSI_LDEXP_SUPPORTED
:
435 case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS
:
436 case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS
:
437 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED
:
438 return 0; /* not implemented */
441 /* should only get here on unhandled cases */
445 static const VkFormat formats
[PIPE_FORMAT_COUNT
] = {
446 #define MAP_FORMAT_NORM(FMT) \
447 [PIPE_FORMAT_ ## FMT ## _UNORM] = VK_FORMAT_ ## FMT ## _UNORM, \
448 [PIPE_FORMAT_ ## FMT ## _SNORM] = VK_FORMAT_ ## FMT ## _SNORM,
450 #define MAP_FORMAT_SCALED(FMT) \
451 [PIPE_FORMAT_ ## FMT ## _USCALED] = VK_FORMAT_ ## FMT ## _USCALED, \
452 [PIPE_FORMAT_ ## FMT ## _SSCALED] = VK_FORMAT_ ## FMT ## _SSCALED,
454 #define MAP_FORMAT_INT(FMT) \
455 [PIPE_FORMAT_ ## FMT ## _UINT] = VK_FORMAT_ ## FMT ## _UINT, \
456 [PIPE_FORMAT_ ## FMT ## _SINT] = VK_FORMAT_ ## FMT ## _SINT,
458 #define MAP_FORMAT_SRGB(FMT) \
459 [PIPE_FORMAT_ ## FMT ## _SRGB] = VK_FORMAT_ ## FMT ## _SRGB,
461 #define MAP_FORMAT_FLOAT(FMT) \
462 [PIPE_FORMAT_ ## FMT ## _FLOAT] = VK_FORMAT_ ## FMT ## _SFLOAT,
468 MAP_FORMAT_SCALED(R8
)
472 MAP_FORMAT_SCALED(R16
)
474 MAP_FORMAT_FLOAT(R16
)
477 MAP_FORMAT_FLOAT(R32
)
482 MAP_FORMAT_NORM(R8G8
)
483 MAP_FORMAT_SCALED(R8G8
)
486 MAP_FORMAT_NORM(R16G16
)
487 MAP_FORMAT_SCALED(R16G16
)
488 MAP_FORMAT_INT(R16G16
)
489 MAP_FORMAT_FLOAT(R16G16
)
491 MAP_FORMAT_INT(R32G32
)
492 MAP_FORMAT_FLOAT(R32G32
)
497 MAP_FORMAT_NORM(R8G8B8
)
498 MAP_FORMAT_SCALED(R8G8B8
)
499 MAP_FORMAT_INT(R8G8B8
)
500 MAP_FORMAT_SRGB(R8G8B8
)
502 MAP_FORMAT_NORM(R16G16B16
)
503 MAP_FORMAT_SCALED(R16G16B16
)
504 MAP_FORMAT_INT(R16G16B16
)
505 MAP_FORMAT_FLOAT(R16G16B16
)
507 MAP_FORMAT_INT(R32G32B32
)
508 MAP_FORMAT_FLOAT(R32G32B32
)
513 MAP_FORMAT_NORM(R8G8B8A8
)
514 MAP_FORMAT_SCALED(R8G8B8A8
)
515 MAP_FORMAT_INT(R8G8B8A8
)
516 MAP_FORMAT_SRGB(R8G8B8A8
)
517 [PIPE_FORMAT_B8G8R8A8_UNORM
] = VK_FORMAT_B8G8R8A8_UNORM
,
518 MAP_FORMAT_SRGB(B8G8R8A8
)
519 [PIPE_FORMAT_A8B8G8R8_SRGB
] = VK_FORMAT_A8B8G8R8_SRGB_PACK32
,
521 MAP_FORMAT_NORM(R16G16B16A16
)
522 MAP_FORMAT_SCALED(R16G16B16A16
)
523 MAP_FORMAT_INT(R16G16B16A16
)
524 MAP_FORMAT_FLOAT(R16G16B16A16
)
526 MAP_FORMAT_INT(R32G32B32A32
)
527 MAP_FORMAT_FLOAT(R32G32B32A32
)
529 // other color formats
530 [PIPE_FORMAT_B5G6R5_UNORM
] = VK_FORMAT_R5G6B5_UNORM_PACK16
,
531 [PIPE_FORMAT_B5G5R5A1_UNORM
] = VK_FORMAT_B5G5R5A1_UNORM_PACK16
,
532 [PIPE_FORMAT_R11G11B10_FLOAT
] = VK_FORMAT_B10G11R11_UFLOAT_PACK32
,
533 [PIPE_FORMAT_R9G9B9E5_FLOAT
] = VK_FORMAT_E5B9G9R9_UFLOAT_PACK32
,
534 [PIPE_FORMAT_R10G10B10A2_UNORM
] = VK_FORMAT_A2B10G10R10_UNORM_PACK32
,
535 [PIPE_FORMAT_B10G10R10A2_UNORM
] = VK_FORMAT_A2R10G10B10_UNORM_PACK32
,
536 [PIPE_FORMAT_R10G10B10A2_UINT
] = VK_FORMAT_A2B10G10R10_UINT_PACK32
,
537 [PIPE_FORMAT_B10G10R10A2_UINT
] = VK_FORMAT_A2R10G10B10_UINT_PACK32
,
539 // depth/stencil formats
540 [PIPE_FORMAT_Z32_FLOAT
] = VK_FORMAT_D32_SFLOAT
,
541 [PIPE_FORMAT_Z32_FLOAT_S8X24_UINT
] = VK_FORMAT_D32_SFLOAT_S8_UINT
,
542 [PIPE_FORMAT_Z16_UNORM
] = VK_FORMAT_D16_UNORM
,
543 [PIPE_FORMAT_X8Z24_UNORM
] = VK_FORMAT_X8_D24_UNORM_PACK32
,
544 [PIPE_FORMAT_Z24_UNORM_S8_UINT
] = VK_FORMAT_D24_UNORM_S8_UINT
,
546 // compressed formats
547 [PIPE_FORMAT_DXT1_RGB
] = VK_FORMAT_BC1_RGB_UNORM_BLOCK
,
548 [PIPE_FORMAT_DXT1_RGBA
] = VK_FORMAT_BC1_RGBA_UNORM_BLOCK
,
549 [PIPE_FORMAT_DXT3_RGBA
] = VK_FORMAT_BC2_UNORM_BLOCK
,
550 [PIPE_FORMAT_DXT5_RGBA
] = VK_FORMAT_BC3_UNORM_BLOCK
,
551 [PIPE_FORMAT_RGTC1_UNORM
] = VK_FORMAT_BC4_UNORM_BLOCK
,
552 [PIPE_FORMAT_RGTC1_SNORM
] = VK_FORMAT_BC4_SNORM_BLOCK
,
553 [PIPE_FORMAT_RGTC2_UNORM
] = VK_FORMAT_BC5_UNORM_BLOCK
,
554 [PIPE_FORMAT_RGTC2_SNORM
] = VK_FORMAT_BC5_SNORM_BLOCK
,
555 [PIPE_FORMAT_BPTC_RGBA_UNORM
] = VK_FORMAT_BC7_UNORM_BLOCK
,
556 [PIPE_FORMAT_BPTC_SRGBA
] = VK_FORMAT_BC7_SRGB_BLOCK
,
557 [PIPE_FORMAT_BPTC_RGB_FLOAT
] = VK_FORMAT_BC6H_SFLOAT_BLOCK
,
558 [PIPE_FORMAT_BPTC_RGB_UFLOAT
] = VK_FORMAT_BC6H_UFLOAT_BLOCK
,
562 zink_get_format(enum pipe_format format
)
564 return formats
[format
];
567 static VkSampleCountFlagBits
568 vk_sample_count_flags(uint32_t sample_count
)
570 switch (sample_count
) {
571 case 1: return VK_SAMPLE_COUNT_1_BIT
;
572 case 2: return VK_SAMPLE_COUNT_2_BIT
;
573 case 4: return VK_SAMPLE_COUNT_4_BIT
;
574 case 8: return VK_SAMPLE_COUNT_8_BIT
;
575 case 16: return VK_SAMPLE_COUNT_16_BIT
;
576 case 32: return VK_SAMPLE_COUNT_32_BIT
;
577 case 64: return VK_SAMPLE_COUNT_64_BIT
;
584 zink_is_format_supported(struct pipe_screen
*pscreen
,
585 enum pipe_format format
,
586 enum pipe_texture_target target
,
587 unsigned sample_count
,
588 unsigned storage_sample_count
,
591 struct zink_screen
*screen
= zink_screen(pscreen
);
593 if (format
== PIPE_FORMAT_NONE
)
594 return screen
->props
.limits
.framebufferNoAttachmentsSampleCounts
&
595 vk_sample_count_flags(sample_count
);
597 VkFormat vkformat
= formats
[format
];
598 if (vkformat
== VK_FORMAT_UNDEFINED
)
601 if (sample_count
>= 1) {
602 VkSampleCountFlagBits sample_mask
= vk_sample_count_flags(sample_count
);
603 const struct util_format_description
*desc
= util_format_description(format
);
604 if (util_format_is_depth_or_stencil(format
)) {
605 if (util_format_has_depth(desc
)) {
606 if (bind
& PIPE_BIND_DEPTH_STENCIL
&&
607 (screen
->props
.limits
.framebufferDepthSampleCounts
& sample_mask
) != sample_mask
)
609 if (bind
& PIPE_BIND_SAMPLER_VIEW
&&
610 (screen
->props
.limits
.sampledImageDepthSampleCounts
& sample_mask
) != sample_mask
)
613 if (util_format_has_stencil(desc
)) {
614 if (bind
& PIPE_BIND_DEPTH_STENCIL
&&
615 (screen
->props
.limits
.framebufferStencilSampleCounts
& sample_mask
) != sample_mask
)
617 if (bind
& PIPE_BIND_SAMPLER_VIEW
&&
618 (screen
->props
.limits
.sampledImageStencilSampleCounts
& sample_mask
) != sample_mask
)
621 } else if (util_format_is_pure_integer(format
)) {
622 if (bind
& PIPE_BIND_RENDER_TARGET
&&
623 !(screen
->props
.limits
.framebufferColorSampleCounts
& sample_mask
))
625 if (bind
& PIPE_BIND_SAMPLER_VIEW
&&
626 !(screen
->props
.limits
.sampledImageIntegerSampleCounts
& sample_mask
))
629 if (bind
& PIPE_BIND_RENDER_TARGET
&&
630 !(screen
->props
.limits
.framebufferColorSampleCounts
& sample_mask
))
632 if (bind
& PIPE_BIND_SAMPLER_VIEW
&&
633 !(screen
->props
.limits
.sampledImageColorSampleCounts
& sample_mask
))
638 VkFormatProperties props
;
639 vkGetPhysicalDeviceFormatProperties(screen
->pdev
, vkformat
, &props
);
641 if (target
== PIPE_BUFFER
) {
642 if (bind
& PIPE_BIND_VERTEX_BUFFER
&&
643 !(props
.bufferFeatures
& VK_FORMAT_FEATURE_VERTEX_BUFFER_BIT
))
646 /* all other targets are texture-targets */
647 if (bind
& PIPE_BIND_RENDER_TARGET
&&
648 !(props
.optimalTilingFeatures
& VK_FORMAT_FEATURE_COLOR_ATTACHMENT_BIT
))
651 if (bind
& PIPE_BIND_BLENDABLE
&&
652 !(props
.optimalTilingFeatures
& VK_FORMAT_FEATURE_COLOR_ATTACHMENT_BLEND_BIT
))
655 if (bind
& PIPE_BIND_SAMPLER_VIEW
&&
656 !(props
.optimalTilingFeatures
& VK_FORMAT_FEATURE_SAMPLED_IMAGE_BIT
))
659 if (bind
& PIPE_BIND_DEPTH_STENCIL
&&
660 !(props
.optimalTilingFeatures
& VK_FORMAT_FEATURE_DEPTH_STENCIL_ATTACHMENT_BIT
))
664 if (util_format_is_compressed(format
)) {
665 const struct util_format_description
*desc
= util_format_description(format
);
666 if (desc
->layout
== UTIL_FORMAT_LAYOUT_BPTC
&&
667 !screen
->feats
.textureCompressionBC
)
675 zink_destroy_screen(struct pipe_screen
*pscreen
)
677 struct zink_screen
*screen
= zink_screen(pscreen
);
678 slab_destroy_parent(&screen
->transfer_pool
);
685 VkApplicationInfo ai
= {};
686 ai
.sType
= VK_STRUCTURE_TYPE_APPLICATION_INFO
;
689 if (os_get_process_name(proc_name
, ARRAY_SIZE(proc_name
)))
690 ai
.pApplicationName
= proc_name
;
692 ai
.pApplicationName
= "unknown";
694 ai
.pEngineName
= "mesa zink";
695 ai
.apiVersion
= VK_API_VERSION_1_0
;
697 const char *extensions
[] = {
698 VK_KHR_GET_PHYSICAL_DEVICE_PROPERTIES_2_EXTENSION_NAME
,
699 VK_KHR_EXTERNAL_MEMORY_CAPABILITIES_EXTENSION_NAME
,
702 VkInstanceCreateInfo ici
= {};
703 ici
.sType
= VK_STRUCTURE_TYPE_INSTANCE_CREATE_INFO
;
704 ici
.pApplicationInfo
= &ai
;
705 ici
.ppEnabledExtensionNames
= extensions
;
706 ici
.enabledExtensionCount
= ARRAY_SIZE(extensions
);
708 VkInstance instance
= VK_NULL_HANDLE
;
709 VkResult err
= vkCreateInstance(&ici
, NULL
, &instance
);
710 if (err
!= VK_SUCCESS
)
711 return VK_NULL_HANDLE
;
716 static VkPhysicalDevice
717 choose_pdev(const VkInstance instance
)
719 uint32_t i
, pdev_count
;
720 VkPhysicalDevice
*pdevs
, pdev
;
721 vkEnumeratePhysicalDevices(instance
, &pdev_count
, NULL
);
722 assert(pdev_count
> 0);
724 pdevs
= malloc(sizeof(*pdevs
) * pdev_count
);
725 vkEnumeratePhysicalDevices(instance
, &pdev_count
, pdevs
);
726 assert(pdev_count
> 0);
729 for (i
= 0; i
< pdev_count
; ++i
) {
730 VkPhysicalDeviceProperties props
;
731 vkGetPhysicalDeviceProperties(pdevs
[i
], &props
);
732 if (props
.deviceType
== VK_PHYSICAL_DEVICE_TYPE_DISCRETE_GPU
) {
742 find_gfx_queue(const VkPhysicalDevice pdev
)
745 vkGetPhysicalDeviceQueueFamilyProperties(pdev
, &num_queues
, NULL
);
746 assert(num_queues
> 0);
748 VkQueueFamilyProperties
*props
= malloc(sizeof(*props
) * num_queues
);
749 vkGetPhysicalDeviceQueueFamilyProperties(pdev
, &num_queues
, props
);
751 for (uint32_t i
= 0; i
< num_queues
; i
++) {
752 if (props
[i
].queueFlags
& VK_QUEUE_GRAPHICS_BIT
) {
762 zink_flush_frontbuffer(struct pipe_screen
*pscreen
,
763 struct pipe_resource
*pres
,
764 unsigned level
, unsigned layer
,
765 void *winsys_drawable_handle
,
766 struct pipe_box
*sub_box
)
768 struct zink_screen
*screen
= zink_screen(pscreen
);
769 struct sw_winsys
*winsys
= screen
->winsys
;
770 struct zink_resource
*res
= zink_resource(pres
);
774 void *map
= winsys
->displaytarget_map(winsys
, res
->dt
, 0);
777 VkImageSubresource isr
= {};
778 isr
.aspectMask
= res
->aspect
;
779 isr
.mipLevel
= level
;
780 isr
.arrayLayer
= layer
;
781 VkSubresourceLayout layout
;
782 vkGetImageSubresourceLayout(screen
->dev
, res
->image
, &isr
, &layout
);
785 VkResult result
= vkMapMemory(screen
->dev
, res
->mem
, res
->offset
, res
->size
, 0, &ptr
);
786 if (result
!= VK_SUCCESS
) {
787 debug_printf("failed to map memory for display\n");
790 for (int i
= 0; i
< pres
->height0
; ++i
) {
791 uint8_t *src
= (uint8_t *)ptr
+ i
* layout
.rowPitch
;
792 uint8_t *dst
= (uint8_t *)map
+ i
* res
->dt_stride
;
793 memcpy(dst
, src
, res
->dt_stride
);
795 vkUnmapMemory(screen
->dev
, res
->mem
);
798 winsys
->displaytarget_unmap(winsys
, res
->dt
);
802 winsys
->displaytarget_display(winsys
, res
->dt
, winsys_drawable_handle
, sub_box
);
805 static struct pipe_screen
*
806 zink_internal_create_screen(struct sw_winsys
*winsys
, int fd
)
808 struct zink_screen
*screen
= CALLOC_STRUCT(zink_screen
);
812 zink_debug
= debug_get_option_zink_debug();
814 screen
->instance
= create_instance();
815 screen
->pdev
= choose_pdev(screen
->instance
);
816 screen
->gfx_queue
= find_gfx_queue(screen
->pdev
);
818 vkGetPhysicalDeviceProperties(screen
->pdev
, &screen
->props
);
819 vkGetPhysicalDeviceFeatures(screen
->pdev
, &screen
->feats
);
820 vkGetPhysicalDeviceMemoryProperties(screen
->pdev
, &screen
->mem_props
);
822 uint32_t num_extensions
= 0;
823 if (vkEnumerateDeviceExtensionProperties(screen
->pdev
, NULL
,
824 &num_extensions
, NULL
) == VK_SUCCESS
&& num_extensions
> 0) {
825 VkExtensionProperties
*extensions
= MALLOC(sizeof(VkExtensionProperties
) *
828 vkEnumerateDeviceExtensionProperties(screen
->pdev
, NULL
,
829 &num_extensions
, extensions
);
831 for (uint32_t i
= 0; i
< num_extensions
; ++i
) {
832 if (!strcmp(extensions
[i
].extensionName
,
833 VK_KHR_MAINTENANCE1_EXTENSION_NAME
))
834 screen
->have_VK_KHR_maintenance1
= true;
840 VkDeviceQueueCreateInfo qci
= {};
842 qci
.sType
= VK_STRUCTURE_TYPE_DEVICE_QUEUE_CREATE_INFO
;
843 qci
.queueFamilyIndex
= screen
->gfx_queue
;
845 qci
.pQueuePriorities
= &dummy
;
847 VkDeviceCreateInfo dci
= {};
848 dci
.sType
= VK_STRUCTURE_TYPE_DEVICE_CREATE_INFO
;
849 dci
.queueCreateInfoCount
= 1;
850 dci
.pQueueCreateInfos
= &qci
;
851 dci
.pEnabledFeatures
= &screen
->feats
;
852 const char *extensions
[] = {
853 VK_KHR_MAINTENANCE1_EXTENSION_NAME
,
854 VK_KHR_EXTERNAL_MEMORY_EXTENSION_NAME
,
855 VK_KHR_EXTERNAL_MEMORY_FD_EXTENSION_NAME
,
857 dci
.ppEnabledExtensionNames
= extensions
;
858 dci
.enabledExtensionCount
= ARRAY_SIZE(extensions
);
859 if (vkCreateDevice(screen
->pdev
, &dci
, NULL
, &screen
->dev
) != VK_SUCCESS
)
862 screen
->winsys
= winsys
;
864 screen
->base
.get_name
= zink_get_name
;
865 screen
->base
.get_vendor
= zink_get_vendor
;
866 screen
->base
.get_device_vendor
= zink_get_device_vendor
;
867 screen
->base
.get_param
= zink_get_param
;
868 screen
->base
.get_paramf
= zink_get_paramf
;
869 screen
->base
.get_shader_param
= zink_get_shader_param
;
870 screen
->base
.get_compiler_options
= zink_get_compiler_options
;
871 screen
->base
.is_format_supported
= zink_is_format_supported
;
872 screen
->base
.context_create
= zink_context_create
;
873 screen
->base
.flush_frontbuffer
= zink_flush_frontbuffer
;
874 screen
->base
.destroy
= zink_destroy_screen
;
876 zink_screen_resource_init(&screen
->base
);
877 zink_screen_fence_init(&screen
->base
);
879 slab_create_parent(&screen
->transfer_pool
, sizeof(struct zink_transfer
), 16);
881 return &screen
->base
;
889 zink_create_screen(struct sw_winsys
*winsys
)
891 return zink_internal_create_screen(winsys
, -1);
895 zink_drm_create_screen(int fd
)
897 return zink_internal_create_screen(NULL
, fd
);