2 * Copyright 2018 Collabora Ltd.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
24 #include "zink_screen.h"
26 #include "zink_compiler.h"
27 #include "zink_context.h"
28 #include "zink_fence.h"
29 #include "zink_public.h"
30 #include "zink_resource.h"
32 #include "os/os_process.h"
33 #include "util/u_debug.h"
34 #include "util/u_format.h"
35 #include "util/u_math.h"
36 #include "util/u_memory.h"
37 #include "util/u_screen.h"
38 #include "util/u_string.h"
40 #include "state_tracker/sw_winsys.h"
42 static const struct debug_named_value
44 { "nir", ZINK_DEBUG_NIR
, "Dump NIR during program compile" },
45 { "spirv", ZINK_DEBUG_SPIRV
, "Dump SPIR-V during program compile" },
46 { "tgsi", ZINK_DEBUG_TGSI
, "Dump TGSI during program compile" },
50 DEBUG_GET_ONCE_FLAGS_OPTION(zink_debug
, "ZINK_DEBUG", debug_options
, 0)
56 zink_get_vendor(struct pipe_screen
*pscreen
)
58 return "Collabora Ltd";
62 zink_get_device_vendor(struct pipe_screen
*pscreen
)
64 struct zink_screen
*screen
= zink_screen(pscreen
);
65 static char buf
[1000];
66 snprintf(buf
, sizeof(buf
), "Unknown (vendor-id: 0x%04x)", screen
->props
.vendorID
);
71 zink_get_name(struct pipe_screen
*pscreen
)
73 struct zink_screen
*screen
= zink_screen(pscreen
);
74 static char buf
[1000];
75 snprintf(buf
, sizeof(buf
), "zink (%s)", screen
->props
.deviceName
);
80 get_video_mem(struct zink_screen
*screen
)
82 VkDeviceSize size
= 0;
83 for (uint32_t i
= 0; i
< screen
->mem_props
.memoryHeapCount
; ++i
)
84 size
+= screen
->mem_props
.memoryHeaps
[i
].size
;
85 return (int)(size
>> 20);
89 zink_get_param(struct pipe_screen
*pscreen
, enum pipe_cap param
)
91 struct zink_screen
*screen
= zink_screen(pscreen
);
94 case PIPE_CAP_NPOT_TEXTURES
:
97 case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS
:
98 return screen
->props
.limits
.maxFragmentDualSrcAttachments
;
100 case PIPE_CAP_POINT_SPRITE
:
103 case PIPE_CAP_MAX_RENDER_TARGETS
:
104 return screen
->props
.limits
.maxColorAttachments
;
106 case PIPE_CAP_OCCLUSION_QUERY
:
109 #if 0 /* TODO: Enable me */
110 case PIPE_CAP_QUERY_TIME_ELAPSED
:
114 case PIPE_CAP_TEXTURE_SWIZZLE
:
117 case PIPE_CAP_MAX_TEXTURE_2D_SIZE
:
118 return screen
->props
.limits
.maxImageDimension2D
;
119 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS
:
120 return 1 + util_logbase2(screen
->props
.limits
.maxImageDimension3D
);
121 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS
:
122 return 1 + util_logbase2(screen
->props
.limits
.maxImageDimensionCube
);
124 case PIPE_CAP_BLEND_EQUATION_SEPARATE
:
127 case PIPE_CAP_FRAGMENT_SHADER_TEXTURE_LOD
:
128 return 0; /* TODO: re-enable after implementing nir_texop_txd */
130 case PIPE_CAP_FRAGMENT_SHADER_DERIVATIVES
:
131 case PIPE_CAP_VERTEX_SHADER_SATURATE
:
134 case PIPE_CAP_INDEP_BLEND_ENABLE
:
135 case PIPE_CAP_INDEP_BLEND_FUNC
:
138 case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS
:
139 return screen
->props
.limits
.maxImageArrayLayers
;
141 #if 0 /* TODO: Enable me */
142 case PIPE_CAP_DEPTH_CLIP_DISABLE
:
146 #if 0 /* TODO: Enable me */
147 case PIPE_CAP_MIXED_COLORBUFFER_FORMATS
:
151 case PIPE_CAP_SEAMLESS_CUBE_MAP
:
154 case PIPE_CAP_MIN_TEXEL_OFFSET
:
155 return screen
->props
.limits
.minTexelOffset
;
156 case PIPE_CAP_MAX_TEXEL_OFFSET
:
157 return screen
->props
.limits
.maxTexelOffset
;
159 case PIPE_CAP_VERTEX_COLOR_UNCLAMPED
:
162 case PIPE_CAP_GLSL_FEATURE_LEVEL
:
163 case PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY
:
166 #if 0 /* TODO: Enable me */
167 case PIPE_CAP_COMPUTE
:
171 case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT
:
172 return screen
->props
.limits
.minUniformBufferOffsetAlignment
;
174 #if 0 /* TODO: Enable me */
175 case PIPE_CAP_QUERY_TIMESTAMP
:
179 case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT
:
180 return screen
->props
.limits
.minMemoryMapAlignment
;
182 case PIPE_CAP_CUBE_MAP_ARRAY
:
183 return screen
->feats
.imageCubeArray
;
185 case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER
:
186 return 0; /* unsure */
188 case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE
:
189 return screen
->props
.limits
.maxTexelBufferElements
;
191 case PIPE_CAP_ENDIANNESS
:
192 return PIPE_ENDIAN_NATIVE
; /* unsure */
194 case PIPE_CAP_MAX_VIEWPORTS
:
195 return screen
->props
.limits
.maxViewports
;
197 case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES
:
200 case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES
:
201 return screen
->props
.limits
.maxGeometryOutputVertices
;
202 case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS
:
203 return screen
->props
.limits
.maxGeometryOutputComponents
;
205 #if 0 /* TODO: Enable me. Enables ARB_texture_gather */
206 case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS
:
210 case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET
:
211 return screen
->props
.limits
.minTexelGatherOffset
;
212 case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET
:
213 return screen
->props
.limits
.maxTexelGatherOffset
;
215 case PIPE_CAP_VENDOR_ID
:
216 return screen
->props
.vendorID
;
217 case PIPE_CAP_DEVICE_ID
:
218 return screen
->props
.deviceID
;
220 case PIPE_CAP_ACCELERATED
:
222 case PIPE_CAP_VIDEO_MEMORY
:
223 return get_video_mem(screen
);
225 return screen
->props
.deviceType
== VK_PHYSICAL_DEVICE_TYPE_INTEGRATED_GPU
;
227 case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE
:
228 return screen
->props
.limits
.maxVertexInputBindingStride
;
230 #if 0 /* TODO: Enable me */
231 case PIPE_CAP_SAMPLER_VIEW_TARGET
:
235 #if 0 /* TODO: Enable me */
236 case PIPE_CAP_CLIP_HALFZ
:
240 #if 0 /* TODO: Enable me */
241 case PIPE_CAP_TEXTURE_FLOAT_LINEAR
:
242 case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR
:
246 case PIPE_CAP_SHAREABLE_SHADERS
:
249 #if 0 /* TODO: Enable me. Enables GL_ARB_shader_storage_buffer_object */
250 case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT
:
251 return screen
->props
.limits
.minStorageBufferOffsetAlignment
;
254 case PIPE_CAP_PCI_GROUP
:
255 case PIPE_CAP_PCI_BUS
:
256 case PIPE_CAP_PCI_DEVICE
:
257 case PIPE_CAP_PCI_FUNCTION
:
258 return 0; /* TODO: figure these out */
260 #if 0 /* TODO: Enable me */
261 case PIPE_CAP_CULL_DISTANCE
:
262 return screen
->feats
.shaderCullDistance
;
265 case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS
:
266 return screen
->props
.limits
.viewportSubPixelBits
;
268 case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY
:
269 return 0; /* not sure */
271 case PIPE_CAP_MAX_GS_INVOCATIONS
:
272 return 0; /* not implemented */
274 case PIPE_CAP_MAX_COMBINED_SHADER_BUFFERS
:
275 return screen
->props
.limits
.maxDescriptorSetStorageBuffers
;
277 case PIPE_CAP_MAX_SHADER_BUFFER_SIZE
:
278 return screen
->props
.limits
.maxStorageBufferRange
; /* unsure */
280 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT
:
281 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER
:
284 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT
:
285 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER
:
288 case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT
:
291 case PIPE_CAP_NIR_COMPACT_ARRAYS
:
294 case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL
:
297 case PIPE_CAP_FLATSHADE
:
298 case PIPE_CAP_ALPHA_TEST
:
299 case PIPE_CAP_CLIP_PLANES
:
300 case PIPE_CAP_POINT_SIZE_FIXED
:
301 case PIPE_CAP_TWO_SIDED_COLOR
:
304 case PIPE_CAP_DMABUF
:
305 return screen
->have_KHR_external_memory_fd
;
308 return u_pipe_screen_get_param_defaults(pscreen
, param
);
313 zink_get_paramf(struct pipe_screen
*pscreen
, enum pipe_capf param
)
315 struct zink_screen
*screen
= zink_screen(pscreen
);
318 case PIPE_CAPF_MAX_LINE_WIDTH
:
319 case PIPE_CAPF_MAX_LINE_WIDTH_AA
:
320 return screen
->props
.limits
.lineWidthRange
[1];
322 case PIPE_CAPF_MAX_POINT_WIDTH
:
323 case PIPE_CAPF_MAX_POINT_WIDTH_AA
:
324 return screen
->props
.limits
.pointSizeRange
[1];
326 case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY
:
327 return screen
->props
.limits
.maxSamplerAnisotropy
;
329 case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS
:
330 return screen
->props
.limits
.maxSamplerLodBias
;
332 case PIPE_CAPF_MIN_CONSERVATIVE_RASTER_DILATE
:
333 case PIPE_CAPF_MAX_CONSERVATIVE_RASTER_DILATE
:
334 case PIPE_CAPF_CONSERVATIVE_RASTER_DILATE_GRANULARITY
:
335 return 0.0f
; /* not implemented */
338 /* should only get here on unhandled cases */
343 zink_get_shader_param(struct pipe_screen
*pscreen
,
344 enum pipe_shader_type shader
,
345 enum pipe_shader_cap param
)
347 struct zink_screen
*screen
= zink_screen(pscreen
);
350 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS
:
351 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS
:
352 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS
:
353 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS
:
354 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH
:
355 if (shader
== PIPE_SHADER_VERTEX
||
356 shader
== PIPE_SHADER_FRAGMENT
)
360 case PIPE_SHADER_CAP_MAX_INPUTS
:
362 case PIPE_SHADER_VERTEX
:
363 return MIN2(screen
->props
.limits
.maxVertexInputAttributes
,
364 PIPE_MAX_SHADER_INPUTS
);
365 case PIPE_SHADER_FRAGMENT
:
366 return MIN2(screen
->props
.limits
.maxFragmentInputComponents
/ 4,
367 PIPE_MAX_SHADER_INPUTS
);
369 return 0; /* unsupported stage */
372 case PIPE_SHADER_CAP_MAX_OUTPUTS
:
374 case PIPE_SHADER_VERTEX
:
375 return MIN2(screen
->props
.limits
.maxVertexOutputComponents
/ 4,
376 PIPE_MAX_SHADER_OUTPUTS
);
377 case PIPE_SHADER_FRAGMENT
:
378 return MIN2(screen
->props
.limits
.maxColorAttachments
,
379 PIPE_MAX_SHADER_OUTPUTS
);
381 return 0; /* unsupported stage */
384 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS
:
385 /* this might be a bit simplistic... */
386 return MIN2(screen
->props
.limits
.maxPerStageDescriptorSamplers
,
389 case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE
:
390 return MIN2(screen
->props
.limits
.maxUniformBufferRange
, INT_MAX
);
392 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS
:
393 return screen
->props
.limits
.maxPerStageDescriptorUniformBuffers
;
395 case PIPE_SHADER_CAP_MAX_TEMPS
:
398 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR
:
399 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR
:
400 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR
:
401 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR
:
402 case PIPE_SHADER_CAP_SUBROUTINES
:
403 case PIPE_SHADER_CAP_INTEGERS
:
404 case PIPE_SHADER_CAP_INT64_ATOMICS
:
405 case PIPE_SHADER_CAP_FP16
:
406 return 0; /* not implemented */
408 case PIPE_SHADER_CAP_PREFERRED_IR
:
409 return PIPE_SHADER_IR_NIR
;
411 case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED
:
412 return 0; /* not implemented */
414 case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS
:
415 return MIN2(screen
->props
.limits
.maxPerStageDescriptorSampledImages
,
416 PIPE_MAX_SHADER_SAMPLER_VIEWS
);
418 case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED
:
419 case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED
:
420 case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED
:
421 return 0; /* not implemented */
423 case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE
:
424 return 0; /* no idea */
426 case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT
:
427 return 32; /* arbitrary */
429 case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS
:
430 /* TODO: this limitation is dumb, and will need some fixes in mesa */
431 return MIN2(screen
->props
.limits
.maxPerStageDescriptorStorageBuffers
, 8);
433 case PIPE_SHADER_CAP_SUPPORTED_IRS
:
434 return (1 << PIPE_SHADER_IR_NIR
) | (1 << PIPE_SHADER_IR_TGSI
);
436 case PIPE_SHADER_CAP_MAX_SHADER_IMAGES
:
437 return MIN2(screen
->props
.limits
.maxPerStageDescriptorStorageImages
,
438 PIPE_MAX_SHADER_IMAGES
);
440 case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD
:
441 case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS
:
442 return 0; /* unsure */
444 case PIPE_SHADER_CAP_TGSI_LDEXP_SUPPORTED
:
445 case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS
:
446 case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS
:
447 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED
:
448 return 0; /* not implemented */
451 /* should only get here on unhandled cases */
455 static const VkFormat formats
[PIPE_FORMAT_COUNT
] = {
456 #define MAP_FORMAT_NORM(FMT) \
457 [PIPE_FORMAT_ ## FMT ## _UNORM] = VK_FORMAT_ ## FMT ## _UNORM, \
458 [PIPE_FORMAT_ ## FMT ## _SNORM] = VK_FORMAT_ ## FMT ## _SNORM,
460 #define MAP_FORMAT_SCALED(FMT) \
461 [PIPE_FORMAT_ ## FMT ## _USCALED] = VK_FORMAT_ ## FMT ## _USCALED, \
462 [PIPE_FORMAT_ ## FMT ## _SSCALED] = VK_FORMAT_ ## FMT ## _SSCALED,
464 #define MAP_FORMAT_INT(FMT) \
465 [PIPE_FORMAT_ ## FMT ## _UINT] = VK_FORMAT_ ## FMT ## _UINT, \
466 [PIPE_FORMAT_ ## FMT ## _SINT] = VK_FORMAT_ ## FMT ## _SINT,
468 #define MAP_FORMAT_SRGB(FMT) \
469 [PIPE_FORMAT_ ## FMT ## _SRGB] = VK_FORMAT_ ## FMT ## _SRGB,
471 #define MAP_FORMAT_FLOAT(FMT) \
472 [PIPE_FORMAT_ ## FMT ## _FLOAT] = VK_FORMAT_ ## FMT ## _SFLOAT,
478 MAP_FORMAT_SCALED(R8
)
482 MAP_FORMAT_SCALED(R16
)
484 MAP_FORMAT_FLOAT(R16
)
487 MAP_FORMAT_FLOAT(R32
)
492 MAP_FORMAT_NORM(R8G8
)
493 MAP_FORMAT_SCALED(R8G8
)
496 MAP_FORMAT_NORM(R16G16
)
497 MAP_FORMAT_SCALED(R16G16
)
498 MAP_FORMAT_INT(R16G16
)
499 MAP_FORMAT_FLOAT(R16G16
)
501 MAP_FORMAT_INT(R32G32
)
502 MAP_FORMAT_FLOAT(R32G32
)
507 MAP_FORMAT_NORM(R8G8B8
)
508 MAP_FORMAT_SCALED(R8G8B8
)
509 MAP_FORMAT_INT(R8G8B8
)
510 MAP_FORMAT_SRGB(R8G8B8
)
512 MAP_FORMAT_NORM(R16G16B16
)
513 MAP_FORMAT_SCALED(R16G16B16
)
514 MAP_FORMAT_INT(R16G16B16
)
515 MAP_FORMAT_FLOAT(R16G16B16
)
517 MAP_FORMAT_INT(R32G32B32
)
518 MAP_FORMAT_FLOAT(R32G32B32
)
523 MAP_FORMAT_NORM(R8G8B8A8
)
524 MAP_FORMAT_SCALED(R8G8B8A8
)
525 MAP_FORMAT_INT(R8G8B8A8
)
526 MAP_FORMAT_SRGB(R8G8B8A8
)
527 [PIPE_FORMAT_B8G8R8A8_UNORM
] = VK_FORMAT_B8G8R8A8_UNORM
,
528 [PIPE_FORMAT_B8G8R8X8_UNORM
] = VK_FORMAT_B8G8R8A8_UNORM
,
529 MAP_FORMAT_SRGB(B8G8R8A8
)
530 [PIPE_FORMAT_A8B8G8R8_SRGB
] = VK_FORMAT_A8B8G8R8_SRGB_PACK32
,
532 MAP_FORMAT_NORM(R16G16B16A16
)
533 MAP_FORMAT_SCALED(R16G16B16A16
)
534 MAP_FORMAT_INT(R16G16B16A16
)
535 MAP_FORMAT_FLOAT(R16G16B16A16
)
537 MAP_FORMAT_INT(R32G32B32A32
)
538 MAP_FORMAT_FLOAT(R32G32B32A32
)
540 // other color formats
541 [PIPE_FORMAT_B5G6R5_UNORM
] = VK_FORMAT_R5G6B5_UNORM_PACK16
,
542 [PIPE_FORMAT_B5G5R5A1_UNORM
] = VK_FORMAT_B5G5R5A1_UNORM_PACK16
,
543 [PIPE_FORMAT_R11G11B10_FLOAT
] = VK_FORMAT_B10G11R11_UFLOAT_PACK32
,
544 [PIPE_FORMAT_R9G9B9E5_FLOAT
] = VK_FORMAT_E5B9G9R9_UFLOAT_PACK32
,
545 [PIPE_FORMAT_R10G10B10A2_UNORM
] = VK_FORMAT_A2B10G10R10_UNORM_PACK32
,
546 [PIPE_FORMAT_B10G10R10A2_UNORM
] = VK_FORMAT_A2R10G10B10_UNORM_PACK32
,
547 [PIPE_FORMAT_R10G10B10A2_UINT
] = VK_FORMAT_A2B10G10R10_UINT_PACK32
,
548 [PIPE_FORMAT_B10G10R10A2_UINT
] = VK_FORMAT_A2R10G10B10_UINT_PACK32
,
550 // depth/stencil formats
551 [PIPE_FORMAT_Z32_FLOAT
] = VK_FORMAT_D32_SFLOAT
,
552 [PIPE_FORMAT_Z32_FLOAT_S8X24_UINT
] = VK_FORMAT_D32_SFLOAT_S8_UINT
,
553 [PIPE_FORMAT_Z16_UNORM
] = VK_FORMAT_D16_UNORM
,
554 [PIPE_FORMAT_X8Z24_UNORM
] = VK_FORMAT_X8_D24_UNORM_PACK32
,
555 [PIPE_FORMAT_Z24_UNORM_S8_UINT
] = VK_FORMAT_D24_UNORM_S8_UINT
,
557 // compressed formats
558 [PIPE_FORMAT_DXT1_RGB
] = VK_FORMAT_BC1_RGB_UNORM_BLOCK
,
559 [PIPE_FORMAT_DXT1_RGBA
] = VK_FORMAT_BC1_RGBA_UNORM_BLOCK
,
560 [PIPE_FORMAT_DXT3_RGBA
] = VK_FORMAT_BC2_UNORM_BLOCK
,
561 [PIPE_FORMAT_DXT5_RGBA
] = VK_FORMAT_BC3_UNORM_BLOCK
,
562 [PIPE_FORMAT_DXT1_SRGB
] = VK_FORMAT_BC1_RGB_SRGB_BLOCK
,
563 [PIPE_FORMAT_DXT1_SRGBA
] = VK_FORMAT_BC1_RGBA_SRGB_BLOCK
,
564 [PIPE_FORMAT_DXT3_SRGBA
] = VK_FORMAT_BC2_SRGB_BLOCK
,
565 [PIPE_FORMAT_DXT5_SRGBA
] = VK_FORMAT_BC3_SRGB_BLOCK
,
567 [PIPE_FORMAT_RGTC1_UNORM
] = VK_FORMAT_BC4_UNORM_BLOCK
,
568 [PIPE_FORMAT_RGTC1_SNORM
] = VK_FORMAT_BC4_SNORM_BLOCK
,
569 [PIPE_FORMAT_RGTC2_UNORM
] = VK_FORMAT_BC5_UNORM_BLOCK
,
570 [PIPE_FORMAT_RGTC2_SNORM
] = VK_FORMAT_BC5_SNORM_BLOCK
,
571 [PIPE_FORMAT_BPTC_RGBA_UNORM
] = VK_FORMAT_BC7_UNORM_BLOCK
,
572 [PIPE_FORMAT_BPTC_SRGBA
] = VK_FORMAT_BC7_SRGB_BLOCK
,
573 [PIPE_FORMAT_BPTC_RGB_FLOAT
] = VK_FORMAT_BC6H_SFLOAT_BLOCK
,
574 [PIPE_FORMAT_BPTC_RGB_UFLOAT
] = VK_FORMAT_BC6H_UFLOAT_BLOCK
,
578 is_depth_format_supported(struct zink_screen
*screen
, VkFormat format
)
580 VkFormatProperties props
;
581 vkGetPhysicalDeviceFormatProperties(screen
->pdev
, format
, &props
);
582 return (props
.linearTilingFeatures
| props
.optimalTilingFeatures
) &
583 VK_FORMAT_FEATURE_DEPTH_STENCIL_ATTACHMENT_BIT
;
587 zink_get_format(struct zink_screen
*screen
, enum pipe_format format
)
589 VkFormat ret
= formats
[format
];
591 if (ret
== VK_FORMAT_X8_D24_UNORM_PACK32
&&
592 !screen
->have_X8_D24_UNORM_PACK32
) {
593 assert(is_depth_format_supported(screen
, VK_FORMAT_D32_SFLOAT
));
594 return VK_FORMAT_D32_SFLOAT
;
597 if (ret
== VK_FORMAT_D24_UNORM_S8_UINT
&&
598 !screen
->have_D24_UNORM_S8_UINT
) {
599 assert(is_depth_format_supported(screen
, VK_FORMAT_D32_SFLOAT_S8_UINT
));
600 return VK_FORMAT_D32_SFLOAT_S8_UINT
;
606 static VkSampleCountFlagBits
607 vk_sample_count_flags(uint32_t sample_count
)
609 switch (sample_count
) {
610 case 1: return VK_SAMPLE_COUNT_1_BIT
;
611 case 2: return VK_SAMPLE_COUNT_2_BIT
;
612 case 4: return VK_SAMPLE_COUNT_4_BIT
;
613 case 8: return VK_SAMPLE_COUNT_8_BIT
;
614 case 16: return VK_SAMPLE_COUNT_16_BIT
;
615 case 32: return VK_SAMPLE_COUNT_32_BIT
;
616 case 64: return VK_SAMPLE_COUNT_64_BIT
;
623 zink_is_format_supported(struct pipe_screen
*pscreen
,
624 enum pipe_format format
,
625 enum pipe_texture_target target
,
626 unsigned sample_count
,
627 unsigned storage_sample_count
,
630 struct zink_screen
*screen
= zink_screen(pscreen
);
632 if (format
== PIPE_FORMAT_NONE
)
633 return screen
->props
.limits
.framebufferNoAttachmentsSampleCounts
&
634 vk_sample_count_flags(sample_count
);
636 VkFormat vkformat
= zink_get_format(screen
, format
);
637 if (vkformat
== VK_FORMAT_UNDEFINED
)
640 if (sample_count
>= 1) {
641 VkSampleCountFlagBits sample_mask
= vk_sample_count_flags(sample_count
);
642 const struct util_format_description
*desc
= util_format_description(format
);
643 if (util_format_is_depth_or_stencil(format
)) {
644 if (util_format_has_depth(desc
)) {
645 if (bind
& PIPE_BIND_DEPTH_STENCIL
&&
646 (screen
->props
.limits
.framebufferDepthSampleCounts
& sample_mask
) != sample_mask
)
648 if (bind
& PIPE_BIND_SAMPLER_VIEW
&&
649 (screen
->props
.limits
.sampledImageDepthSampleCounts
& sample_mask
) != sample_mask
)
652 if (util_format_has_stencil(desc
)) {
653 if (bind
& PIPE_BIND_DEPTH_STENCIL
&&
654 (screen
->props
.limits
.framebufferStencilSampleCounts
& sample_mask
) != sample_mask
)
656 if (bind
& PIPE_BIND_SAMPLER_VIEW
&&
657 (screen
->props
.limits
.sampledImageStencilSampleCounts
& sample_mask
) != sample_mask
)
660 } else if (util_format_is_pure_integer(format
)) {
661 if (bind
& PIPE_BIND_RENDER_TARGET
&&
662 !(screen
->props
.limits
.framebufferColorSampleCounts
& sample_mask
))
664 if (bind
& PIPE_BIND_SAMPLER_VIEW
&&
665 !(screen
->props
.limits
.sampledImageIntegerSampleCounts
& sample_mask
))
668 if (bind
& PIPE_BIND_RENDER_TARGET
&&
669 !(screen
->props
.limits
.framebufferColorSampleCounts
& sample_mask
))
671 if (bind
& PIPE_BIND_SAMPLER_VIEW
&&
672 !(screen
->props
.limits
.sampledImageColorSampleCounts
& sample_mask
))
677 VkFormatProperties props
;
678 vkGetPhysicalDeviceFormatProperties(screen
->pdev
, vkformat
, &props
);
680 if (target
== PIPE_BUFFER
) {
681 if (bind
& PIPE_BIND_VERTEX_BUFFER
&&
682 !(props
.bufferFeatures
& VK_FORMAT_FEATURE_VERTEX_BUFFER_BIT
))
685 /* all other targets are texture-targets */
686 if (bind
& PIPE_BIND_RENDER_TARGET
&&
687 !(props
.optimalTilingFeatures
& VK_FORMAT_FEATURE_COLOR_ATTACHMENT_BIT
))
690 if (bind
& PIPE_BIND_BLENDABLE
&&
691 !(props
.optimalTilingFeatures
& VK_FORMAT_FEATURE_COLOR_ATTACHMENT_BLEND_BIT
))
694 if (bind
& PIPE_BIND_SAMPLER_VIEW
&&
695 !(props
.optimalTilingFeatures
& VK_FORMAT_FEATURE_SAMPLED_IMAGE_BIT
))
698 if (bind
& PIPE_BIND_DEPTH_STENCIL
&&
699 !(props
.optimalTilingFeatures
& VK_FORMAT_FEATURE_DEPTH_STENCIL_ATTACHMENT_BIT
))
703 if (util_format_is_compressed(format
)) {
704 const struct util_format_description
*desc
= util_format_description(format
);
705 if (desc
->layout
== UTIL_FORMAT_LAYOUT_BPTC
&&
706 !screen
->feats
.textureCompressionBC
)
714 zink_destroy_screen(struct pipe_screen
*pscreen
)
716 struct zink_screen
*screen
= zink_screen(pscreen
);
717 slab_destroy_parent(&screen
->transfer_pool
);
724 VkApplicationInfo ai
= {};
725 ai
.sType
= VK_STRUCTURE_TYPE_APPLICATION_INFO
;
728 if (os_get_process_name(proc_name
, ARRAY_SIZE(proc_name
)))
729 ai
.pApplicationName
= proc_name
;
731 ai
.pApplicationName
= "unknown";
733 ai
.pEngineName
= "mesa zink";
734 ai
.apiVersion
= VK_API_VERSION_1_0
;
736 const char *extensions
[] = {
737 VK_KHR_GET_PHYSICAL_DEVICE_PROPERTIES_2_EXTENSION_NAME
,
738 VK_KHR_EXTERNAL_MEMORY_CAPABILITIES_EXTENSION_NAME
,
741 VkInstanceCreateInfo ici
= {};
742 ici
.sType
= VK_STRUCTURE_TYPE_INSTANCE_CREATE_INFO
;
743 ici
.pApplicationInfo
= &ai
;
744 ici
.ppEnabledExtensionNames
= extensions
;
745 ici
.enabledExtensionCount
= ARRAY_SIZE(extensions
);
747 VkInstance instance
= VK_NULL_HANDLE
;
748 VkResult err
= vkCreateInstance(&ici
, NULL
, &instance
);
749 if (err
!= VK_SUCCESS
)
750 return VK_NULL_HANDLE
;
755 static VkPhysicalDevice
756 choose_pdev(const VkInstance instance
)
758 uint32_t i
, pdev_count
;
759 VkPhysicalDevice
*pdevs
, pdev
;
760 vkEnumeratePhysicalDevices(instance
, &pdev_count
, NULL
);
761 assert(pdev_count
> 0);
763 pdevs
= malloc(sizeof(*pdevs
) * pdev_count
);
764 vkEnumeratePhysicalDevices(instance
, &pdev_count
, pdevs
);
765 assert(pdev_count
> 0);
768 for (i
= 0; i
< pdev_count
; ++i
) {
769 VkPhysicalDeviceProperties props
;
770 vkGetPhysicalDeviceProperties(pdevs
[i
], &props
);
771 if (props
.deviceType
== VK_PHYSICAL_DEVICE_TYPE_DISCRETE_GPU
) {
781 find_gfx_queue(const VkPhysicalDevice pdev
)
784 vkGetPhysicalDeviceQueueFamilyProperties(pdev
, &num_queues
, NULL
);
785 assert(num_queues
> 0);
787 VkQueueFamilyProperties
*props
= malloc(sizeof(*props
) * num_queues
);
788 vkGetPhysicalDeviceQueueFamilyProperties(pdev
, &num_queues
, props
);
790 for (uint32_t i
= 0; i
< num_queues
; i
++) {
791 if (props
[i
].queueFlags
& VK_QUEUE_GRAPHICS_BIT
) {
801 zink_flush_frontbuffer(struct pipe_screen
*pscreen
,
802 struct pipe_resource
*pres
,
803 unsigned level
, unsigned layer
,
804 void *winsys_drawable_handle
,
805 struct pipe_box
*sub_box
)
807 struct zink_screen
*screen
= zink_screen(pscreen
);
808 struct sw_winsys
*winsys
= screen
->winsys
;
809 struct zink_resource
*res
= zink_resource(pres
);
813 void *map
= winsys
->displaytarget_map(winsys
, res
->dt
, 0);
816 VkImageSubresource isr
= {};
817 isr
.aspectMask
= res
->aspect
;
818 isr
.mipLevel
= level
;
819 isr
.arrayLayer
= layer
;
820 VkSubresourceLayout layout
;
821 vkGetImageSubresourceLayout(screen
->dev
, res
->image
, &isr
, &layout
);
824 VkResult result
= vkMapMemory(screen
->dev
, res
->mem
, res
->offset
, res
->size
, 0, &ptr
);
825 if (result
!= VK_SUCCESS
) {
826 debug_printf("failed to map memory for display\n");
829 for (int i
= 0; i
< pres
->height0
; ++i
) {
830 uint8_t *src
= (uint8_t *)ptr
+ i
* layout
.rowPitch
;
831 uint8_t *dst
= (uint8_t *)map
+ i
* res
->dt_stride
;
832 memcpy(dst
, src
, res
->dt_stride
);
834 vkUnmapMemory(screen
->dev
, res
->mem
);
837 winsys
->displaytarget_unmap(winsys
, res
->dt
);
841 winsys
->displaytarget_display(winsys
, res
->dt
, winsys_drawable_handle
, sub_box
);
844 static struct pipe_screen
*
845 zink_internal_create_screen(struct sw_winsys
*winsys
, int fd
)
847 struct zink_screen
*screen
= CALLOC_STRUCT(zink_screen
);
851 zink_debug
= debug_get_option_zink_debug();
853 screen
->instance
= create_instance();
854 screen
->pdev
= choose_pdev(screen
->instance
);
855 screen
->gfx_queue
= find_gfx_queue(screen
->pdev
);
857 vkGetPhysicalDeviceProperties(screen
->pdev
, &screen
->props
);
858 vkGetPhysicalDeviceFeatures(screen
->pdev
, &screen
->feats
);
859 vkGetPhysicalDeviceMemoryProperties(screen
->pdev
, &screen
->mem_props
);
861 screen
->have_X8_D24_UNORM_PACK32
= is_depth_format_supported(screen
,
862 VK_FORMAT_X8_D24_UNORM_PACK32
);
863 screen
->have_D24_UNORM_S8_UINT
= is_depth_format_supported(screen
,
864 VK_FORMAT_D24_UNORM_S8_UINT
);
866 uint32_t num_extensions
= 0;
867 if (vkEnumerateDeviceExtensionProperties(screen
->pdev
, NULL
,
868 &num_extensions
, NULL
) == VK_SUCCESS
&& num_extensions
> 0) {
869 VkExtensionProperties
*extensions
= MALLOC(sizeof(VkExtensionProperties
) *
872 vkEnumerateDeviceExtensionProperties(screen
->pdev
, NULL
,
873 &num_extensions
, extensions
);
875 for (uint32_t i
= 0; i
< num_extensions
; ++i
) {
876 if (!strcmp(extensions
[i
].extensionName
,
877 VK_KHR_MAINTENANCE1_EXTENSION_NAME
))
878 screen
->have_KHR_maintenance1
= true;
879 if (!strcmp(extensions
[i
].extensionName
,
880 VK_KHR_EXTERNAL_MEMORY_FD_EXTENSION_NAME
))
881 screen
->have_KHR_external_memory_fd
= true;
887 if (!screen
->have_KHR_maintenance1
) {
888 debug_printf("ZINK: VK_KHR_maintenance1 required!\n");
892 VkDeviceQueueCreateInfo qci
= {};
894 qci
.sType
= VK_STRUCTURE_TYPE_DEVICE_QUEUE_CREATE_INFO
;
895 qci
.queueFamilyIndex
= screen
->gfx_queue
;
897 qci
.pQueuePriorities
= &dummy
;
899 VkDeviceCreateInfo dci
= {};
900 dci
.sType
= VK_STRUCTURE_TYPE_DEVICE_CREATE_INFO
;
901 dci
.queueCreateInfoCount
= 1;
902 dci
.pQueueCreateInfos
= &qci
;
903 dci
.pEnabledFeatures
= &screen
->feats
;
904 const char *extensions
[3] = {
905 VK_KHR_MAINTENANCE1_EXTENSION_NAME
,
909 if (fd
>= 0 && !screen
->have_KHR_external_memory_fd
) {
910 debug_printf("ZINK: KHR_external_memory_fd required!\n");
914 if (screen
->have_KHR_external_memory_fd
) {
915 extensions
[num_extensions
++] = VK_KHR_EXTERNAL_MEMORY_EXTENSION_NAME
;
916 extensions
[num_extensions
++] = VK_KHR_EXTERNAL_MEMORY_FD_EXTENSION_NAME
;
918 assert(num_extensions
<= ARRAY_SIZE(extensions
));
920 dci
.ppEnabledExtensionNames
= extensions
;
921 dci
.enabledExtensionCount
= num_extensions
;
922 if (vkCreateDevice(screen
->pdev
, &dci
, NULL
, &screen
->dev
) != VK_SUCCESS
)
925 screen
->winsys
= winsys
;
927 screen
->base
.get_name
= zink_get_name
;
928 screen
->base
.get_vendor
= zink_get_vendor
;
929 screen
->base
.get_device_vendor
= zink_get_device_vendor
;
930 screen
->base
.get_param
= zink_get_param
;
931 screen
->base
.get_paramf
= zink_get_paramf
;
932 screen
->base
.get_shader_param
= zink_get_shader_param
;
933 screen
->base
.get_compiler_options
= zink_get_compiler_options
;
934 screen
->base
.is_format_supported
= zink_is_format_supported
;
935 screen
->base
.context_create
= zink_context_create
;
936 screen
->base
.flush_frontbuffer
= zink_flush_frontbuffer
;
937 screen
->base
.destroy
= zink_destroy_screen
;
939 zink_screen_resource_init(&screen
->base
);
940 zink_screen_fence_init(&screen
->base
);
942 slab_create_parent(&screen
->transfer_pool
, sizeof(struct zink_transfer
), 16);
944 return &screen
->base
;
952 zink_create_screen(struct sw_winsys
*winsys
)
954 return zink_internal_create_screen(winsys
, -1);
958 zink_drm_create_screen(int fd
)
960 return zink_internal_create_screen(NULL
, fd
);