projects / mesa.git / blob
? search:


d4933e74884bd3e92d55e5e1ee1c01efedf88a71
[mesa.git] / src / gallium / include / pipe / p_defines.h
1 /**************************************************************************
2 *
3 * Copyright 2007 VMware, Inc.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 #ifndef PIPE_DEFINES_H
29 #define PIPE_DEFINES_H
30
31 #include "p_compiler.h"
32
33 #ifdef __cplusplus
34 extern "C" {
35 #endif
36
37 /**
38 * Gallium error codes.
39 *
40 * - A zero value always means success.
41 * - A negative value always means failure.
42 * - The meaning of a positive value is function dependent.
43 */
44 enum pipe_error
45 {
46 PIPE_OK = 0,
47 PIPE_ERROR = -1, /**< Generic error */
48 PIPE_ERROR_BAD_INPUT = -2,
49 PIPE_ERROR_OUT_OF_MEMORY = -3,
50 PIPE_ERROR_RETRY = -4
51 /* TODO */
52 };
53
54
55 #define PIPE_BLENDFACTOR_ONE 0x1
56 #define PIPE_BLENDFACTOR_SRC_COLOR 0x2
57 #define PIPE_BLENDFACTOR_SRC_ALPHA 0x3
58 #define PIPE_BLENDFACTOR_DST_ALPHA 0x4
59 #define PIPE_BLENDFACTOR_DST_COLOR 0x5
60 #define PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE 0x6
61 #define PIPE_BLENDFACTOR_CONST_COLOR 0x7
62 #define PIPE_BLENDFACTOR_CONST_ALPHA 0x8
63 #define PIPE_BLENDFACTOR_SRC1_COLOR 0x9
64 #define PIPE_BLENDFACTOR_SRC1_ALPHA 0x0A
65 #define PIPE_BLENDFACTOR_ZERO 0x11
66 #define PIPE_BLENDFACTOR_INV_SRC_COLOR 0x12
67 #define PIPE_BLENDFACTOR_INV_SRC_ALPHA 0x13
68 #define PIPE_BLENDFACTOR_INV_DST_ALPHA 0x14
69 #define PIPE_BLENDFACTOR_INV_DST_COLOR 0x15
70 #define PIPE_BLENDFACTOR_INV_CONST_COLOR 0x17
71 #define PIPE_BLENDFACTOR_INV_CONST_ALPHA 0x18
72 #define PIPE_BLENDFACTOR_INV_SRC1_COLOR 0x19
73 #define PIPE_BLENDFACTOR_INV_SRC1_ALPHA 0x1A
74
75 #define PIPE_BLEND_ADD 0
76 #define PIPE_BLEND_SUBTRACT 1
77 #define PIPE_BLEND_REVERSE_SUBTRACT 2
78 #define PIPE_BLEND_MIN 3
79 #define PIPE_BLEND_MAX 4
80
81 #define PIPE_LOGICOP_CLEAR 0
82 #define PIPE_LOGICOP_NOR 1
83 #define PIPE_LOGICOP_AND_INVERTED 2
84 #define PIPE_LOGICOP_COPY_INVERTED 3
85 #define PIPE_LOGICOP_AND_REVERSE 4
86 #define PIPE_LOGICOP_INVERT 5
87 #define PIPE_LOGICOP_XOR 6
88 #define PIPE_LOGICOP_NAND 7
89 #define PIPE_LOGICOP_AND 8
90 #define PIPE_LOGICOP_EQUIV 9
91 #define PIPE_LOGICOP_NOOP 10
92 #define PIPE_LOGICOP_OR_INVERTED 11
93 #define PIPE_LOGICOP_COPY 12
94 #define PIPE_LOGICOP_OR_REVERSE 13
95 #define PIPE_LOGICOP_OR 14
96 #define PIPE_LOGICOP_SET 15
97
98 #define PIPE_MASK_R 0x1
99 #define PIPE_MASK_G 0x2
100 #define PIPE_MASK_B 0x4
101 #define PIPE_MASK_A 0x8
102 #define PIPE_MASK_RGBA 0xf
103 #define PIPE_MASK_Z 0x10
104 #define PIPE_MASK_S 0x20
105 #define PIPE_MASK_ZS 0x30
106 #define PIPE_MASK_RGBAZS (PIPE_MASK_RGBA|PIPE_MASK_ZS)
107
108
109 /**
110 * Inequality functions. Used for depth test, stencil compare, alpha
111 * test, shadow compare, etc.
112 */
113 #define PIPE_FUNC_NEVER 0
114 #define PIPE_FUNC_LESS 1
115 #define PIPE_FUNC_EQUAL 2
116 #define PIPE_FUNC_LEQUAL 3
117 #define PIPE_FUNC_GREATER 4
118 #define PIPE_FUNC_NOTEQUAL 5
119 #define PIPE_FUNC_GEQUAL 6
120 #define PIPE_FUNC_ALWAYS 7
121
122 /** Polygon fill mode */
123 #define PIPE_POLYGON_MODE_FILL 0
124 #define PIPE_POLYGON_MODE_LINE 1
125 #define PIPE_POLYGON_MODE_POINT 2
126
127 /** Polygon face specification, eg for culling */
128 #define PIPE_FACE_NONE 0
129 #define PIPE_FACE_FRONT 1
130 #define PIPE_FACE_BACK 2
131 #define PIPE_FACE_FRONT_AND_BACK (PIPE_FACE_FRONT | PIPE_FACE_BACK)
132
133 /** Stencil ops */
134 #define PIPE_STENCIL_OP_KEEP 0
135 #define PIPE_STENCIL_OP_ZERO 1
136 #define PIPE_STENCIL_OP_REPLACE 2
137 #define PIPE_STENCIL_OP_INCR 3
138 #define PIPE_STENCIL_OP_DECR 4
139 #define PIPE_STENCIL_OP_INCR_WRAP 5
140 #define PIPE_STENCIL_OP_DECR_WRAP 6
141 #define PIPE_STENCIL_OP_INVERT 7
142
143 /** Texture types.
144 * See the documentation for info on PIPE_TEXTURE_RECT vs PIPE_TEXTURE_2D
145 */
146 enum pipe_texture_target
147 {
148 PIPE_BUFFER = 0,
149 PIPE_TEXTURE_1D = 1,
150 PIPE_TEXTURE_2D = 2,
151 PIPE_TEXTURE_3D = 3,
152 PIPE_TEXTURE_CUBE = 4,
153 PIPE_TEXTURE_RECT = 5,
154 PIPE_TEXTURE_1D_ARRAY = 6,
155 PIPE_TEXTURE_2D_ARRAY = 7,
156 PIPE_TEXTURE_CUBE_ARRAY = 8,
157 PIPE_MAX_TEXTURE_TYPES
158 };
159
160 #define PIPE_TEX_FACE_POS_X 0
161 #define PIPE_TEX_FACE_NEG_X 1
162 #define PIPE_TEX_FACE_POS_Y 2
163 #define PIPE_TEX_FACE_NEG_Y 3
164 #define PIPE_TEX_FACE_POS_Z 4
165 #define PIPE_TEX_FACE_NEG_Z 5
166 #define PIPE_TEX_FACE_MAX 6
167
168 #define PIPE_TEX_WRAP_REPEAT 0
169 #define PIPE_TEX_WRAP_CLAMP 1
170 #define PIPE_TEX_WRAP_CLAMP_TO_EDGE 2
171 #define PIPE_TEX_WRAP_CLAMP_TO_BORDER 3
172 #define PIPE_TEX_WRAP_MIRROR_REPEAT 4
173 #define PIPE_TEX_WRAP_MIRROR_CLAMP 5
174 #define PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE 6
175 #define PIPE_TEX_WRAP_MIRROR_CLAMP_TO_BORDER 7
176
177 /** Between mipmaps, ie mipfilter */
178 #define PIPE_TEX_MIPFILTER_NEAREST 0
179 #define PIPE_TEX_MIPFILTER_LINEAR 1
180 #define PIPE_TEX_MIPFILTER_NONE 2
181
182 /** Within a mipmap, ie min/mag filter */
183 #define PIPE_TEX_FILTER_NEAREST 0
184 #define PIPE_TEX_FILTER_LINEAR 1
185
186 #define PIPE_TEX_COMPARE_NONE 0
187 #define PIPE_TEX_COMPARE_R_TO_TEXTURE 1
188
189 /**
190 * Clear buffer bits
191 */
192 #define PIPE_CLEAR_DEPTH (1 << 0)
193 #define PIPE_CLEAR_STENCIL (1 << 1)
194 #define PIPE_CLEAR_COLOR0 (1 << 2)
195 #define PIPE_CLEAR_COLOR1 (1 << 3)
196 #define PIPE_CLEAR_COLOR2 (1 << 4)
197 #define PIPE_CLEAR_COLOR3 (1 << 5)
198 #define PIPE_CLEAR_COLOR4 (1 << 6)
199 #define PIPE_CLEAR_COLOR5 (1 << 7)
200 #define PIPE_CLEAR_COLOR6 (1 << 8)
201 #define PIPE_CLEAR_COLOR7 (1 << 9)
202 /** Combined flags */
203 /** All color buffers currently bound */
204 #define PIPE_CLEAR_COLOR (PIPE_CLEAR_COLOR0 | PIPE_CLEAR_COLOR1 | \
205 PIPE_CLEAR_COLOR2 | PIPE_CLEAR_COLOR3 | \
206 PIPE_CLEAR_COLOR4 | PIPE_CLEAR_COLOR5 | \
207 PIPE_CLEAR_COLOR6 | PIPE_CLEAR_COLOR7)
208 #define PIPE_CLEAR_DEPTHSTENCIL (PIPE_CLEAR_DEPTH | PIPE_CLEAR_STENCIL)
209
210 /**
211 * Transfer object usage flags
212 */
213 enum pipe_transfer_usage
214 {
215 /**
216 * Resource contents read back (or accessed directly) at transfer
217 * create time.
218 */
219 PIPE_TRANSFER_READ = (1 << 0),
220
221 /**
222 * Resource contents will be written back at transfer_unmap
223 * time (or modified as a result of being accessed directly).
224 */
225 PIPE_TRANSFER_WRITE = (1 << 1),
226
227 /**
228 * Read/modify/write
229 */
230 PIPE_TRANSFER_READ_WRITE = PIPE_TRANSFER_READ | PIPE_TRANSFER_WRITE,
231
232 /**
233 * The transfer should map the texture storage directly. The driver may
234 * return NULL if that isn't possible, and the state tracker needs to cope
235 * with that and use an alternative path without this flag.
236 *
237 * E.g. the state tracker could have a simpler path which maps textures and
238 * does read/modify/write cycles on them directly, and a more complicated
239 * path which uses minimal read and write transfers.
240 */
241 PIPE_TRANSFER_MAP_DIRECTLY = (1 << 2),
242
243 /**
244 * Discards the memory within the mapped region.
245 *
246 * It should not be used with PIPE_TRANSFER_READ.
247 *
248 * See also:
249 * - OpenGL's ARB_map_buffer_range extension, MAP_INVALIDATE_RANGE_BIT flag.
250 */
251 PIPE_TRANSFER_DISCARD_RANGE = (1 << 8),
252
253 /**
254 * Fail if the resource cannot be mapped immediately.
255 *
256 * See also:
257 * - Direct3D's D3DLOCK_DONOTWAIT flag.
258 * - Mesa3D's MESA_MAP_NOWAIT_BIT flag.
259 * - WDDM's D3DDDICB_LOCKFLAGS.DonotWait flag.
260 */
261 PIPE_TRANSFER_DONTBLOCK = (1 << 9),
262
263 /**
264 * Do not attempt to synchronize pending operations on the resource when mapping.
265 *
266 * It should not be used with PIPE_TRANSFER_READ.
267 *
268 * See also:
269 * - OpenGL's ARB_map_buffer_range extension, MAP_UNSYNCHRONIZED_BIT flag.
270 * - Direct3D's D3DLOCK_NOOVERWRITE flag.
271 * - WDDM's D3DDDICB_LOCKFLAGS.IgnoreSync flag.
272 */
273 PIPE_TRANSFER_UNSYNCHRONIZED = (1 << 10),
274
275 /**
276 * Written ranges will be notified later with
277 * pipe_context::transfer_flush_region.
278 *
279 * It should not be used with PIPE_TRANSFER_READ.
280 *
281 * See also:
282 * - pipe_context::transfer_flush_region
283 * - OpenGL's ARB_map_buffer_range extension, MAP_FLUSH_EXPLICIT_BIT flag.
284 */
285 PIPE_TRANSFER_FLUSH_EXPLICIT = (1 << 11),
286
287 /**
288 * Discards all memory backing the resource.
289 *
290 * It should not be used with PIPE_TRANSFER_READ.
291 *
292 * This is equivalent to:
293 * - OpenGL's ARB_map_buffer_range extension, MAP_INVALIDATE_BUFFER_BIT
294 * - BufferData(NULL) on a GL buffer
295 * - Direct3D's D3DLOCK_DISCARD flag.
296 * - WDDM's D3DDDICB_LOCKFLAGS.Discard flag.
297 * - D3D10 DDI's D3D10_DDI_MAP_WRITE_DISCARD flag
298 * - D3D10's D3D10_MAP_WRITE_DISCARD flag.
299 */
300 PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE = (1 << 12),
301
302 /**
303 * Allows the resource to be used for rendering while mapped.
304 *
305 * PIPE_RESOURCE_FLAG_MAP_PERSISTENT must be set when creating
306 * the resource.
307 *
308 * If COHERENT is not set, memory_barrier(PIPE_BARRIER_MAPPED_BUFFER)
309 * must be called to ensure the device can see what the CPU has written.
310 */
311 PIPE_TRANSFER_PERSISTENT = (1 << 13),
312
313 /**
314 * If PERSISTENT is set, this ensures any writes done by the device are
315 * immediately visible to the CPU and vice versa.
316 *
317 * PIPE_RESOURCE_FLAG_MAP_COHERENT must be set when creating
318 * the resource.
319 */
320 PIPE_TRANSFER_COHERENT = (1 << 14)
321 };
322
323 /**
324 * Flags for the flush function.
325 */
326 enum pipe_flush_flags
327 {
328 PIPE_FLUSH_END_OF_FRAME = (1 << 0)
329 };
330
331 /**
332 * Flags for pipe_context::dump_debug_state.
333 */
334 #define PIPE_DEBUG_DEVICE_IS_HUNG (1 << 0)
335
336 /**
337 * Create a compute-only context. Use in pipe_screen::context_create.
338 * This disables draw, blit, and clear*, render_condition, and other graphics
339 * functions. Interop with other graphics contexts is still allowed.
340 * This allows scheduling jobs on a compute-only hardware command queue that
341 * can run in parallel with graphics without stalling it.
342 */
343 #define PIPE_CONTEXT_COMPUTE_ONLY (1 << 0)
344
345 /**
346 * Gather debug information and expect that pipe_context::dump_debug_state
347 * will be called. Use in pipe_screen::context_create.
348 */
349 #define PIPE_CONTEXT_DEBUG (1 << 1)
350
351 /**
352 * Flags for pipe_context::memory_barrier.
353 */
354 #define PIPE_BARRIER_MAPPED_BUFFER (1 << 0)
355
356 /**
357 * Resource binding flags -- state tracker must specify in advance all
358 * the ways a resource might be used.
359 */
360 #define PIPE_BIND_DEPTH_STENCIL (1 << 0) /* create_surface */
361 #define PIPE_BIND_RENDER_TARGET (1 << 1) /* create_surface */
362 #define PIPE_BIND_BLENDABLE (1 << 2) /* create_surface */
363 #define PIPE_BIND_SAMPLER_VIEW (1 << 3) /* create_sampler_view */
364 #define PIPE_BIND_VERTEX_BUFFER (1 << 4) /* set_vertex_buffers */
365 #define PIPE_BIND_INDEX_BUFFER (1 << 5) /* draw_elements */
366 #define PIPE_BIND_CONSTANT_BUFFER (1 << 6) /* set_constant_buffer */
367 #define PIPE_BIND_DISPLAY_TARGET (1 << 7) /* flush_front_buffer */
368 #define PIPE_BIND_TRANSFER_WRITE (1 << 8) /* transfer_map */
369 #define PIPE_BIND_TRANSFER_READ (1 << 9) /* transfer_map */
370 #define PIPE_BIND_STREAM_OUTPUT (1 << 10) /* set_stream_output_buffers */
371 #define PIPE_BIND_CURSOR (1 << 11) /* mouse cursor */
372 #define PIPE_BIND_CUSTOM (1 << 12) /* state-tracker/winsys usages */
373 #define PIPE_BIND_GLOBAL (1 << 13) /* set_global_binding */
374 #define PIPE_BIND_SHADER_BUFFER (1 << 14) /* set_shader_buffers */
375 #define PIPE_BIND_SHADER_IMAGE (1 << 15) /* set_shader_images */
376 #define PIPE_BIND_COMPUTE_RESOURCE (1 << 16) /* set_compute_resources */
377 #define PIPE_BIND_COMMAND_ARGS_BUFFER (1 << 17) /* pipe_draw_info.indirect */
378
379 /**
380 * The first two flags above were previously part of the amorphous
381 * TEXTURE_USAGE, most of which are now descriptions of the ways a
382 * particular texture can be bound to the gallium pipeline. The two flags
383 * below do not fit within that and probably need to be migrated to some
384 * other place.
385 *
386 * It seems like scanout is used by the Xorg state tracker to ask for
387 * a texture suitable for actual scanout (hence the name), which
388 * implies extra layout constraints on some hardware. It may also
389 * have some special meaning regarding mouse cursor images.
390 *
391 * The shared flag is quite underspecified, but certainly isn't a
392 * binding flag - it seems more like a message to the winsys to create
393 * a shareable allocation.
394 *
395 * The third flag has been added to be able to force textures to be created
396 * in linear mode (no tiling).
397 */
398 #define PIPE_BIND_SCANOUT (1 << 18) /* */
399 #define PIPE_BIND_SHARED (1 << 19) /* get_texture_handle ??? */
400 #define PIPE_BIND_LINEAR (1 << 20)
401
402
403 /**
404 * Flags for the driver about resource behaviour:
405 */
406 #define PIPE_RESOURCE_FLAG_MAP_PERSISTENT (1 << 0)
407 #define PIPE_RESOURCE_FLAG_MAP_COHERENT (1 << 1)
408 #define PIPE_RESOURCE_FLAG_DRV_PRIV (1 << 16) /* driver/winsys private */
409 #define PIPE_RESOURCE_FLAG_ST_PRIV (1 << 24) /* state-tracker/winsys private */
410
411 /**
412 * Hint about the expected lifecycle of a resource.
413 * Sorted according to GPU vs CPU access.
414 */
415 #define PIPE_USAGE_DEFAULT 0 /* fast GPU access */
416 #define PIPE_USAGE_IMMUTABLE 1 /* fast GPU access, immutable */
417 #define PIPE_USAGE_DYNAMIC 2 /* uploaded data is used multiple times */
418 #define PIPE_USAGE_STREAM 3 /* uploaded data is used once */
419 #define PIPE_USAGE_STAGING 4 /* fast CPU access */
420
421
422 /**
423 * Shaders
424 */
425 #define PIPE_SHADER_VERTEX 0
426 #define PIPE_SHADER_FRAGMENT 1
427 #define PIPE_SHADER_GEOMETRY 2
428 #define PIPE_SHADER_TESS_CTRL 3
429 #define PIPE_SHADER_TESS_EVAL 4
430 #define PIPE_SHADER_COMPUTE 5
431 #define PIPE_SHADER_TYPES 6
432
433
434 /**
435 * Primitive types:
436 */
437 #define PIPE_PRIM_POINTS 0
438 #define PIPE_PRIM_LINES 1
439 #define PIPE_PRIM_LINE_LOOP 2
440 #define PIPE_PRIM_LINE_STRIP 3
441 #define PIPE_PRIM_TRIANGLES 4
442 #define PIPE_PRIM_TRIANGLE_STRIP 5
443 #define PIPE_PRIM_TRIANGLE_FAN 6
444 #define PIPE_PRIM_QUADS 7
445 #define PIPE_PRIM_QUAD_STRIP 8
446 #define PIPE_PRIM_POLYGON 9
447 #define PIPE_PRIM_LINES_ADJACENCY 10
448 #define PIPE_PRIM_LINE_STRIP_ADJACENCY 11
449 #define PIPE_PRIM_TRIANGLES_ADJACENCY 12
450 #define PIPE_PRIM_TRIANGLE_STRIP_ADJACENCY 13
451 #define PIPE_PRIM_PATCHES 14
452 #define PIPE_PRIM_MAX 15
453
454
455 /**
456 * Tessellator spacing types
457 */
458 #define PIPE_TESS_SPACING_FRACTIONAL_ODD 0
459 #define PIPE_TESS_SPACING_FRACTIONAL_EVEN 1
460 #define PIPE_TESS_SPACING_EQUAL 2
461
462 /**
463 * Query object types
464 */
465 #define PIPE_QUERY_OCCLUSION_COUNTER 0
466 #define PIPE_QUERY_OCCLUSION_PREDICATE 1
467 #define PIPE_QUERY_TIMESTAMP 2
468 #define PIPE_QUERY_TIMESTAMP_DISJOINT 3
469 #define PIPE_QUERY_TIME_ELAPSED 4
470 #define PIPE_QUERY_PRIMITIVES_GENERATED 5
471 #define PIPE_QUERY_PRIMITIVES_EMITTED 6
472 #define PIPE_QUERY_SO_STATISTICS 7
473 #define PIPE_QUERY_SO_OVERFLOW_PREDICATE 8
474 #define PIPE_QUERY_GPU_FINISHED 9
475 #define PIPE_QUERY_PIPELINE_STATISTICS 10
476 #define PIPE_QUERY_TYPES 11
477 /* start of driver queries, see pipe_screen::get_driver_query_info */
478 #define PIPE_QUERY_DRIVER_SPECIFIC 256
479
480
481 /**
482 * Conditional rendering modes
483 */
484 #define PIPE_RENDER_COND_WAIT 0
485 #define PIPE_RENDER_COND_NO_WAIT 1
486 #define PIPE_RENDER_COND_BY_REGION_WAIT 2
487 #define PIPE_RENDER_COND_BY_REGION_NO_WAIT 3
488
489
490 /**
491 * Point sprite coord modes
492 */
493 #define PIPE_SPRITE_COORD_UPPER_LEFT 0
494 #define PIPE_SPRITE_COORD_LOWER_LEFT 1
495
496
497 /**
498 * Texture swizzles
499 */
500 #define PIPE_SWIZZLE_RED 0
501 #define PIPE_SWIZZLE_GREEN 1
502 #define PIPE_SWIZZLE_BLUE 2
503 #define PIPE_SWIZZLE_ALPHA 3
504 #define PIPE_SWIZZLE_ZERO 4
505 #define PIPE_SWIZZLE_ONE 5
506
507
508 #define PIPE_TIMEOUT_INFINITE 0xffffffffffffffffull
509
510
511 /**
512 * Device reset status.
513 */
514 enum pipe_reset_status
515 {
516 PIPE_NO_RESET = 0,
517 PIPE_GUILTY_CONTEXT_RESET = 1,
518 PIPE_INNOCENT_CONTEXT_RESET = 2,
519 PIPE_UNKNOWN_CONTEXT_RESET = 3
520 };
521
522
523 /**
524 * Implementation capabilities/limits which are queried through
525 * pipe_screen::get_param()
526 */
527 enum pipe_cap
528 {
529 PIPE_CAP_NPOT_TEXTURES,
530 PIPE_CAP_TWO_SIDED_STENCIL,
531 PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS,
532 PIPE_CAP_ANISOTROPIC_FILTER,
533 PIPE_CAP_POINT_SPRITE,
534 PIPE_CAP_MAX_RENDER_TARGETS,
535 PIPE_CAP_OCCLUSION_QUERY,
536 PIPE_CAP_QUERY_TIME_ELAPSED,
537 PIPE_CAP_TEXTURE_SHADOW_MAP,
538 PIPE_CAP_TEXTURE_SWIZZLE,
539 PIPE_CAP_MAX_TEXTURE_2D_LEVELS,
540 PIPE_CAP_MAX_TEXTURE_3D_LEVELS,
541 PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS,
542 PIPE_CAP_TEXTURE_MIRROR_CLAMP,
543 PIPE_CAP_BLEND_EQUATION_SEPARATE,
544 PIPE_CAP_SM3,
545 PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS,
546 PIPE_CAP_PRIMITIVE_RESTART,
547 /** blend enables and write masks per rendertarget */
548 PIPE_CAP_INDEP_BLEND_ENABLE,
549 /** different blend funcs per rendertarget */
550 PIPE_CAP_INDEP_BLEND_FUNC,
551 PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS,
552 PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT,
553 PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT,
554 PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER,
555 PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER,
556 PIPE_CAP_DEPTH_CLIP_DISABLE,
557 PIPE_CAP_SHADER_STENCIL_EXPORT,
558 PIPE_CAP_TGSI_INSTANCEID,
559 PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR,
560 PIPE_CAP_FRAGMENT_COLOR_CLAMPED,
561 PIPE_CAP_MIXED_COLORBUFFER_FORMATS,
562 PIPE_CAP_SEAMLESS_CUBE_MAP,
563 PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE,
564 PIPE_CAP_MIN_TEXEL_OFFSET,
565 PIPE_CAP_MAX_TEXEL_OFFSET,
566 PIPE_CAP_CONDITIONAL_RENDER,
567 PIPE_CAP_TEXTURE_BARRIER,
568 PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS,
569 PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS,
570 PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME,
571 PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS,
572 PIPE_CAP_VERTEX_COLOR_UNCLAMPED,
573 PIPE_CAP_VERTEX_COLOR_CLAMPED,
574 PIPE_CAP_GLSL_FEATURE_LEVEL,
575 PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION,
576 PIPE_CAP_USER_VERTEX_BUFFERS,
577 PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY,
578 PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY,
579 PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY,
580 PIPE_CAP_COMPUTE,
581 PIPE_CAP_USER_INDEX_BUFFERS,
582 PIPE_CAP_USER_CONSTANT_BUFFERS,
583 PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT,
584 PIPE_CAP_START_INSTANCE,
585 PIPE_CAP_QUERY_TIMESTAMP,
586 PIPE_CAP_TEXTURE_MULTISAMPLE,
587 PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT,
588 PIPE_CAP_CUBE_MAP_ARRAY,
589 PIPE_CAP_TEXTURE_BUFFER_OBJECTS,
590 PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT,
591 PIPE_CAP_TGSI_TEXCOORD,
592 PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER,
593 PIPE_CAP_QUERY_PIPELINE_STATISTICS,
594 PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK,
595 PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE,
596 PIPE_CAP_MAX_VIEWPORTS,
597 PIPE_CAP_ENDIANNESS,
598 PIPE_CAP_MIXED_FRAMEBUFFER_SIZES,
599 PIPE_CAP_TGSI_VS_LAYER_VIEWPORT,
600 PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES,
601 PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS,
602 PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS,
603 PIPE_CAP_TEXTURE_GATHER_SM5,
604 PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT,
605 PIPE_CAP_FAKE_SW_MSAA,
606 PIPE_CAP_TEXTURE_QUERY_LOD,
607 PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET,
608 PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET,
609 PIPE_CAP_SAMPLE_SHADING,
610 PIPE_CAP_TEXTURE_GATHER_OFFSETS,
611 PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION,
612 PIPE_CAP_MAX_VERTEX_STREAMS,
613 PIPE_CAP_DRAW_INDIRECT,
614 PIPE_CAP_TGSI_FS_FINE_DERIVATIVE,
615 PIPE_CAP_VENDOR_ID,
616 PIPE_CAP_DEVICE_ID,
617 PIPE_CAP_ACCELERATED,
618 PIPE_CAP_VIDEO_MEMORY,
619 PIPE_CAP_UMA,
620 PIPE_CAP_CONDITIONAL_RENDER_INVERTED,
621 PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE,
622 PIPE_CAP_SAMPLER_VIEW_TARGET,
623 PIPE_CAP_CLIP_HALFZ,
624 PIPE_CAP_VERTEXID_NOBASE,
625 PIPE_CAP_POLYGON_OFFSET_CLAMP,
626 PIPE_CAP_MULTISAMPLE_Z_RESOLVE,
627 PIPE_CAP_RESOURCE_FROM_USER_MEMORY,
628 PIPE_CAP_DEVICE_RESET_STATUS_QUERY,
629 PIPE_CAP_MAX_SHADER_PATCH_VARYINGS,
630 PIPE_CAP_TEXTURE_FLOAT_LINEAR,
631 PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR,
632 PIPE_CAP_DEPTH_BOUNDS_TEST,
633 PIPE_CAP_TGSI_TXQS,
634 PIPE_CAP_FORCE_PERSAMPLE_INTERP,
635 PIPE_CAP_SHAREABLE_SHADERS,
636 PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS,
637 PIPE_CAP_CLEAR_TEXTURE,
638 PIPE_CAP_DRAW_PARAMETERS,
639 };
640
641 #define PIPE_QUIRK_TEXTURE_BORDER_COLOR_SWIZZLE_NV50 (1 << 0)
642 #define PIPE_QUIRK_TEXTURE_BORDER_COLOR_SWIZZLE_R600 (1 << 1)
643
644 enum pipe_endian
645 {
646 PIPE_ENDIAN_LITTLE = 0,
647 PIPE_ENDIAN_BIG = 1,
648 #if defined(PIPE_ARCH_LITTLE_ENDIAN)
649 PIPE_ENDIAN_NATIVE = PIPE_ENDIAN_LITTLE
650 #elif defined(PIPE_ARCH_BIG_ENDIAN)
651 PIPE_ENDIAN_NATIVE = PIPE_ENDIAN_BIG
652 #endif
653 };
654
655 /**
656 * Implementation limits which are queried through
657 * pipe_screen::get_paramf()
658 */
659 enum pipe_capf
660 {
661 PIPE_CAPF_MAX_LINE_WIDTH,
662 PIPE_CAPF_MAX_LINE_WIDTH_AA,
663 PIPE_CAPF_MAX_POINT_WIDTH,
664 PIPE_CAPF_MAX_POINT_WIDTH_AA,
665 PIPE_CAPF_MAX_TEXTURE_ANISOTROPY,
666 PIPE_CAPF_MAX_TEXTURE_LOD_BIAS,
667 PIPE_CAPF_GUARD_BAND_LEFT,
668 PIPE_CAPF_GUARD_BAND_TOP,
669 PIPE_CAPF_GUARD_BAND_RIGHT,
670 PIPE_CAPF_GUARD_BAND_BOTTOM
671 };
672
673 /** Shader caps not specific to any single stage */
674 enum pipe_shader_cap
675 {
676 PIPE_SHADER_CAP_MAX_INSTRUCTIONS, /* if 0, it means the stage is unsupported */
677 PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS,
678 PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS,
679 PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS,
680 PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH,
681 PIPE_SHADER_CAP_MAX_INPUTS,
682 PIPE_SHADER_CAP_MAX_OUTPUTS,
683 PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE,
684 PIPE_SHADER_CAP_MAX_CONST_BUFFERS,
685 PIPE_SHADER_CAP_MAX_TEMPS,
686 PIPE_SHADER_CAP_MAX_PREDS,
687 /* boolean caps */
688 PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED,
689 PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR,
690 PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR,
691 PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR,
692 PIPE_SHADER_CAP_INDIRECT_CONST_ADDR,
693 PIPE_SHADER_CAP_SUBROUTINES, /* BGNSUB, ENDSUB, CAL, RET */
694 PIPE_SHADER_CAP_INTEGERS,
695 PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS,
696 PIPE_SHADER_CAP_PREFERRED_IR,
697 PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED,
698 PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS,
699 PIPE_SHADER_CAP_DOUBLES,
700 PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED, /* all rounding modes */
701 PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED,
702 PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED,
703 PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE,
704 PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT,
705 };
706
707 /**
708 * Shader intermediate representation.
709 */
710 enum pipe_shader_ir
711 {
712 PIPE_SHADER_IR_TGSI,
713 PIPE_SHADER_IR_LLVM,
714 PIPE_SHADER_IR_NATIVE
715 };
716
717 /**
718 * Compute-specific implementation capability. They can be queried
719 * using pipe_screen::get_compute_param.
720 */
721 enum pipe_compute_cap
722 {
723 PIPE_COMPUTE_CAP_IR_TARGET,
724 PIPE_COMPUTE_CAP_GRID_DIMENSION,
725 PIPE_COMPUTE_CAP_MAX_GRID_SIZE,
726 PIPE_COMPUTE_CAP_MAX_BLOCK_SIZE,
727 PIPE_COMPUTE_CAP_MAX_THREADS_PER_BLOCK,
728 PIPE_COMPUTE_CAP_MAX_GLOBAL_SIZE,
729 PIPE_COMPUTE_CAP_MAX_LOCAL_SIZE,
730 PIPE_COMPUTE_CAP_MAX_PRIVATE_SIZE,
731 PIPE_COMPUTE_CAP_MAX_INPUT_SIZE,
732 PIPE_COMPUTE_CAP_MAX_MEM_ALLOC_SIZE,
733 PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY,
734 PIPE_COMPUTE_CAP_MAX_COMPUTE_UNITS,
735 PIPE_COMPUTE_CAP_IMAGES_SUPPORTED,
736 PIPE_COMPUTE_CAP_SUBGROUP_SIZE
737 };
738
739 /**
740 * Composite query types
741 */
742
743 /**
744 * Query result for PIPE_QUERY_SO_STATISTICS.
745 */
746 struct pipe_query_data_so_statistics
747 {
748 uint64_t num_primitives_written;
749 uint64_t primitives_storage_needed;
750 };
751
752 /**
753 * Query result for PIPE_QUERY_TIMESTAMP_DISJOINT.
754 */
755 struct pipe_query_data_timestamp_disjoint
756 {
757 uint64_t frequency;
758 boolean disjoint;
759 };
760
761 /**
762 * Query result for PIPE_QUERY_PIPELINE_STATISTICS.
763 */
764 struct pipe_query_data_pipeline_statistics
765 {
766 uint64_t ia_vertices; /**< Num vertices read by the vertex fetcher. */
767 uint64_t ia_primitives; /**< Num primitives read by the vertex fetcher. */
768 uint64_t vs_invocations; /**< Num vertex shader invocations. */
769 uint64_t gs_invocations; /**< Num geometry shader invocations. */
770 uint64_t gs_primitives; /**< Num primitives output by a geometry shader. */
771 uint64_t c_invocations; /**< Num primitives sent to the rasterizer. */
772 uint64_t c_primitives; /**< Num primitives that were rendered. */
773 uint64_t ps_invocations; /**< Num pixel shader invocations. */
774 uint64_t hs_invocations; /**< Num hull shader invocations. */
775 uint64_t ds_invocations; /**< Num domain shader invocations. */
776 uint64_t cs_invocations; /**< Num compute shader invocations. */
777 };
778
779 /**
780 * For batch queries.
781 */
782 union pipe_numeric_type_union
783 {
784 uint64_t u64;
785 uint32_t u32;
786 float f;
787 };
788
789 /**
790 * Query result (returned by pipe_context::get_query_result).
791 */
792 union pipe_query_result
793 {
794 /* PIPE_QUERY_OCCLUSION_PREDICATE */
795 /* PIPE_QUERY_SO_OVERFLOW_PREDICATE */
796 /* PIPE_QUERY_GPU_FINISHED */
797 boolean b;
798
799 /* PIPE_QUERY_OCCLUSION_COUNTER */
800 /* PIPE_QUERY_TIMESTAMP */
801 /* PIPE_QUERY_TIME_ELAPSED */
802 /* PIPE_QUERY_PRIMITIVES_GENERATED */
803 /* PIPE_QUERY_PRIMITIVES_EMITTED */
804 /* PIPE_DRIVER_QUERY_TYPE_UINT64 */
805 /* PIPE_DRIVER_QUERY_TYPE_BYTES */
806 /* PIPE_DRIVER_QUERY_TYPE_MICROSECONDS */
807 /* PIPE_DRIVER_QUERY_TYPE_HZ */
808 uint64_t u64;
809
810 /* PIPE_DRIVER_QUERY_TYPE_UINT */
811 uint32_t u32;
812
813 /* PIPE_DRIVER_QUERY_TYPE_FLOAT */
814 /* PIPE_DRIVER_QUERY_TYPE_PERCENTAGE */
815 float f;
816
817 /* PIPE_QUERY_SO_STATISTICS */
818 struct pipe_query_data_so_statistics so_statistics;
819
820 /* PIPE_QUERY_TIMESTAMP_DISJOINT */
821 struct pipe_query_data_timestamp_disjoint timestamp_disjoint;
822
823 /* PIPE_QUERY_PIPELINE_STATISTICS */
824 struct pipe_query_data_pipeline_statistics pipeline_statistics;
825
826 /* batch queries (variable length) */
827 union pipe_numeric_type_union batch[1];
828 };
829
830 union pipe_color_union
831 {
832 float f[4];
833 int i[4];
834 unsigned int ui[4];
835 };
836
837 enum pipe_driver_query_type
838 {
839 PIPE_DRIVER_QUERY_TYPE_UINT64 = 0,
840 PIPE_DRIVER_QUERY_TYPE_UINT = 1,
841 PIPE_DRIVER_QUERY_TYPE_FLOAT = 2,
842 PIPE_DRIVER_QUERY_TYPE_PERCENTAGE = 3,
843 PIPE_DRIVER_QUERY_TYPE_BYTES = 4,
844 PIPE_DRIVER_QUERY_TYPE_MICROSECONDS = 5,
845 PIPE_DRIVER_QUERY_TYPE_HZ = 6,
846 };
847
848 /* Whether an average value per frame or a cumulative value should be
849 * displayed.
850 */
851 enum pipe_driver_query_result_type
852 {
853 PIPE_DRIVER_QUERY_RESULT_TYPE_AVERAGE = 0,
854 PIPE_DRIVER_QUERY_RESULT_TYPE_CUMULATIVE = 1,
855 };
856
857 /**
858 * Some hardware requires some hardware-specific queries to be submitted
859 * as batched queries. The corresponding query objects are created using
860 * create_batch_query, and at most one such query may be active at
861 * any time.
862 */
863 #define PIPE_DRIVER_QUERY_FLAG_BATCH (1 << 0)
864
865 /* Do not list this query in the HUD. */
866 #define PIPE_DRIVER_QUERY_FLAG_DONT_LIST (1 << 1)
867
868 struct pipe_driver_query_info
869 {
870 const char *name;
871 unsigned query_type; /* PIPE_QUERY_DRIVER_SPECIFIC + i */
872 union pipe_numeric_type_union max_value; /* max value that can be returned */
873 enum pipe_driver_query_type type;
874 enum pipe_driver_query_result_type result_type;
875 unsigned group_id;
876 unsigned flags;
877 };
878
879 struct pipe_driver_query_group_info
880 {
881 const char *name;
882 unsigned max_active_queries;
883 unsigned num_queries;
884 };
885
886 enum pipe_debug_type
887 {
888 PIPE_DEBUG_TYPE_OUT_OF_MEMORY = 1,
889 PIPE_DEBUG_TYPE_ERROR,
890 PIPE_DEBUG_TYPE_SHADER_INFO,
891 PIPE_DEBUG_TYPE_PERF_INFO,
892 PIPE_DEBUG_TYPE_INFO,
893 PIPE_DEBUG_TYPE_FALLBACK,
894 PIPE_DEBUG_TYPE_CONFORMANCE,
895 };
896
897
898 #ifdef __cplusplus
899 }
900 #endif
901
902 #endif