1 /**************************************************************************
3 * Copyright 2008 VMware, Inc.
4 * Copyright 2009-2010 VMware, Inc.
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the
9 * "Software"), to deal in the Software without restriction, including
10 * without limitation the rights to use, copy, modify, merge, publish,
11 * distribute, sub license, and/or sell copies of the Software, and to
12 * permit persons to whom the Software is furnished to do so, subject to
13 * the following conditions:
15 * The above copyright notice and this permission notice (including the
16 * next paragraph) shall be included in all copies or substantial portions
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
20 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
21 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
22 * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
23 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
24 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
25 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27 **************************************************************************/
29 #ifndef P_SHADER_TOKENS_H
30 #define P_SHADER_TOKENS_H
39 unsigned HeaderSize
: 8;
40 unsigned BodySize
: 24;
45 unsigned Processor
: 4; /* PIPE_SHADER_ */
46 unsigned Padding
: 28;
49 enum tgsi_token_type
{
50 TGSI_TOKEN_TYPE_DECLARATION
,
51 TGSI_TOKEN_TYPE_IMMEDIATE
,
52 TGSI_TOKEN_TYPE_INSTRUCTION
,
53 TGSI_TOKEN_TYPE_PROPERTY
,
58 unsigned Type
: 4; /**< TGSI_TOKEN_TYPE_x */
59 unsigned NrTokens
: 8; /**< UINT */
60 unsigned Padding
: 20;
72 TGSI_FILE_SYSTEM_VALUE
,
74 TGSI_FILE_SAMPLER_VIEW
,
77 TGSI_FILE_COUNT
, /**< how many TGSI_FILE_ types */
81 #define TGSI_WRITEMASK_NONE 0x00
82 #define TGSI_WRITEMASK_X 0x01
83 #define TGSI_WRITEMASK_Y 0x02
84 #define TGSI_WRITEMASK_XY 0x03
85 #define TGSI_WRITEMASK_Z 0x04
86 #define TGSI_WRITEMASK_XZ 0x05
87 #define TGSI_WRITEMASK_YZ 0x06
88 #define TGSI_WRITEMASK_XYZ 0x07
89 #define TGSI_WRITEMASK_W 0x08
90 #define TGSI_WRITEMASK_XW 0x09
91 #define TGSI_WRITEMASK_YW 0x0A
92 #define TGSI_WRITEMASK_XYW 0x0B
93 #define TGSI_WRITEMASK_ZW 0x0C
94 #define TGSI_WRITEMASK_XZW 0x0D
95 #define TGSI_WRITEMASK_YZW 0x0E
96 #define TGSI_WRITEMASK_XYZW 0x0F
98 enum tgsi_interpolate_mode
{
99 TGSI_INTERPOLATE_CONSTANT
,
100 TGSI_INTERPOLATE_LINEAR
,
101 TGSI_INTERPOLATE_PERSPECTIVE
,
102 TGSI_INTERPOLATE_COLOR
, /* special color case for smooth/flat */
103 TGSI_INTERPOLATE_COUNT
,
106 enum tgsi_interpolate_loc
{
107 TGSI_INTERPOLATE_LOC_CENTER
,
108 TGSI_INTERPOLATE_LOC_CENTROID
,
109 TGSI_INTERPOLATE_LOC_SAMPLE
,
110 TGSI_INTERPOLATE_LOC_COUNT
,
113 #define TGSI_CYLINDRICAL_WRAP_X (1 << 0)
114 #define TGSI_CYLINDRICAL_WRAP_Y (1 << 1)
115 #define TGSI_CYLINDRICAL_WRAP_Z (1 << 2)
116 #define TGSI_CYLINDRICAL_WRAP_W (1 << 3)
118 enum tgsi_memory_type
{
119 TGSI_MEMORY_TYPE_GLOBAL
, /* OpenCL global */
120 TGSI_MEMORY_TYPE_SHARED
, /* OpenCL local / GLSL shared */
121 TGSI_MEMORY_TYPE_PRIVATE
, /* OpenCL private */
122 TGSI_MEMORY_TYPE_INPUT
, /* OpenCL kernel input params */
123 TGSI_MEMORY_TYPE_COUNT
,
126 struct tgsi_declaration
128 unsigned Type
: 4; /**< TGSI_TOKEN_TYPE_DECLARATION */
129 unsigned NrTokens
: 8; /**< UINT */
130 unsigned File
: 4; /**< one of TGSI_FILE_x */
131 unsigned UsageMask
: 4; /**< bitmask of TGSI_WRITEMASK_x flags */
132 unsigned Dimension
: 1; /**< any extra dimension info? */
133 unsigned Semantic
: 1; /**< BOOL, any semantic info? */
134 unsigned Interpolate
: 1; /**< any interpolation info? */
135 unsigned Invariant
: 1; /**< invariant optimization? */
136 unsigned Local
: 1; /**< optimize as subroutine local variable? */
137 unsigned Array
: 1; /**< extra array info? */
138 unsigned Atomic
: 1; /**< atomic only? for TGSI_FILE_BUFFER */
139 unsigned MemType
: 2; /**< TGSI_MEMORY_TYPE_x for TGSI_FILE_MEMORY */
140 unsigned Padding
: 3;
143 struct tgsi_declaration_range
145 unsigned First
: 16; /**< UINT */
146 unsigned Last
: 16; /**< UINT */
149 struct tgsi_declaration_dimension
151 unsigned Index2D
:16; /**< UINT */
155 struct tgsi_declaration_interp
157 unsigned Interpolate
: 4; /**< one of TGSI_INTERPOLATE_x */
158 unsigned Location
: 2; /**< one of TGSI_INTERPOLATE_LOC_x */
159 unsigned CylindricalWrap
:4; /**< TGSI_CYLINDRICAL_WRAP_x flags */
160 unsigned Padding
: 22;
164 TGSI_SEMANTIC_POSITION
,
166 TGSI_SEMANTIC_BCOLOR
, /**< back-face color */
169 TGSI_SEMANTIC_GENERIC
,
170 TGSI_SEMANTIC_NORMAL
,
172 TGSI_SEMANTIC_EDGEFLAG
,
173 TGSI_SEMANTIC_PRIMID
,
174 TGSI_SEMANTIC_INSTANCEID
, /**< doesn't include start_instance */
175 TGSI_SEMANTIC_VERTEXID
,
176 TGSI_SEMANTIC_STENCIL
,
177 TGSI_SEMANTIC_CLIPDIST
,
178 TGSI_SEMANTIC_CLIPVERTEX
,
179 TGSI_SEMANTIC_GRID_SIZE
, /**< grid size in blocks */
180 TGSI_SEMANTIC_BLOCK_ID
, /**< id of the current block */
181 TGSI_SEMANTIC_BLOCK_SIZE
, /**< block size in threads */
182 TGSI_SEMANTIC_THREAD_ID
, /**< block-relative id of the current thread */
183 TGSI_SEMANTIC_TEXCOORD
, /**< texture or sprite coordinates */
184 TGSI_SEMANTIC_PCOORD
, /**< point sprite coordinate */
185 TGSI_SEMANTIC_VIEWPORT_INDEX
, /**< viewport index */
186 TGSI_SEMANTIC_LAYER
, /**< layer (rendertarget index) */
187 TGSI_SEMANTIC_SAMPLEID
,
188 TGSI_SEMANTIC_SAMPLEPOS
,
189 TGSI_SEMANTIC_SAMPLEMASK
,
190 TGSI_SEMANTIC_INVOCATIONID
,
191 TGSI_SEMANTIC_VERTEXID_NOBASE
,
192 TGSI_SEMANTIC_BASEVERTEX
,
193 TGSI_SEMANTIC_PATCH
, /**< generic per-patch semantic */
194 TGSI_SEMANTIC_TESSCOORD
, /**< coordinate being processed by tess */
195 TGSI_SEMANTIC_TESSOUTER
, /**< outer tessellation levels */
196 TGSI_SEMANTIC_TESSINNER
, /**< inner tessellation levels */
197 TGSI_SEMANTIC_VERTICESIN
, /**< number of input vertices */
198 TGSI_SEMANTIC_HELPER_INVOCATION
, /**< current invocation is helper */
199 TGSI_SEMANTIC_BASEINSTANCE
,
200 TGSI_SEMANTIC_DRAWID
,
201 TGSI_SEMANTIC_WORK_DIM
, /**< opencl get_work_dim value */
202 TGSI_SEMANTIC_SUBGROUP_SIZE
,
203 TGSI_SEMANTIC_SUBGROUP_INVOCATION
,
204 TGSI_SEMANTIC_SUBGROUP_EQ_MASK
,
205 TGSI_SEMANTIC_SUBGROUP_GE_MASK
,
206 TGSI_SEMANTIC_SUBGROUP_GT_MASK
,
207 TGSI_SEMANTIC_SUBGROUP_LE_MASK
,
208 TGSI_SEMANTIC_SUBGROUP_LT_MASK
,
209 TGSI_SEMANTIC_COUNT
, /**< number of semantic values */
212 struct tgsi_declaration_semantic
214 unsigned Name
: 8; /**< one of TGSI_SEMANTIC_x */
215 unsigned Index
: 16; /**< UINT */
216 unsigned StreamX
: 2; /**< vertex stream (for GS output) */
217 unsigned StreamY
: 2;
218 unsigned StreamZ
: 2;
219 unsigned StreamW
: 2;
222 struct tgsi_declaration_image
{
223 unsigned Resource
: 8; /**< one of TGSI_TEXTURE_ */
225 unsigned Writable
: 1;
226 unsigned Format
: 10; /**< one of PIPE_FORMAT_ */
227 unsigned Padding
: 12;
230 enum tgsi_return_type
{
231 TGSI_RETURN_TYPE_UNORM
= 0,
232 TGSI_RETURN_TYPE_SNORM
,
233 TGSI_RETURN_TYPE_SINT
,
234 TGSI_RETURN_TYPE_UINT
,
235 TGSI_RETURN_TYPE_FLOAT
,
236 TGSI_RETURN_TYPE_COUNT
239 struct tgsi_declaration_sampler_view
{
240 unsigned Resource
: 8; /**< one of TGSI_TEXTURE_ */
241 unsigned ReturnTypeX
: 6; /**< one of enum tgsi_return_type */
242 unsigned ReturnTypeY
: 6; /**< one of enum tgsi_return_type */
243 unsigned ReturnTypeZ
: 6; /**< one of enum tgsi_return_type */
244 unsigned ReturnTypeW
: 6; /**< one of enum tgsi_return_type */
247 struct tgsi_declaration_array
{
248 unsigned ArrayID
: 10;
249 unsigned Padding
: 22;
261 struct tgsi_immediate
263 unsigned Type
: 4; /**< TGSI_TOKEN_TYPE_IMMEDIATE */
264 unsigned NrTokens
: 14; /**< UINT */
265 unsigned DataType
: 4; /**< one of TGSI_IMM_x */
266 unsigned Padding
: 10;
269 union tgsi_immediate_data
276 enum tgsi_property_name
{
277 TGSI_PROPERTY_GS_INPUT_PRIM
,
278 TGSI_PROPERTY_GS_OUTPUT_PRIM
,
279 TGSI_PROPERTY_GS_MAX_OUTPUT_VERTICES
,
280 TGSI_PROPERTY_FS_COORD_ORIGIN
,
281 TGSI_PROPERTY_FS_COORD_PIXEL_CENTER
,
282 TGSI_PROPERTY_FS_COLOR0_WRITES_ALL_CBUFS
,
283 TGSI_PROPERTY_FS_DEPTH_LAYOUT
,
284 TGSI_PROPERTY_VS_PROHIBIT_UCPS
,
285 TGSI_PROPERTY_GS_INVOCATIONS
,
286 TGSI_PROPERTY_VS_WINDOW_SPACE_POSITION
,
287 TGSI_PROPERTY_TCS_VERTICES_OUT
,
288 TGSI_PROPERTY_TES_PRIM_MODE
,
289 TGSI_PROPERTY_TES_SPACING
,
290 TGSI_PROPERTY_TES_VERTEX_ORDER_CW
,
291 TGSI_PROPERTY_TES_POINT_MODE
,
292 TGSI_PROPERTY_NUM_CLIPDIST_ENABLED
,
293 TGSI_PROPERTY_NUM_CULLDIST_ENABLED
,
294 TGSI_PROPERTY_FS_EARLY_DEPTH_STENCIL
,
295 TGSI_PROPERTY_NEXT_SHADER
,
296 TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
,
297 TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT
,
298 TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH
,
299 TGSI_PROPERTY_MUL_ZERO_WINS
,
303 struct tgsi_property
{
304 unsigned Type
: 4; /**< TGSI_TOKEN_TYPE_PROPERTY */
305 unsigned NrTokens
: 8; /**< UINT */
306 unsigned PropertyName
: 8; /**< one of TGSI_PROPERTY */
307 unsigned Padding
: 12;
310 enum tgsi_fs_coord_origin
{
311 TGSI_FS_COORD_ORIGIN_UPPER_LEFT
,
312 TGSI_FS_COORD_ORIGIN_LOWER_LEFT
,
315 enum tgsi_fs_coord_pixcenter
{
316 TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER
,
317 TGSI_FS_COORD_PIXEL_CENTER_INTEGER
,
320 enum tgsi_fs_depth_layout
{
321 TGSI_FS_DEPTH_LAYOUT_NONE
,
322 TGSI_FS_DEPTH_LAYOUT_ANY
,
323 TGSI_FS_DEPTH_LAYOUT_GREATER
,
324 TGSI_FS_DEPTH_LAYOUT_LESS
,
325 TGSI_FS_DEPTH_LAYOUT_UNCHANGED
,
328 struct tgsi_property_data
{
334 * For more information on semantics of opcodes and
335 * which APIs are known to use which opcodes, see
336 * gallium/docs/source/tgsi.rst
338 #define TGSI_OPCODE_ARL 0
339 #define TGSI_OPCODE_MOV 1
340 #define TGSI_OPCODE_LIT 2
341 #define TGSI_OPCODE_RCP 3
342 #define TGSI_OPCODE_RSQ 4
343 #define TGSI_OPCODE_EXP 5
344 #define TGSI_OPCODE_LOG 6
345 #define TGSI_OPCODE_MUL 7
346 #define TGSI_OPCODE_ADD 8
347 #define TGSI_OPCODE_DP3 9
348 #define TGSI_OPCODE_DP4 10
349 #define TGSI_OPCODE_DST 11
350 #define TGSI_OPCODE_MIN 12
351 #define TGSI_OPCODE_MAX 13
352 #define TGSI_OPCODE_SLT 14
353 #define TGSI_OPCODE_SGE 15
354 #define TGSI_OPCODE_MAD 16
355 #define TGSI_OPCODE_TEX_LZ 17
356 #define TGSI_OPCODE_LRP 18
357 #define TGSI_OPCODE_FMA 19
358 #define TGSI_OPCODE_SQRT 20
359 #define TGSI_OPCODE_DP2A 21
360 #define TGSI_OPCODE_F2U64 22
361 #define TGSI_OPCODE_F2I64 23
362 #define TGSI_OPCODE_FRC 24
363 #define TGSI_OPCODE_TXF_LZ 25
364 #define TGSI_OPCODE_FLR 26
365 #define TGSI_OPCODE_ROUND 27
366 #define TGSI_OPCODE_EX2 28
367 #define TGSI_OPCODE_LG2 29
368 #define TGSI_OPCODE_POW 30
369 #define TGSI_OPCODE_XPD 31
370 #define TGSI_OPCODE_U2I64 32
371 #define TGSI_OPCODE_CLOCK 33
372 #define TGSI_OPCODE_I2I64 34
373 #define TGSI_OPCODE_DPH 35
374 #define TGSI_OPCODE_COS 36
375 #define TGSI_OPCODE_DDX 37
376 #define TGSI_OPCODE_DDY 38
377 #define TGSI_OPCODE_KILL 39 /* unconditional */
378 #define TGSI_OPCODE_PK2H 40
379 #define TGSI_OPCODE_PK2US 41
380 #define TGSI_OPCODE_PK4B 42
381 #define TGSI_OPCODE_PK4UB 43
382 #define TGSI_OPCODE_D2U64 44
383 #define TGSI_OPCODE_SEQ 45
384 #define TGSI_OPCODE_D2I64 46
385 #define TGSI_OPCODE_SGT 47
386 #define TGSI_OPCODE_SIN 48
387 #define TGSI_OPCODE_SLE 49
388 #define TGSI_OPCODE_SNE 50
389 #define TGSI_OPCODE_U642D 51
390 #define TGSI_OPCODE_TEX 52
391 #define TGSI_OPCODE_TXD 53
392 #define TGSI_OPCODE_TXP 54
393 #define TGSI_OPCODE_UP2H 55
394 #define TGSI_OPCODE_UP2US 56
395 #define TGSI_OPCODE_UP4B 57
396 #define TGSI_OPCODE_UP4UB 58
397 #define TGSI_OPCODE_U642F 59
398 #define TGSI_OPCODE_I642F 60
399 #define TGSI_OPCODE_ARR 61
400 #define TGSI_OPCODE_I642D 62
401 #define TGSI_OPCODE_CAL 63
402 #define TGSI_OPCODE_RET 64
403 #define TGSI_OPCODE_SSG 65 /* SGN */
404 #define TGSI_OPCODE_CMP 66
405 #define TGSI_OPCODE_SCS 67
406 #define TGSI_OPCODE_TXB 68
407 #define TGSI_OPCODE_FBFETCH 69
408 #define TGSI_OPCODE_DIV 70
409 #define TGSI_OPCODE_DP2 71
410 #define TGSI_OPCODE_TXL 72
411 #define TGSI_OPCODE_BRK 73
412 #define TGSI_OPCODE_IF 74
413 #define TGSI_OPCODE_UIF 75
414 #define TGSI_OPCODE_READ_INVOC 76
415 #define TGSI_OPCODE_ELSE 77
416 #define TGSI_OPCODE_ENDIF 78
418 #define TGSI_OPCODE_DDX_FINE 79
419 #define TGSI_OPCODE_DDY_FINE 80
421 #define TGSI_OPCODE_PUSHA 81
422 #define TGSI_OPCODE_POPA 82
423 #define TGSI_OPCODE_CEIL 83
424 #define TGSI_OPCODE_I2F 84
425 #define TGSI_OPCODE_NOT 85
426 #define TGSI_OPCODE_TRUNC 86
427 #define TGSI_OPCODE_SHL 87
428 #define TGSI_OPCODE_BALLOT 88
429 #define TGSI_OPCODE_AND 89
430 #define TGSI_OPCODE_OR 90
431 #define TGSI_OPCODE_MOD 91
432 #define TGSI_OPCODE_XOR 92
433 #define TGSI_OPCODE_SAD 93
434 #define TGSI_OPCODE_TXF 94
435 #define TGSI_OPCODE_TXQ 95
436 #define TGSI_OPCODE_CONT 96
437 #define TGSI_OPCODE_EMIT 97
438 #define TGSI_OPCODE_ENDPRIM 98
439 #define TGSI_OPCODE_BGNLOOP 99
440 #define TGSI_OPCODE_BGNSUB 100
441 #define TGSI_OPCODE_ENDLOOP 101
442 #define TGSI_OPCODE_ENDSUB 102
443 #define TGSI_OPCODE_TXQ_LZ 103 /* TXQ for mipmap level 0 */
444 #define TGSI_OPCODE_TXQS 104
445 #define TGSI_OPCODE_RESQ 105
446 #define TGSI_OPCODE_READ_FIRST 106
447 #define TGSI_OPCODE_NOP 107
449 #define TGSI_OPCODE_FSEQ 108
450 #define TGSI_OPCODE_FSGE 109
451 #define TGSI_OPCODE_FSLT 110
452 #define TGSI_OPCODE_FSNE 111
454 #define TGSI_OPCODE_MEMBAR 112
455 #define TGSI_OPCODE_CALLNZ 113
457 #define TGSI_OPCODE_BREAKC 115
458 #define TGSI_OPCODE_KILL_IF 116 /* conditional kill */
459 #define TGSI_OPCODE_END 117 /* aka HALT */
460 #define TGSI_OPCODE_DFMA 118
461 #define TGSI_OPCODE_F2I 119
462 #define TGSI_OPCODE_IDIV 120
463 #define TGSI_OPCODE_IMAX 121
464 #define TGSI_OPCODE_IMIN 122
465 #define TGSI_OPCODE_INEG 123
466 #define TGSI_OPCODE_ISGE 124
467 #define TGSI_OPCODE_ISHR 125
468 #define TGSI_OPCODE_ISLT 126
469 #define TGSI_OPCODE_F2U 127
470 #define TGSI_OPCODE_U2F 128
471 #define TGSI_OPCODE_UADD 129
472 #define TGSI_OPCODE_UDIV 130
473 #define TGSI_OPCODE_UMAD 131
474 #define TGSI_OPCODE_UMAX 132
475 #define TGSI_OPCODE_UMIN 133
476 #define TGSI_OPCODE_UMOD 134
477 #define TGSI_OPCODE_UMUL 135
478 #define TGSI_OPCODE_USEQ 136
479 #define TGSI_OPCODE_USGE 137
480 #define TGSI_OPCODE_USHR 138
481 #define TGSI_OPCODE_USLT 139
482 #define TGSI_OPCODE_USNE 140
483 #define TGSI_OPCODE_SWITCH 141
484 #define TGSI_OPCODE_CASE 142
485 #define TGSI_OPCODE_DEFAULT 143
486 #define TGSI_OPCODE_ENDSWITCH 144
488 /* resource related opcodes */
489 #define TGSI_OPCODE_SAMPLE 145
490 #define TGSI_OPCODE_SAMPLE_I 146
491 #define TGSI_OPCODE_SAMPLE_I_MS 147
492 #define TGSI_OPCODE_SAMPLE_B 148
493 #define TGSI_OPCODE_SAMPLE_C 149
494 #define TGSI_OPCODE_SAMPLE_C_LZ 150
495 #define TGSI_OPCODE_SAMPLE_D 151
496 #define TGSI_OPCODE_SAMPLE_L 152
497 #define TGSI_OPCODE_GATHER4 153
498 #define TGSI_OPCODE_SVIEWINFO 154
499 #define TGSI_OPCODE_SAMPLE_POS 155
500 #define TGSI_OPCODE_SAMPLE_INFO 156
502 #define TGSI_OPCODE_UARL 157
503 #define TGSI_OPCODE_UCMP 158
504 #define TGSI_OPCODE_IABS 159
505 #define TGSI_OPCODE_ISSG 160
507 #define TGSI_OPCODE_LOAD 161
508 #define TGSI_OPCODE_STORE 162
510 #define TGSI_OPCODE_MFENCE 163
511 #define TGSI_OPCODE_LFENCE 164
512 #define TGSI_OPCODE_SFENCE 165
513 #define TGSI_OPCODE_BARRIER 166
515 #define TGSI_OPCODE_ATOMUADD 167
516 #define TGSI_OPCODE_ATOMXCHG 168
517 #define TGSI_OPCODE_ATOMCAS 169
518 #define TGSI_OPCODE_ATOMAND 170
519 #define TGSI_OPCODE_ATOMOR 171
520 #define TGSI_OPCODE_ATOMXOR 172
521 #define TGSI_OPCODE_ATOMUMIN 173
522 #define TGSI_OPCODE_ATOMUMAX 174
523 #define TGSI_OPCODE_ATOMIMIN 175
524 #define TGSI_OPCODE_ATOMIMAX 176
526 /* to be used for shadow cube map compares */
527 #define TGSI_OPCODE_TEX2 177
528 #define TGSI_OPCODE_TXB2 178
529 #define TGSI_OPCODE_TXL2 179
531 #define TGSI_OPCODE_IMUL_HI 180
532 #define TGSI_OPCODE_UMUL_HI 181
534 #define TGSI_OPCODE_TG4 182
536 #define TGSI_OPCODE_LODQ 183
538 #define TGSI_OPCODE_IBFE 184
539 #define TGSI_OPCODE_UBFE 185
540 #define TGSI_OPCODE_BFI 186
541 #define TGSI_OPCODE_BREV 187
542 #define TGSI_OPCODE_POPC 188
543 #define TGSI_OPCODE_LSB 189
544 #define TGSI_OPCODE_IMSB 190
545 #define TGSI_OPCODE_UMSB 191
547 #define TGSI_OPCODE_INTERP_CENTROID 192
548 #define TGSI_OPCODE_INTERP_SAMPLE 193
549 #define TGSI_OPCODE_INTERP_OFFSET 194
551 /* sm5 marked opcodes are supported in D3D11 optionally - also DMOV, DMOVC */
552 #define TGSI_OPCODE_F2D 195 /* SM5 */
553 #define TGSI_OPCODE_D2F 196
554 #define TGSI_OPCODE_DABS 197
555 #define TGSI_OPCODE_DNEG 198 /* SM5 */
556 #define TGSI_OPCODE_DADD 199 /* SM5 */
557 #define TGSI_OPCODE_DMUL 200 /* SM5 */
558 #define TGSI_OPCODE_DMAX 201 /* SM5 */
559 #define TGSI_OPCODE_DMIN 202 /* SM5 */
560 #define TGSI_OPCODE_DSLT 203 /* SM5 */
561 #define TGSI_OPCODE_DSGE 204 /* SM5 */
562 #define TGSI_OPCODE_DSEQ 205 /* SM5 */
563 #define TGSI_OPCODE_DSNE 206 /* SM5 */
564 #define TGSI_OPCODE_DRCP 207 /* eg, cayman */
565 #define TGSI_OPCODE_DSQRT 208 /* eg, cayman also has DRSQ */
566 #define TGSI_OPCODE_DMAD 209
567 #define TGSI_OPCODE_DFRAC 210 /* eg, cayman */
568 #define TGSI_OPCODE_DLDEXP 211 /* eg, cayman */
569 #define TGSI_OPCODE_DFRACEXP 212 /* eg, cayman */
570 #define TGSI_OPCODE_D2I 213
571 #define TGSI_OPCODE_I2D 214
572 #define TGSI_OPCODE_D2U 215
573 #define TGSI_OPCODE_U2D 216
574 #define TGSI_OPCODE_DRSQ 217 /* eg, cayman also has DRSQ */
575 #define TGSI_OPCODE_DTRUNC 218 /* nvc0 */
576 #define TGSI_OPCODE_DCEIL 219 /* nvc0 */
577 #define TGSI_OPCODE_DFLR 220 /* nvc0 */
578 #define TGSI_OPCODE_DROUND 221 /* nvc0 */
579 #define TGSI_OPCODE_DSSG 222
581 #define TGSI_OPCODE_VOTE_ANY 223
582 #define TGSI_OPCODE_VOTE_ALL 224
583 #define TGSI_OPCODE_VOTE_EQ 225
585 #define TGSI_OPCODE_U64SEQ 226
586 #define TGSI_OPCODE_U64SNE 227
587 #define TGSI_OPCODE_I64SLT 228
588 #define TGSI_OPCODE_U64SLT 229
589 #define TGSI_OPCODE_I64SGE 230
590 #define TGSI_OPCODE_U64SGE 231
592 #define TGSI_OPCODE_I64MIN 232
593 #define TGSI_OPCODE_U64MIN 233
594 #define TGSI_OPCODE_I64MAX 234
595 #define TGSI_OPCODE_U64MAX 235
597 #define TGSI_OPCODE_I64ABS 236
598 #define TGSI_OPCODE_I64SSG 237
599 #define TGSI_OPCODE_I64NEG 238
601 #define TGSI_OPCODE_U64ADD 239
602 #define TGSI_OPCODE_U64MUL 240
603 #define TGSI_OPCODE_U64SHL 241
604 #define TGSI_OPCODE_I64SHR 242
605 #define TGSI_OPCODE_U64SHR 243
607 #define TGSI_OPCODE_I64DIV 244
608 #define TGSI_OPCODE_U64DIV 245
609 #define TGSI_OPCODE_I64MOD 246
610 #define TGSI_OPCODE_U64MOD 247
612 #define TGSI_OPCODE_DDIV 248
614 #define TGSI_OPCODE_LAST 249
617 * Opcode is the operation code to execute. A given operation defines the
618 * semantics how the source registers (if any) are interpreted and what is
619 * written to the destination registers (if any) as a result of execution.
621 * NumDstRegs and NumSrcRegs is the number of destination and source registers,
622 * respectively. For a given operation code, those numbers are fixed and are
623 * present here only for convenience.
625 * Saturate controls how are final results in destination registers modified.
628 struct tgsi_instruction
630 unsigned Type
: 4; /* TGSI_TOKEN_TYPE_INSTRUCTION */
631 unsigned NrTokens
: 8; /* UINT */
632 unsigned Opcode
: 8; /* TGSI_OPCODE_ */
633 unsigned Saturate
: 1; /* BOOL */
634 unsigned NumDstRegs
: 2; /* UINT */
635 unsigned NumSrcRegs
: 4; /* UINT */
637 unsigned Texture
: 1;
639 unsigned Padding
: 2;
643 * If tgsi_instruction::Label is TRUE, tgsi_instruction_label follows.
645 * If tgsi_instruction::Texture is TRUE, tgsi_instruction_texture follows.
646 * if texture instruction has a number of offsets,
647 * then tgsi_instruction::Texture::NumOffset of tgsi_texture_offset follow.
649 * Then, tgsi_instruction::NumDstRegs of tgsi_dst_register follow.
651 * Then, tgsi_instruction::NumSrcRegs of tgsi_src_register follow.
653 * tgsi_instruction::NrTokens contains the total number of words that make the
654 * instruction, including the instruction word.
664 struct tgsi_instruction_label
666 unsigned Label
: 24; /* UINT */
667 unsigned Padding
: 8;
670 enum tgsi_texture_type
{
677 TGSI_TEXTURE_SHADOW1D
,
678 TGSI_TEXTURE_SHADOW2D
,
679 TGSI_TEXTURE_SHADOWRECT
,
680 TGSI_TEXTURE_1D_ARRAY
,
681 TGSI_TEXTURE_2D_ARRAY
,
682 TGSI_TEXTURE_SHADOW1D_ARRAY
,
683 TGSI_TEXTURE_SHADOW2D_ARRAY
,
684 TGSI_TEXTURE_SHADOWCUBE
,
685 TGSI_TEXTURE_2D_MSAA
,
686 TGSI_TEXTURE_2D_ARRAY_MSAA
,
687 TGSI_TEXTURE_CUBE_ARRAY
,
688 TGSI_TEXTURE_SHADOWCUBE_ARRAY
,
689 TGSI_TEXTURE_UNKNOWN
,
693 struct tgsi_instruction_texture
695 unsigned Texture
: 8; /* TGSI_TEXTURE_ */
696 unsigned NumOffsets
: 4;
697 unsigned Padding
: 20;
700 /* for texture offsets in GLSL and DirectX.
701 * Generally these always come from TGSI_FILE_IMMEDIATE,
702 * however DX11 appears to have the capability to do
703 * non-constant texture offsets.
705 struct tgsi_texture_offset
708 unsigned File
: 4; /**< one of TGSI_FILE_x */
709 unsigned SwizzleX
: 2; /* TGSI_SWIZZLE_x */
710 unsigned SwizzleY
: 2; /* TGSI_SWIZZLE_x */
711 unsigned SwizzleZ
: 2; /* TGSI_SWIZZLE_x */
712 unsigned Padding
: 6;
716 * File specifies the register array to access.
718 * Index specifies the element number of a register in the register file.
720 * If Indirect is TRUE, Index should be offset by the X component of the indirect
721 * register that follows. The register can be now fetched into local storage
722 * for further processing.
724 * If Negate is TRUE, all components of the fetched register are negated.
726 * The fetched register components are swizzled according to SwizzleX, SwizzleY,
727 * SwizzleZ and SwizzleW.
731 struct tgsi_src_register
733 unsigned File
: 4; /* TGSI_FILE_ */
734 unsigned Indirect
: 1; /* BOOL */
735 unsigned Dimension
: 1; /* BOOL */
736 int Index
: 16; /* SINT */
737 unsigned SwizzleX
: 2; /* TGSI_SWIZZLE_ */
738 unsigned SwizzleY
: 2; /* TGSI_SWIZZLE_ */
739 unsigned SwizzleZ
: 2; /* TGSI_SWIZZLE_ */
740 unsigned SwizzleW
: 2; /* TGSI_SWIZZLE_ */
741 unsigned Absolute
: 1; /* BOOL */
742 unsigned Negate
: 1; /* BOOL */
746 * If tgsi_src_register::Indirect is TRUE, tgsi_ind_register follows.
748 * File, Index and Swizzle are handled the same as in tgsi_src_register.
750 * If ArrayID is zero the whole register file might be indirectly addressed,
751 * if not only the Declaration with this ArrayID is accessed by this operand.
755 struct tgsi_ind_register
757 unsigned File
: 4; /* TGSI_FILE_ */
758 int Index
: 16; /* SINT */
759 unsigned Swizzle
: 2; /* TGSI_SWIZZLE_ */
760 unsigned ArrayID
: 10; /* UINT */
764 * If tgsi_src_register::Dimension is TRUE, tgsi_dimension follows.
767 struct tgsi_dimension
769 unsigned Indirect
: 1; /* BOOL */
770 unsigned Dimension
: 1; /* BOOL */
771 unsigned Padding
: 14;
772 int Index
: 16; /* SINT */
775 struct tgsi_dst_register
777 unsigned File
: 4; /* TGSI_FILE_ */
778 unsigned WriteMask
: 4; /* TGSI_WRITEMASK_ */
779 unsigned Indirect
: 1; /* BOOL */
780 unsigned Dimension
: 1; /* BOOL */
781 int Index
: 16; /* SINT */
782 unsigned Padding
: 6;
785 #define TGSI_MEMORY_COHERENT (1 << 0)
786 #define TGSI_MEMORY_RESTRICT (1 << 1)
787 #define TGSI_MEMORY_VOLATILE (1 << 2)
790 * Specifies the type of memory access to do for the LOAD/STORE instruction.
792 struct tgsi_instruction_memory
794 unsigned Qualifier
: 3; /* TGSI_MEMORY_ */
795 unsigned Texture
: 8; /* only for images: TGSI_TEXTURE_ */
796 unsigned Format
: 10; /* only for images: PIPE_FORMAT_ */
797 unsigned Padding
: 11;
800 #define TGSI_MEMBAR_SHADER_BUFFER (1 << 0)
801 #define TGSI_MEMBAR_ATOMIC_BUFFER (1 << 1)
802 #define TGSI_MEMBAR_SHADER_IMAGE (1 << 2)
803 #define TGSI_MEMBAR_SHARED (1 << 3)
804 #define TGSI_MEMBAR_THREAD_GROUP (1 << 4)
810 #endif /* P_SHADER_TOKENS_H */