1 /**************************************************************************
3 * Copyright 2008 VMware, Inc.
4 * Copyright 2009-2010 VMware, Inc.
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the
9 * "Software"), to deal in the Software without restriction, including
10 * without limitation the rights to use, copy, modify, merge, publish,
11 * distribute, sub license, and/or sell copies of the Software, and to
12 * permit persons to whom the Software is furnished to do so, subject to
13 * the following conditions:
15 * The above copyright notice and this permission notice (including the
16 * next paragraph) shall be included in all copies or substantial portions
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
20 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
21 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
22 * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
23 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
24 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
25 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27 **************************************************************************/
29 #ifndef P_SHADER_TOKENS_H
30 #define P_SHADER_TOKENS_H
39 unsigned HeaderSize
: 8;
40 unsigned BodySize
: 24;
45 unsigned Processor
: 4; /* PIPE_SHADER_ */
46 unsigned Padding
: 28;
49 enum tgsi_token_type
{
50 TGSI_TOKEN_TYPE_DECLARATION
,
51 TGSI_TOKEN_TYPE_IMMEDIATE
,
52 TGSI_TOKEN_TYPE_INSTRUCTION
,
53 TGSI_TOKEN_TYPE_PROPERTY
,
58 unsigned Type
: 4; /**< TGSI_TOKEN_TYPE_x */
59 unsigned NrTokens
: 8; /**< UINT */
60 unsigned Padding
: 20;
73 TGSI_FILE_SYSTEM_VALUE
,
75 TGSI_FILE_SAMPLER_VIEW
,
78 TGSI_FILE_COUNT
, /**< how many TGSI_FILE_ types */
82 #define TGSI_WRITEMASK_NONE 0x00
83 #define TGSI_WRITEMASK_X 0x01
84 #define TGSI_WRITEMASK_Y 0x02
85 #define TGSI_WRITEMASK_XY 0x03
86 #define TGSI_WRITEMASK_Z 0x04
87 #define TGSI_WRITEMASK_XZ 0x05
88 #define TGSI_WRITEMASK_YZ 0x06
89 #define TGSI_WRITEMASK_XYZ 0x07
90 #define TGSI_WRITEMASK_W 0x08
91 #define TGSI_WRITEMASK_XW 0x09
92 #define TGSI_WRITEMASK_YW 0x0A
93 #define TGSI_WRITEMASK_XYW 0x0B
94 #define TGSI_WRITEMASK_ZW 0x0C
95 #define TGSI_WRITEMASK_XZW 0x0D
96 #define TGSI_WRITEMASK_YZW 0x0E
97 #define TGSI_WRITEMASK_XYZW 0x0F
99 enum tgsi_interpolate_mode
{
100 TGSI_INTERPOLATE_CONSTANT
,
101 TGSI_INTERPOLATE_LINEAR
,
102 TGSI_INTERPOLATE_PERSPECTIVE
,
103 TGSI_INTERPOLATE_COLOR
, /* special color case for smooth/flat */
104 TGSI_INTERPOLATE_COUNT
,
107 enum tgsi_interpolate_loc
{
108 TGSI_INTERPOLATE_LOC_CENTER
,
109 TGSI_INTERPOLATE_LOC_CENTROID
,
110 TGSI_INTERPOLATE_LOC_SAMPLE
,
111 TGSI_INTERPOLATE_LOC_COUNT
,
114 #define TGSI_CYLINDRICAL_WRAP_X (1 << 0)
115 #define TGSI_CYLINDRICAL_WRAP_Y (1 << 1)
116 #define TGSI_CYLINDRICAL_WRAP_Z (1 << 2)
117 #define TGSI_CYLINDRICAL_WRAP_W (1 << 3)
119 enum tgsi_memory_type
{
120 TGSI_MEMORY_TYPE_GLOBAL
, /* OpenCL global */
121 TGSI_MEMORY_TYPE_SHARED
, /* OpenCL local / GLSL shared */
122 TGSI_MEMORY_TYPE_PRIVATE
, /* OpenCL private */
123 TGSI_MEMORY_TYPE_INPUT
, /* OpenCL kernel input params */
124 TGSI_MEMORY_TYPE_COUNT
,
127 struct tgsi_declaration
129 unsigned Type
: 4; /**< TGSI_TOKEN_TYPE_DECLARATION */
130 unsigned NrTokens
: 8; /**< UINT */
131 unsigned File
: 4; /**< one of TGSI_FILE_x */
132 unsigned UsageMask
: 4; /**< bitmask of TGSI_WRITEMASK_x flags */
133 unsigned Dimension
: 1; /**< any extra dimension info? */
134 unsigned Semantic
: 1; /**< BOOL, any semantic info? */
135 unsigned Interpolate
: 1; /**< any interpolation info? */
136 unsigned Invariant
: 1; /**< invariant optimization? */
137 unsigned Local
: 1; /**< optimize as subroutine local variable? */
138 unsigned Array
: 1; /**< extra array info? */
139 unsigned Atomic
: 1; /**< atomic only? for TGSI_FILE_BUFFER */
140 unsigned MemType
: 2; /**< TGSI_MEMORY_TYPE_x for TGSI_FILE_MEMORY */
141 unsigned Padding
: 3;
144 struct tgsi_declaration_range
146 unsigned First
: 16; /**< UINT */
147 unsigned Last
: 16; /**< UINT */
150 struct tgsi_declaration_dimension
152 unsigned Index2D
:16; /**< UINT */
156 struct tgsi_declaration_interp
158 unsigned Interpolate
: 4; /**< one of TGSI_INTERPOLATE_x */
159 unsigned Location
: 2; /**< one of TGSI_INTERPOLATE_LOC_x */
160 unsigned CylindricalWrap
:4; /**< TGSI_CYLINDRICAL_WRAP_x flags */
161 unsigned Padding
: 22;
165 TGSI_SEMANTIC_POSITION
,
167 TGSI_SEMANTIC_BCOLOR
, /**< back-face color */
170 TGSI_SEMANTIC_GENERIC
,
171 TGSI_SEMANTIC_NORMAL
,
173 TGSI_SEMANTIC_EDGEFLAG
,
174 TGSI_SEMANTIC_PRIMID
,
175 TGSI_SEMANTIC_INSTANCEID
, /**< doesn't include start_instance */
176 TGSI_SEMANTIC_VERTEXID
,
177 TGSI_SEMANTIC_STENCIL
,
178 TGSI_SEMANTIC_CLIPDIST
,
179 TGSI_SEMANTIC_CLIPVERTEX
,
180 TGSI_SEMANTIC_GRID_SIZE
, /**< grid size in blocks */
181 TGSI_SEMANTIC_BLOCK_ID
, /**< id of the current block */
182 TGSI_SEMANTIC_BLOCK_SIZE
, /**< block size in threads */
183 TGSI_SEMANTIC_THREAD_ID
, /**< block-relative id of the current thread */
184 TGSI_SEMANTIC_TEXCOORD
, /**< texture or sprite coordinates */
185 TGSI_SEMANTIC_PCOORD
, /**< point sprite coordinate */
186 TGSI_SEMANTIC_VIEWPORT_INDEX
, /**< viewport index */
187 TGSI_SEMANTIC_LAYER
, /**< layer (rendertarget index) */
188 TGSI_SEMANTIC_SAMPLEID
,
189 TGSI_SEMANTIC_SAMPLEPOS
,
190 TGSI_SEMANTIC_SAMPLEMASK
,
191 TGSI_SEMANTIC_INVOCATIONID
,
192 TGSI_SEMANTIC_VERTEXID_NOBASE
,
193 TGSI_SEMANTIC_BASEVERTEX
,
194 TGSI_SEMANTIC_PATCH
, /**< generic per-patch semantic */
195 TGSI_SEMANTIC_TESSCOORD
, /**< coordinate being processed by tess */
196 TGSI_SEMANTIC_TESSOUTER
, /**< outer tessellation levels */
197 TGSI_SEMANTIC_TESSINNER
, /**< inner tessellation levels */
198 TGSI_SEMANTIC_VERTICESIN
, /**< number of input vertices */
199 TGSI_SEMANTIC_HELPER_INVOCATION
, /**< current invocation is helper */
200 TGSI_SEMANTIC_BASEINSTANCE
,
201 TGSI_SEMANTIC_DRAWID
,
202 TGSI_SEMANTIC_WORK_DIM
, /**< opencl get_work_dim value */
203 TGSI_SEMANTIC_COUNT
, /**< number of semantic values */
206 struct tgsi_declaration_semantic
208 unsigned Name
: 8; /**< one of TGSI_SEMANTIC_x */
209 unsigned Index
: 16; /**< UINT */
210 unsigned StreamX
: 2; /**< vertex stream (for GS output) */
211 unsigned StreamY
: 2;
212 unsigned StreamZ
: 2;
213 unsigned StreamW
: 2;
216 struct tgsi_declaration_image
{
217 unsigned Resource
: 8; /**< one of TGSI_TEXTURE_ */
219 unsigned Writable
: 1;
220 unsigned Format
: 10; /**< one of PIPE_FORMAT_ */
221 unsigned Padding
: 12;
224 enum tgsi_return_type
{
225 TGSI_RETURN_TYPE_UNORM
= 0,
226 TGSI_RETURN_TYPE_SNORM
,
227 TGSI_RETURN_TYPE_SINT
,
228 TGSI_RETURN_TYPE_UINT
,
229 TGSI_RETURN_TYPE_FLOAT
,
230 TGSI_RETURN_TYPE_COUNT
233 struct tgsi_declaration_sampler_view
{
234 unsigned Resource
: 8; /**< one of TGSI_TEXTURE_ */
235 unsigned ReturnTypeX
: 6; /**< one of enum tgsi_return_type */
236 unsigned ReturnTypeY
: 6; /**< one of enum tgsi_return_type */
237 unsigned ReturnTypeZ
: 6; /**< one of enum tgsi_return_type */
238 unsigned ReturnTypeW
: 6; /**< one of enum tgsi_return_type */
241 struct tgsi_declaration_array
{
242 unsigned ArrayID
: 10;
243 unsigned Padding
: 22;
255 struct tgsi_immediate
257 unsigned Type
: 4; /**< TGSI_TOKEN_TYPE_IMMEDIATE */
258 unsigned NrTokens
: 14; /**< UINT */
259 unsigned DataType
: 4; /**< one of TGSI_IMM_x */
260 unsigned Padding
: 10;
263 union tgsi_immediate_data
270 enum tgsi_property_name
{
271 TGSI_PROPERTY_GS_INPUT_PRIM
,
272 TGSI_PROPERTY_GS_OUTPUT_PRIM
,
273 TGSI_PROPERTY_GS_MAX_OUTPUT_VERTICES
,
274 TGSI_PROPERTY_FS_COORD_ORIGIN
,
275 TGSI_PROPERTY_FS_COORD_PIXEL_CENTER
,
276 TGSI_PROPERTY_FS_COLOR0_WRITES_ALL_CBUFS
,
277 TGSI_PROPERTY_FS_DEPTH_LAYOUT
,
278 TGSI_PROPERTY_VS_PROHIBIT_UCPS
,
279 TGSI_PROPERTY_GS_INVOCATIONS
,
280 TGSI_PROPERTY_VS_WINDOW_SPACE_POSITION
,
281 TGSI_PROPERTY_TCS_VERTICES_OUT
,
282 TGSI_PROPERTY_TES_PRIM_MODE
,
283 TGSI_PROPERTY_TES_SPACING
,
284 TGSI_PROPERTY_TES_VERTEX_ORDER_CW
,
285 TGSI_PROPERTY_TES_POINT_MODE
,
286 TGSI_PROPERTY_NUM_CLIPDIST_ENABLED
,
287 TGSI_PROPERTY_NUM_CULLDIST_ENABLED
,
288 TGSI_PROPERTY_FS_EARLY_DEPTH_STENCIL
,
289 TGSI_PROPERTY_NEXT_SHADER
,
290 TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
,
291 TGSI_PROPERTY_CS_FIXED_BLOCK_HEIGHT
,
292 TGSI_PROPERTY_CS_FIXED_BLOCK_DEPTH
,
296 struct tgsi_property
{
297 unsigned Type
: 4; /**< TGSI_TOKEN_TYPE_PROPERTY */
298 unsigned NrTokens
: 8; /**< UINT */
299 unsigned PropertyName
: 8; /**< one of TGSI_PROPERTY */
300 unsigned Padding
: 12;
303 enum tgsi_fs_coord_origin
{
304 TGSI_FS_COORD_ORIGIN_UPPER_LEFT
,
305 TGSI_FS_COORD_ORIGIN_LOWER_LEFT
,
308 enum tgsi_fs_coord_pixcenter
{
309 TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER
,
310 TGSI_FS_COORD_PIXEL_CENTER_INTEGER
,
313 enum tgsi_fs_depth_layout
{
314 TGSI_FS_DEPTH_LAYOUT_NONE
,
315 TGSI_FS_DEPTH_LAYOUT_ANY
,
316 TGSI_FS_DEPTH_LAYOUT_GREATER
,
317 TGSI_FS_DEPTH_LAYOUT_LESS
,
318 TGSI_FS_DEPTH_LAYOUT_UNCHANGED
,
321 struct tgsi_property_data
{
327 * For more information on semantics of opcodes and
328 * which APIs are known to use which opcodes, see
329 * gallium/docs/source/tgsi.rst
331 #define TGSI_OPCODE_ARL 0
332 #define TGSI_OPCODE_MOV 1
333 #define TGSI_OPCODE_LIT 2
334 #define TGSI_OPCODE_RCP 3
335 #define TGSI_OPCODE_RSQ 4
336 #define TGSI_OPCODE_EXP 5
337 #define TGSI_OPCODE_LOG 6
338 #define TGSI_OPCODE_MUL 7
339 #define TGSI_OPCODE_ADD 8
340 #define TGSI_OPCODE_DP3 9
341 #define TGSI_OPCODE_DP4 10
342 #define TGSI_OPCODE_DST 11
343 #define TGSI_OPCODE_MIN 12
344 #define TGSI_OPCODE_MAX 13
345 #define TGSI_OPCODE_SLT 14
346 #define TGSI_OPCODE_SGE 15
347 #define TGSI_OPCODE_MAD 16
348 #define TGSI_OPCODE_SUB 17
349 #define TGSI_OPCODE_LRP 18
350 #define TGSI_OPCODE_FMA 19
351 #define TGSI_OPCODE_SQRT 20
352 #define TGSI_OPCODE_DP2A 21
353 #define TGSI_OPCODE_F2U64 22
354 #define TGSI_OPCODE_F2I64 23
355 #define TGSI_OPCODE_FRC 24
356 #define TGSI_OPCODE_CLAMP 25
357 #define TGSI_OPCODE_FLR 26
358 #define TGSI_OPCODE_ROUND 27
359 #define TGSI_OPCODE_EX2 28
360 #define TGSI_OPCODE_LG2 29
361 #define TGSI_OPCODE_POW 30
362 #define TGSI_OPCODE_XPD 31
363 #define TGSI_OPCODE_U2I64 32
365 #define TGSI_OPCODE_I2I64 34
366 #define TGSI_OPCODE_DPH 35
367 #define TGSI_OPCODE_COS 36
368 #define TGSI_OPCODE_DDX 37
369 #define TGSI_OPCODE_DDY 38
370 #define TGSI_OPCODE_KILL 39 /* unconditional */
371 #define TGSI_OPCODE_PK2H 40
372 #define TGSI_OPCODE_PK2US 41
373 #define TGSI_OPCODE_PK4B 42
374 #define TGSI_OPCODE_PK4UB 43
375 #define TGSI_OPCODE_D2U64 44
376 #define TGSI_OPCODE_SEQ 45
377 #define TGSI_OPCODE_D2I64 46
378 #define TGSI_OPCODE_SGT 47
379 #define TGSI_OPCODE_SIN 48
380 #define TGSI_OPCODE_SLE 49
381 #define TGSI_OPCODE_SNE 50
382 #define TGSI_OPCODE_U642D 51
383 #define TGSI_OPCODE_TEX 52
384 #define TGSI_OPCODE_TXD 53
385 #define TGSI_OPCODE_TXP 54
386 #define TGSI_OPCODE_UP2H 55
387 #define TGSI_OPCODE_UP2US 56
388 #define TGSI_OPCODE_UP4B 57
389 #define TGSI_OPCODE_UP4UB 58
390 #define TGSI_OPCODE_U642F 59
391 #define TGSI_OPCODE_I642F 60
392 #define TGSI_OPCODE_ARR 61
393 #define TGSI_OPCODE_I642D 62
394 #define TGSI_OPCODE_CAL 63
395 #define TGSI_OPCODE_RET 64
396 #define TGSI_OPCODE_SSG 65 /* SGN */
397 #define TGSI_OPCODE_CMP 66
398 #define TGSI_OPCODE_SCS 67
399 #define TGSI_OPCODE_TXB 68
401 #define TGSI_OPCODE_DIV 70
402 #define TGSI_OPCODE_DP2 71
403 #define TGSI_OPCODE_TXL 72
404 #define TGSI_OPCODE_BRK 73
405 #define TGSI_OPCODE_IF 74
406 #define TGSI_OPCODE_UIF 75
408 #define TGSI_OPCODE_ELSE 77
409 #define TGSI_OPCODE_ENDIF 78
411 #define TGSI_OPCODE_DDX_FINE 79
412 #define TGSI_OPCODE_DDY_FINE 80
414 #define TGSI_OPCODE_PUSHA 81
415 #define TGSI_OPCODE_POPA 82
416 #define TGSI_OPCODE_CEIL 83
417 #define TGSI_OPCODE_I2F 84
418 #define TGSI_OPCODE_NOT 85
419 #define TGSI_OPCODE_TRUNC 86
420 #define TGSI_OPCODE_SHL 87
422 #define TGSI_OPCODE_AND 89
423 #define TGSI_OPCODE_OR 90
424 #define TGSI_OPCODE_MOD 91
425 #define TGSI_OPCODE_XOR 92
426 #define TGSI_OPCODE_SAD 93
427 #define TGSI_OPCODE_TXF 94
428 #define TGSI_OPCODE_TXQ 95
429 #define TGSI_OPCODE_CONT 96
430 #define TGSI_OPCODE_EMIT 97
431 #define TGSI_OPCODE_ENDPRIM 98
432 #define TGSI_OPCODE_BGNLOOP 99
433 #define TGSI_OPCODE_BGNSUB 100
434 #define TGSI_OPCODE_ENDLOOP 101
435 #define TGSI_OPCODE_ENDSUB 102
436 #define TGSI_OPCODE_TXQ_LZ 103 /* TXQ for mipmap level 0 */
437 #define TGSI_OPCODE_TXQS 104
438 #define TGSI_OPCODE_RESQ 105
440 #define TGSI_OPCODE_NOP 107
442 #define TGSI_OPCODE_FSEQ 108
443 #define TGSI_OPCODE_FSGE 109
444 #define TGSI_OPCODE_FSLT 110
445 #define TGSI_OPCODE_FSNE 111
447 #define TGSI_OPCODE_MEMBAR 112
448 #define TGSI_OPCODE_CALLNZ 113
450 #define TGSI_OPCODE_BREAKC 115
451 #define TGSI_OPCODE_KILL_IF 116 /* conditional kill */
452 #define TGSI_OPCODE_END 117 /* aka HALT */
453 #define TGSI_OPCODE_DFMA 118
454 #define TGSI_OPCODE_F2I 119
455 #define TGSI_OPCODE_IDIV 120
456 #define TGSI_OPCODE_IMAX 121
457 #define TGSI_OPCODE_IMIN 122
458 #define TGSI_OPCODE_INEG 123
459 #define TGSI_OPCODE_ISGE 124
460 #define TGSI_OPCODE_ISHR 125
461 #define TGSI_OPCODE_ISLT 126
462 #define TGSI_OPCODE_F2U 127
463 #define TGSI_OPCODE_U2F 128
464 #define TGSI_OPCODE_UADD 129
465 #define TGSI_OPCODE_UDIV 130
466 #define TGSI_OPCODE_UMAD 131
467 #define TGSI_OPCODE_UMAX 132
468 #define TGSI_OPCODE_UMIN 133
469 #define TGSI_OPCODE_UMOD 134
470 #define TGSI_OPCODE_UMUL 135
471 #define TGSI_OPCODE_USEQ 136
472 #define TGSI_OPCODE_USGE 137
473 #define TGSI_OPCODE_USHR 138
474 #define TGSI_OPCODE_USLT 139
475 #define TGSI_OPCODE_USNE 140
476 #define TGSI_OPCODE_SWITCH 141
477 #define TGSI_OPCODE_CASE 142
478 #define TGSI_OPCODE_DEFAULT 143
479 #define TGSI_OPCODE_ENDSWITCH 144
481 /* resource related opcodes */
482 #define TGSI_OPCODE_SAMPLE 145
483 #define TGSI_OPCODE_SAMPLE_I 146
484 #define TGSI_OPCODE_SAMPLE_I_MS 147
485 #define TGSI_OPCODE_SAMPLE_B 148
486 #define TGSI_OPCODE_SAMPLE_C 149
487 #define TGSI_OPCODE_SAMPLE_C_LZ 150
488 #define TGSI_OPCODE_SAMPLE_D 151
489 #define TGSI_OPCODE_SAMPLE_L 152
490 #define TGSI_OPCODE_GATHER4 153
491 #define TGSI_OPCODE_SVIEWINFO 154
492 #define TGSI_OPCODE_SAMPLE_POS 155
493 #define TGSI_OPCODE_SAMPLE_INFO 156
495 #define TGSI_OPCODE_UARL 157
496 #define TGSI_OPCODE_UCMP 158
497 #define TGSI_OPCODE_IABS 159
498 #define TGSI_OPCODE_ISSG 160
500 #define TGSI_OPCODE_LOAD 161
501 #define TGSI_OPCODE_STORE 162
503 #define TGSI_OPCODE_MFENCE 163
504 #define TGSI_OPCODE_LFENCE 164
505 #define TGSI_OPCODE_SFENCE 165
506 #define TGSI_OPCODE_BARRIER 166
508 #define TGSI_OPCODE_ATOMUADD 167
509 #define TGSI_OPCODE_ATOMXCHG 168
510 #define TGSI_OPCODE_ATOMCAS 169
511 #define TGSI_OPCODE_ATOMAND 170
512 #define TGSI_OPCODE_ATOMOR 171
513 #define TGSI_OPCODE_ATOMXOR 172
514 #define TGSI_OPCODE_ATOMUMIN 173
515 #define TGSI_OPCODE_ATOMUMAX 174
516 #define TGSI_OPCODE_ATOMIMIN 175
517 #define TGSI_OPCODE_ATOMIMAX 176
519 /* to be used for shadow cube map compares */
520 #define TGSI_OPCODE_TEX2 177
521 #define TGSI_OPCODE_TXB2 178
522 #define TGSI_OPCODE_TXL2 179
524 #define TGSI_OPCODE_IMUL_HI 180
525 #define TGSI_OPCODE_UMUL_HI 181
527 #define TGSI_OPCODE_TG4 182
529 #define TGSI_OPCODE_LODQ 183
531 #define TGSI_OPCODE_IBFE 184
532 #define TGSI_OPCODE_UBFE 185
533 #define TGSI_OPCODE_BFI 186
534 #define TGSI_OPCODE_BREV 187
535 #define TGSI_OPCODE_POPC 188
536 #define TGSI_OPCODE_LSB 189
537 #define TGSI_OPCODE_IMSB 190
538 #define TGSI_OPCODE_UMSB 191
540 #define TGSI_OPCODE_INTERP_CENTROID 192
541 #define TGSI_OPCODE_INTERP_SAMPLE 193
542 #define TGSI_OPCODE_INTERP_OFFSET 194
544 /* sm5 marked opcodes are supported in D3D11 optionally - also DMOV, DMOVC */
545 #define TGSI_OPCODE_F2D 195 /* SM5 */
546 #define TGSI_OPCODE_D2F 196
547 #define TGSI_OPCODE_DABS 197
548 #define TGSI_OPCODE_DNEG 198 /* SM5 */
549 #define TGSI_OPCODE_DADD 199 /* SM5 */
550 #define TGSI_OPCODE_DMUL 200 /* SM5 */
551 #define TGSI_OPCODE_DMAX 201 /* SM5 */
552 #define TGSI_OPCODE_DMIN 202 /* SM5 */
553 #define TGSI_OPCODE_DSLT 203 /* SM5 */
554 #define TGSI_OPCODE_DSGE 204 /* SM5 */
555 #define TGSI_OPCODE_DSEQ 205 /* SM5 */
556 #define TGSI_OPCODE_DSNE 206 /* SM5 */
557 #define TGSI_OPCODE_DRCP 207 /* eg, cayman */
558 #define TGSI_OPCODE_DSQRT 208 /* eg, cayman also has DRSQ */
559 #define TGSI_OPCODE_DMAD 209
560 #define TGSI_OPCODE_DFRAC 210 /* eg, cayman */
561 #define TGSI_OPCODE_DLDEXP 211 /* eg, cayman */
562 #define TGSI_OPCODE_DFRACEXP 212 /* eg, cayman */
563 #define TGSI_OPCODE_D2I 213
564 #define TGSI_OPCODE_I2D 214
565 #define TGSI_OPCODE_D2U 215
566 #define TGSI_OPCODE_U2D 216
567 #define TGSI_OPCODE_DRSQ 217 /* eg, cayman also has DRSQ */
568 #define TGSI_OPCODE_DTRUNC 218 /* nvc0 */
569 #define TGSI_OPCODE_DCEIL 219 /* nvc0 */
570 #define TGSI_OPCODE_DFLR 220 /* nvc0 */
571 #define TGSI_OPCODE_DROUND 221 /* nvc0 */
572 #define TGSI_OPCODE_DSSG 222
574 #define TGSI_OPCODE_VOTE_ANY 223
575 #define TGSI_OPCODE_VOTE_ALL 224
576 #define TGSI_OPCODE_VOTE_EQ 225
578 #define TGSI_OPCODE_U64SEQ 226
579 #define TGSI_OPCODE_U64SNE 227
580 #define TGSI_OPCODE_I64SLT 228
581 #define TGSI_OPCODE_U64SLT 229
582 #define TGSI_OPCODE_I64SGE 230
583 #define TGSI_OPCODE_U64SGE 231
585 #define TGSI_OPCODE_I64MIN 232
586 #define TGSI_OPCODE_U64MIN 233
587 #define TGSI_OPCODE_I64MAX 234
588 #define TGSI_OPCODE_U64MAX 235
590 #define TGSI_OPCODE_I64ABS 236
591 #define TGSI_OPCODE_I64SSG 237
592 #define TGSI_OPCODE_I64NEG 238
594 #define TGSI_OPCODE_U64ADD 239
595 #define TGSI_OPCODE_U64MUL 240
596 #define TGSI_OPCODE_U64SHL 241
597 #define TGSI_OPCODE_I64SHR 242
598 #define TGSI_OPCODE_U64SHR 243
600 #define TGSI_OPCODE_I64DIV 244
601 #define TGSI_OPCODE_U64DIV 245
602 #define TGSI_OPCODE_I64MOD 246
603 #define TGSI_OPCODE_U64MOD 247
604 #define TGSI_OPCODE_LAST 248
607 * Opcode is the operation code to execute. A given operation defines the
608 * semantics how the source registers (if any) are interpreted and what is
609 * written to the destination registers (if any) as a result of execution.
611 * NumDstRegs and NumSrcRegs is the number of destination and source registers,
612 * respectively. For a given operation code, those numbers are fixed and are
613 * present here only for convenience.
615 * If Predicate is TRUE, tgsi_instruction_predicate token immediately follows.
617 * Saturate controls how are final results in destination registers modified.
620 struct tgsi_instruction
622 unsigned Type
: 4; /* TGSI_TOKEN_TYPE_INSTRUCTION */
623 unsigned NrTokens
: 8; /* UINT */
624 unsigned Opcode
: 8; /* TGSI_OPCODE_ */
625 unsigned Saturate
: 1; /* BOOL */
626 unsigned NumDstRegs
: 2; /* UINT */
627 unsigned NumSrcRegs
: 4; /* UINT */
628 unsigned Predicate
: 1; /* BOOL */
630 unsigned Texture
: 1;
632 unsigned Padding
: 1;
636 * If tgsi_instruction::Label is TRUE, tgsi_instruction_label follows.
638 * If tgsi_instruction::Texture is TRUE, tgsi_instruction_texture follows.
639 * if texture instruction has a number of offsets,
640 * then tgsi_instruction::Texture::NumOffset of tgsi_texture_offset follow.
642 * Then, tgsi_instruction::NumDstRegs of tgsi_dst_register follow.
644 * Then, tgsi_instruction::NumSrcRegs of tgsi_src_register follow.
646 * tgsi_instruction::NrTokens contains the total number of words that make the
647 * instruction, including the instruction word.
657 struct tgsi_instruction_label
659 unsigned Label
: 24; /* UINT */
660 unsigned Padding
: 8;
663 enum tgsi_texture_type
{
670 TGSI_TEXTURE_SHADOW1D
,
671 TGSI_TEXTURE_SHADOW2D
,
672 TGSI_TEXTURE_SHADOWRECT
,
673 TGSI_TEXTURE_1D_ARRAY
,
674 TGSI_TEXTURE_2D_ARRAY
,
675 TGSI_TEXTURE_SHADOW1D_ARRAY
,
676 TGSI_TEXTURE_SHADOW2D_ARRAY
,
677 TGSI_TEXTURE_SHADOWCUBE
,
678 TGSI_TEXTURE_2D_MSAA
,
679 TGSI_TEXTURE_2D_ARRAY_MSAA
,
680 TGSI_TEXTURE_CUBE_ARRAY
,
681 TGSI_TEXTURE_SHADOWCUBE_ARRAY
,
682 TGSI_TEXTURE_UNKNOWN
,
686 struct tgsi_instruction_texture
688 unsigned Texture
: 8; /* TGSI_TEXTURE_ */
689 unsigned NumOffsets
: 4;
690 unsigned Padding
: 20;
693 /* for texture offsets in GLSL and DirectX.
694 * Generally these always come from TGSI_FILE_IMMEDIATE,
695 * however DX11 appears to have the capability to do
696 * non-constant texture offsets.
698 struct tgsi_texture_offset
701 unsigned File
: 4; /**< one of TGSI_FILE_x */
702 unsigned SwizzleX
: 2; /* TGSI_SWIZZLE_x */
703 unsigned SwizzleY
: 2; /* TGSI_SWIZZLE_x */
704 unsigned SwizzleZ
: 2; /* TGSI_SWIZZLE_x */
705 unsigned Padding
: 6;
709 * For SM3, the following constraint applies.
710 * - Swizzle is either set to identity or replicate.
712 struct tgsi_instruction_predicate
714 int Index
: 16; /* SINT */
715 unsigned SwizzleX
: 2; /* TGSI_SWIZZLE_x */
716 unsigned SwizzleY
: 2; /* TGSI_SWIZZLE_x */
717 unsigned SwizzleZ
: 2; /* TGSI_SWIZZLE_x */
718 unsigned SwizzleW
: 2; /* TGSI_SWIZZLE_x */
719 unsigned Negate
: 1; /* BOOL */
720 unsigned Padding
: 7;
724 * File specifies the register array to access.
726 * Index specifies the element number of a register in the register file.
728 * If Indirect is TRUE, Index should be offset by the X component of the indirect
729 * register that follows. The register can be now fetched into local storage
730 * for further processing.
732 * If Negate is TRUE, all components of the fetched register are negated.
734 * The fetched register components are swizzled according to SwizzleX, SwizzleY,
735 * SwizzleZ and SwizzleW.
739 struct tgsi_src_register
741 unsigned File
: 4; /* TGSI_FILE_ */
742 unsigned Indirect
: 1; /* BOOL */
743 unsigned Dimension
: 1; /* BOOL */
744 int Index
: 16; /* SINT */
745 unsigned SwizzleX
: 2; /* TGSI_SWIZZLE_ */
746 unsigned SwizzleY
: 2; /* TGSI_SWIZZLE_ */
747 unsigned SwizzleZ
: 2; /* TGSI_SWIZZLE_ */
748 unsigned SwizzleW
: 2; /* TGSI_SWIZZLE_ */
749 unsigned Absolute
: 1; /* BOOL */
750 unsigned Negate
: 1; /* BOOL */
754 * If tgsi_src_register::Indirect is TRUE, tgsi_ind_register follows.
756 * File, Index and Swizzle are handled the same as in tgsi_src_register.
758 * If ArrayID is zero the whole register file might be indirectly addressed,
759 * if not only the Declaration with this ArrayID is accessed by this operand.
763 struct tgsi_ind_register
765 unsigned File
: 4; /* TGSI_FILE_ */
766 int Index
: 16; /* SINT */
767 unsigned Swizzle
: 2; /* TGSI_SWIZZLE_ */
768 unsigned ArrayID
: 10; /* UINT */
772 * If tgsi_src_register::Dimension is TRUE, tgsi_dimension follows.
775 struct tgsi_dimension
777 unsigned Indirect
: 1; /* BOOL */
778 unsigned Dimension
: 1; /* BOOL */
779 unsigned Padding
: 14;
780 int Index
: 16; /* SINT */
783 struct tgsi_dst_register
785 unsigned File
: 4; /* TGSI_FILE_ */
786 unsigned WriteMask
: 4; /* TGSI_WRITEMASK_ */
787 unsigned Indirect
: 1; /* BOOL */
788 unsigned Dimension
: 1; /* BOOL */
789 int Index
: 16; /* SINT */
790 unsigned Padding
: 6;
793 #define TGSI_MEMORY_COHERENT (1 << 0)
794 #define TGSI_MEMORY_RESTRICT (1 << 1)
795 #define TGSI_MEMORY_VOLATILE (1 << 2)
798 * Specifies the type of memory access to do for the LOAD/STORE instruction.
800 struct tgsi_instruction_memory
802 unsigned Qualifier
: 3; /* TGSI_MEMORY_ */
803 unsigned Texture
: 8; /* only for images: TGSI_TEXTURE_ */
804 unsigned Format
: 10; /* only for images: PIPE_FORMAT_ */
805 unsigned Padding
: 11;
808 #define TGSI_MEMBAR_SHADER_BUFFER (1 << 0)
809 #define TGSI_MEMBAR_ATOMIC_BUFFER (1 << 1)
810 #define TGSI_MEMBAR_SHADER_IMAGE (1 << 2)
811 #define TGSI_MEMBAR_SHARED (1 << 3)
812 #define TGSI_MEMBAR_THREAD_GROUP (1 << 4)
818 #endif /* P_SHADER_TOKENS_H */