gallium: change pipe_sampler_view::first_element/last_element -> offset/size
[mesa.git] / src / gallium / include / pipe / p_state.h
1 /**************************************************************************
2 *
3 * Copyright 2007 VMware, Inc.
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27
28
29 /**
30 * @file
31 *
32 * Abstract graphics pipe state objects.
33 *
34 * Basic notes:
35 * 1. Want compact representations, so we use bitfields.
36 * 2. Put bitfields before other (GLfloat) fields.
37 */
38
39
40 #ifndef PIPE_STATE_H
41 #define PIPE_STATE_H
42
43 #include "p_compiler.h"
44 #include "p_defines.h"
45 #include "p_format.h"
46
47
48 #ifdef __cplusplus
49 extern "C" {
50 #endif
51
52
53 /**
54 * Implementation limits
55 */
56 #define PIPE_MAX_ATTRIBS 32
57 #define PIPE_MAX_CLIP_PLANES 8
58 #define PIPE_MAX_COLOR_BUFS 8
59 #define PIPE_MAX_CONSTANT_BUFFERS 32
60 #define PIPE_MAX_SAMPLERS 32
61 #define PIPE_MAX_SHADER_INPUTS 80 /* 32 GENERIC + 32 PATCH + 16 others */
62 #define PIPE_MAX_SHADER_OUTPUTS 80 /* 32 GENERIC + 32 PATCH + 16 others */
63 #define PIPE_MAX_SHADER_SAMPLER_VIEWS 32
64 #define PIPE_MAX_SHADER_BUFFERS 32
65 #define PIPE_MAX_SHADER_IMAGES 32
66 #define PIPE_MAX_TEXTURE_LEVELS 16
67 #define PIPE_MAX_SO_BUFFERS 4
68 #define PIPE_MAX_SO_OUTPUTS 64
69 #define PIPE_MAX_VIEWPORTS 16
70 #define PIPE_MAX_CLIP_OR_CULL_DISTANCE_COUNT 8
71 #define PIPE_MAX_CLIP_OR_CULL_DISTANCE_ELEMENT_COUNT 2
72 #define PIPE_MAX_WINDOW_RECTANGLES 8
73
74
75 struct pipe_reference
76 {
77 int32_t count; /* atomic */
78 };
79
80
81
82 /**
83 * Primitive (point/line/tri) rasterization info
84 */
85 struct pipe_rasterizer_state
86 {
87 unsigned flatshade:1;
88 unsigned light_twoside:1;
89 unsigned clamp_vertex_color:1;
90 unsigned clamp_fragment_color:1;
91 unsigned front_ccw:1;
92 unsigned cull_face:2; /**< PIPE_FACE_x */
93 unsigned fill_front:2; /**< PIPE_POLYGON_MODE_x */
94 unsigned fill_back:2; /**< PIPE_POLYGON_MODE_x */
95 unsigned offset_point:1;
96 unsigned offset_line:1;
97 unsigned offset_tri:1;
98 unsigned scissor:1;
99 unsigned poly_smooth:1;
100 unsigned poly_stipple_enable:1;
101 unsigned point_smooth:1;
102 unsigned sprite_coord_mode:1; /**< PIPE_SPRITE_COORD_ */
103 unsigned point_quad_rasterization:1; /** points rasterized as quads or points */
104 unsigned point_tri_clip:1; /** large points clipped as tris or points */
105 unsigned point_size_per_vertex:1; /**< size computed in vertex shader */
106 unsigned multisample:1; /* XXX maybe more ms state in future */
107 unsigned force_persample_interp:1;
108 unsigned line_smooth:1;
109 unsigned line_stipple_enable:1;
110 unsigned line_last_pixel:1;
111
112 /**
113 * Use the first vertex of a primitive as the provoking vertex for
114 * flat shading.
115 */
116 unsigned flatshade_first:1;
117
118 unsigned half_pixel_center:1;
119 unsigned bottom_edge_rule:1;
120
121 /**
122 * When true, rasterization is disabled and no pixels are written.
123 * This only makes sense with the Stream Out functionality.
124 */
125 unsigned rasterizer_discard:1;
126
127 /**
128 * When false, depth clipping is disabled and the depth value will be
129 * clamped later at the per-pixel level before depth testing.
130 * This depends on PIPE_CAP_DEPTH_CLIP_DISABLE.
131 */
132 unsigned depth_clip:1;
133
134 /**
135 * When true clip space in the z axis goes from [0..1] (D3D). When false
136 * [-1, 1] (GL).
137 *
138 * NOTE: D3D will always use depth clamping.
139 */
140 unsigned clip_halfz:1;
141
142 /**
143 * When true do not scale offset_units and use same rules for unorm and
144 * float depth buffers (D3D9). When false use GL/D3D1X behaviour.
145 * This depends on PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED.
146 */
147 unsigned offset_units_unscaled:1;
148
149 /**
150 * Enable bits for clipping half-spaces.
151 * This applies to both user clip planes and shader clip distances.
152 * Note that if the bound shader exports any clip distances, these
153 * replace all user clip planes, and clip half-spaces enabled here
154 * but not written by the shader count as disabled.
155 */
156 unsigned clip_plane_enable:PIPE_MAX_CLIP_PLANES;
157
158 unsigned line_stipple_factor:8; /**< [1..256] actually */
159 unsigned line_stipple_pattern:16;
160
161 uint32_t sprite_coord_enable; /* referring to 32 TEXCOORD/GENERIC inputs */
162
163 float line_width;
164 float point_size; /**< used when no per-vertex size */
165 float offset_units;
166 float offset_scale;
167 float offset_clamp;
168 };
169
170
171 struct pipe_poly_stipple
172 {
173 unsigned stipple[32];
174 };
175
176
177 struct pipe_viewport_state
178 {
179 float scale[3];
180 float translate[3];
181 };
182
183
184 struct pipe_scissor_state
185 {
186 unsigned minx:16;
187 unsigned miny:16;
188 unsigned maxx:16;
189 unsigned maxy:16;
190 };
191
192
193 struct pipe_clip_state
194 {
195 float ucp[PIPE_MAX_CLIP_PLANES][4];
196 };
197
198
199 /**
200 * Stream output for vertex transform feedback.
201 */
202 struct pipe_stream_output_info
203 {
204 unsigned num_outputs;
205 /** stride for an entire vertex for each buffer in dwords */
206 unsigned stride[PIPE_MAX_SO_BUFFERS];
207
208 /**
209 * Array of stream outputs, in the order they are to be written in.
210 * Selected components are tightly packed into the output buffer.
211 */
212 struct {
213 unsigned register_index:8; /**< 0 to PIPE_MAX_SHADER_OUTPUTS */
214 unsigned start_component:2; /** 0 to 3 */
215 unsigned num_components:3; /** 1 to 4 */
216 unsigned output_buffer:3; /**< 0 to PIPE_MAX_SO_BUFFERS */
217 unsigned dst_offset:16; /**< offset into the buffer in dwords */
218 unsigned stream:2; /**< 0 to 3 */
219 } output[PIPE_MAX_SO_OUTPUTS];
220 };
221
222 /**
223 * The 'type' parameter identifies whether the shader state contains TGSI
224 * tokens, etc. If the driver returns 'PIPE_SHADER_IR_TGSI' for the
225 * 'PIPE_SHADER_CAP_PREFERRED_IR' shader param, the ir will *always* be
226 * 'PIPE_SHADER_IR_TGSI' and the tokens ptr will be valid. If the driver
227 * requests a different 'pipe_shader_ir' type, then it must check the 'type'
228 * enum to see if it is getting TGSI tokens or its preferred IR.
229 *
230 * TODO pipe_compute_state should probably get similar treatment to handle
231 * multiple IR's in a cleaner way..
232 *
233 * NOTE: since it is expected that the consumer will want to perform
234 * additional passes on the nir_shader, the driver takes ownership of
235 * the nir_shader. If state trackers need to hang on to the IR (for
236 * example, variant management), it should use nir_shader_clone().
237 */
238 struct pipe_shader_state
239 {
240 enum pipe_shader_ir type;
241 /* TODO move tokens into union. */
242 const struct tgsi_token *tokens;
243 union {
244 void *llvm;
245 void *native;
246 void *nir;
247 } ir;
248 struct pipe_stream_output_info stream_output;
249 };
250
251 static inline void
252 pipe_shader_state_from_tgsi(struct pipe_shader_state *state,
253 const struct tgsi_token *tokens)
254 {
255 state->type = PIPE_SHADER_IR_TGSI;
256 state->tokens = tokens;
257 memset(&state->stream_output, 0, sizeof(state->stream_output));
258 }
259
260 struct pipe_depth_state
261 {
262 unsigned enabled:1; /**< depth test enabled? */
263 unsigned writemask:1; /**< allow depth buffer writes? */
264 unsigned func:3; /**< depth test func (PIPE_FUNC_x) */
265 unsigned bounds_test:1; /**< depth bounds test enabled? */
266 float bounds_min; /**< minimum depth bound */
267 float bounds_max; /**< maximum depth bound */
268 };
269
270
271 struct pipe_stencil_state
272 {
273 unsigned enabled:1; /**< stencil[0]: stencil enabled, stencil[1]: two-side enabled */
274 unsigned func:3; /**< PIPE_FUNC_x */
275 unsigned fail_op:3; /**< PIPE_STENCIL_OP_x */
276 unsigned zpass_op:3; /**< PIPE_STENCIL_OP_x */
277 unsigned zfail_op:3; /**< PIPE_STENCIL_OP_x */
278 unsigned valuemask:8;
279 unsigned writemask:8;
280 };
281
282
283 struct pipe_alpha_state
284 {
285 unsigned enabled:1;
286 unsigned func:3; /**< PIPE_FUNC_x */
287 float ref_value; /**< reference value */
288 };
289
290
291 struct pipe_depth_stencil_alpha_state
292 {
293 struct pipe_depth_state depth;
294 struct pipe_stencil_state stencil[2]; /**< [0] = front, [1] = back */
295 struct pipe_alpha_state alpha;
296 };
297
298
299 struct pipe_rt_blend_state
300 {
301 unsigned blend_enable:1;
302
303 unsigned rgb_func:3; /**< PIPE_BLEND_x */
304 unsigned rgb_src_factor:5; /**< PIPE_BLENDFACTOR_x */
305 unsigned rgb_dst_factor:5; /**< PIPE_BLENDFACTOR_x */
306
307 unsigned alpha_func:3; /**< PIPE_BLEND_x */
308 unsigned alpha_src_factor:5; /**< PIPE_BLENDFACTOR_x */
309 unsigned alpha_dst_factor:5; /**< PIPE_BLENDFACTOR_x */
310
311 unsigned colormask:4; /**< bitmask of PIPE_MASK_R/G/B/A */
312 };
313
314
315 struct pipe_blend_state
316 {
317 unsigned independent_blend_enable:1;
318 unsigned logicop_enable:1;
319 unsigned logicop_func:4; /**< PIPE_LOGICOP_x */
320 unsigned dither:1;
321 unsigned alpha_to_coverage:1;
322 unsigned alpha_to_one:1;
323 struct pipe_rt_blend_state rt[PIPE_MAX_COLOR_BUFS];
324 };
325
326
327 struct pipe_blend_color
328 {
329 float color[4];
330 };
331
332
333 struct pipe_stencil_ref
334 {
335 ubyte ref_value[2];
336 };
337
338
339 /**
340 * Note that pipe_surfaces are "texture views for rendering"
341 * and so in the case of ARB_framebuffer_no_attachment there
342 * is no pipe_surface state available such that we may
343 * extract the number of samples and layers.
344 */
345 struct pipe_framebuffer_state
346 {
347 unsigned width, height;
348 unsigned samples; /**< Number of samples in a no-attachment framebuffer */
349 unsigned layers; /**< Number of layers in a no-attachment framebuffer */
350
351 /** multiple color buffers for multiple render targets */
352 unsigned nr_cbufs;
353 struct pipe_surface *cbufs[PIPE_MAX_COLOR_BUFS];
354
355 struct pipe_surface *zsbuf; /**< Z/stencil buffer */
356 };
357
358
359 /**
360 * Texture sampler state.
361 */
362 struct pipe_sampler_state
363 {
364 unsigned wrap_s:3; /**< PIPE_TEX_WRAP_x */
365 unsigned wrap_t:3; /**< PIPE_TEX_WRAP_x */
366 unsigned wrap_r:3; /**< PIPE_TEX_WRAP_x */
367 unsigned min_img_filter:2; /**< PIPE_TEX_FILTER_x */
368 unsigned min_mip_filter:2; /**< PIPE_TEX_MIPFILTER_x */
369 unsigned mag_img_filter:2; /**< PIPE_TEX_FILTER_x */
370 unsigned compare_mode:1; /**< PIPE_TEX_COMPARE_x */
371 unsigned compare_func:3; /**< PIPE_FUNC_x */
372 unsigned normalized_coords:1; /**< Are coords normalized to [0,1]? */
373 unsigned max_anisotropy:6;
374 unsigned seamless_cube_map:1;
375 float lod_bias; /**< LOD/lambda bias */
376 float min_lod, max_lod; /**< LOD clamp range, after bias */
377 union pipe_color_union border_color;
378 };
379
380 union pipe_surface_desc {
381 struct {
382 unsigned level;
383 unsigned first_layer:16;
384 unsigned last_layer:16;
385 } tex;
386 struct {
387 unsigned first_element;
388 unsigned last_element;
389 } buf;
390 };
391
392 /**
393 * A view into a texture that can be bound to a color render target /
394 * depth stencil attachment point.
395 */
396 struct pipe_surface
397 {
398 struct pipe_reference reference;
399 struct pipe_resource *texture; /**< resource into which this is a view */
400 struct pipe_context *context; /**< context this surface belongs to */
401 enum pipe_format format;
402
403 /* XXX width/height should be removed */
404 unsigned width; /**< logical width in pixels */
405 unsigned height; /**< logical height in pixels */
406
407 unsigned writable:1; /**< writable shader resource */
408
409 union pipe_surface_desc u;
410 };
411
412
413 /**
414 * A view into a texture that can be bound to a shader stage.
415 */
416 struct pipe_sampler_view
417 {
418 struct pipe_reference reference;
419 enum pipe_texture_target target; /**< PIPE_TEXTURE_x */
420 enum pipe_format format; /**< typed PIPE_FORMAT_x */
421 struct pipe_resource *texture; /**< texture into which this is a view */
422 struct pipe_context *context; /**< context this view belongs to */
423 union {
424 struct {
425 unsigned first_layer:16; /**< first layer to use for array textures */
426 unsigned last_layer:16; /**< last layer to use for array textures */
427 unsigned first_level:8; /**< first mipmap level to use */
428 unsigned last_level:8; /**< last mipmap level to use */
429 } tex;
430 struct {
431 unsigned offset; /**< offset in bytes */
432 unsigned size; /**< size of the readable sub-range in bytes */
433 } buf;
434 } u;
435 unsigned swizzle_r:3; /**< PIPE_SWIZZLE_x for red component */
436 unsigned swizzle_g:3; /**< PIPE_SWIZZLE_x for green component */
437 unsigned swizzle_b:3; /**< PIPE_SWIZZLE_x for blue component */
438 unsigned swizzle_a:3; /**< PIPE_SWIZZLE_x for alpha component */
439 };
440
441
442 /**
443 * A description of a buffer or texture image that can be bound to a shader
444 * stage.
445 */
446 struct pipe_image_view
447 {
448 struct pipe_resource *resource; /**< resource into which this is a view */
449 enum pipe_format format; /**< typed PIPE_FORMAT_x */
450 unsigned access; /**< PIPE_IMAGE_ACCESS_x */
451
452 union {
453 struct {
454 unsigned first_layer:16; /**< first layer to use for array textures */
455 unsigned last_layer:16; /**< last layer to use for array textures */
456 unsigned level:8; /**< mipmap level to use */
457 } tex;
458 struct {
459 unsigned first_element;
460 unsigned last_element;
461 } buf;
462 } u;
463 };
464
465
466 /**
467 * Subregion of 1D/2D/3D image resource.
468 */
469 struct pipe_box
470 {
471 int x;
472 int y;
473 int z;
474 int width;
475 int height;
476 int depth;
477 };
478
479
480 /**
481 * A memory object/resource such as a vertex buffer or texture.
482 */
483 struct pipe_resource
484 {
485 struct pipe_reference reference;
486 struct pipe_screen *screen; /**< screen that this texture belongs to */
487 enum pipe_texture_target target; /**< PIPE_TEXTURE_x */
488 enum pipe_format format; /**< PIPE_FORMAT_x */
489
490 unsigned width0;
491 unsigned height0;
492 unsigned depth0;
493 unsigned array_size;
494
495 unsigned last_level:8; /**< Index of last mipmap level present/defined */
496 unsigned nr_samples:8; /**< for multisampled surfaces, nr of samples */
497 unsigned usage:8; /**< PIPE_USAGE_x (not a bitmask) */
498
499 unsigned bind; /**< bitmask of PIPE_BIND_x */
500 unsigned flags; /**< bitmask of PIPE_RESOURCE_FLAG_x */
501 };
502
503
504 /**
505 * Transfer object. For data transfer to/from a resource.
506 */
507 struct pipe_transfer
508 {
509 struct pipe_resource *resource; /**< resource to transfer to/from */
510 unsigned level; /**< texture mipmap level */
511 enum pipe_transfer_usage usage;
512 struct pipe_box box; /**< region of the resource to access */
513 unsigned stride; /**< row stride in bytes */
514 unsigned layer_stride; /**< image/layer stride in bytes */
515 };
516
517
518
519 /**
520 * A vertex buffer. Typically, all the vertex data/attributes for
521 * drawing something will be in one buffer. But it's also possible, for
522 * example, to put colors in one buffer and texcoords in another.
523 */
524 struct pipe_vertex_buffer
525 {
526 unsigned stride; /**< stride to same attrib in next vertex, in bytes */
527 unsigned buffer_offset; /**< offset to start of data in buffer, in bytes */
528 struct pipe_resource *buffer; /**< the actual buffer */
529 const void *user_buffer; /**< pointer to a user buffer if buffer == NULL */
530 };
531
532
533 /**
534 * A constant buffer. A subrange of an existing buffer can be set
535 * as a constant buffer.
536 */
537 struct pipe_constant_buffer
538 {
539 struct pipe_resource *buffer; /**< the actual buffer */
540 unsigned buffer_offset; /**< offset to start of data in buffer, in bytes */
541 unsigned buffer_size; /**< how much data can be read in shader */
542 const void *user_buffer; /**< pointer to a user buffer if buffer == NULL */
543 };
544
545
546 /**
547 * An untyped shader buffer supporting loads, stores, and atomics.
548 */
549 struct pipe_shader_buffer {
550 struct pipe_resource *buffer; /**< the actual buffer */
551 unsigned buffer_offset; /**< offset to start of data in buffer, in bytes */
552 unsigned buffer_size; /**< how much data can be read in shader */
553 };
554
555
556 /**
557 * A stream output target. The structure specifies the range vertices can
558 * be written to.
559 *
560 * In addition to that, the structure should internally maintain the offset
561 * into the buffer, which should be incremented everytime something is written
562 * (appended) to it. The internal offset is buffer_offset + how many bytes
563 * have been written. The internal offset can be stored on the device
564 * and the CPU actually doesn't have to query it.
565 *
566 * Note that the buffer_size variable is actually specifying the available
567 * space in the buffer, not the size of the attached buffer.
568 * In other words in majority of cases buffer_size would simply be
569 * 'buffer->width0 - buffer_offset', so buffer_size refers to the size
570 * of the buffer left, after accounting for buffer offset, for stream output
571 * to write to.
572 *
573 * Use PIPE_QUERY_SO_STATISTICS to know how many primitives have
574 * actually been written.
575 */
576 struct pipe_stream_output_target
577 {
578 struct pipe_reference reference;
579 struct pipe_resource *buffer; /**< the output buffer */
580 struct pipe_context *context; /**< context this SO target belongs to */
581
582 unsigned buffer_offset; /**< offset where data should be written, in bytes */
583 unsigned buffer_size; /**< how much data is allowed to be written */
584 };
585
586
587 /**
588 * Information to describe a vertex attribute (position, color, etc)
589 */
590 struct pipe_vertex_element
591 {
592 /** Offset of this attribute, in bytes, from the start of the vertex */
593 unsigned src_offset;
594
595 /** Instance data rate divisor. 0 means this is per-vertex data,
596 * n means per-instance data used for n consecutive instances (n > 0).
597 */
598 unsigned instance_divisor;
599
600 /** Which vertex_buffer (as given to pipe->set_vertex_buffer()) does
601 * this attribute live in?
602 */
603 unsigned vertex_buffer_index;
604
605 enum pipe_format src_format;
606 };
607
608
609 /**
610 * An index buffer. When an index buffer is bound, all indices to vertices
611 * will be looked up in the buffer.
612 */
613 struct pipe_index_buffer
614 {
615 unsigned index_size; /**< size of an index, in bytes */
616 unsigned offset; /**< offset to start of data in buffer, in bytes */
617 struct pipe_resource *buffer; /**< the actual buffer */
618 const void *user_buffer; /**< pointer to a user buffer if buffer == NULL */
619 };
620
621
622 /**
623 * Information to describe a draw_vbo call.
624 */
625 struct pipe_draw_info
626 {
627 boolean indexed; /**< use index buffer */
628
629 enum pipe_prim_type mode; /**< the mode of the primitive */
630 unsigned start; /**< the index of the first vertex */
631 unsigned count; /**< number of vertices */
632
633 unsigned start_instance; /**< first instance id */
634 unsigned instance_count; /**< number of instances */
635
636 unsigned drawid; /**< id of this draw in a multidraw */
637
638 unsigned vertices_per_patch; /**< the number of vertices per patch */
639
640 /**
641 * For indexed drawing, these fields apply after index lookup.
642 */
643 int index_bias; /**< a bias to be added to each index */
644 unsigned min_index; /**< the min index */
645 unsigned max_index; /**< the max index */
646
647 /**
648 * Primitive restart enable/index (only applies to indexed drawing)
649 */
650 boolean primitive_restart;
651 unsigned restart_index;
652
653 /**
654 * Stream output target. If not NULL, it's used to provide the 'count'
655 * parameter based on the number vertices captured by the stream output
656 * stage. (or generally, based on the number of bytes captured)
657 *
658 * Only 'mode', 'start_instance', and 'instance_count' are taken into
659 * account, all the other variables from pipe_draw_info are ignored.
660 *
661 * 'start' is implicitly 0 and 'count' is set as discussed above.
662 * The draw command is non-indexed.
663 *
664 * Note that this only provides the count. The vertex buffers must
665 * be set via set_vertex_buffers manually.
666 */
667 struct pipe_stream_output_target *count_from_stream_output;
668
669 /* Indirect draw parameters resource: If not NULL, most values are taken
670 * from this buffer instead, which is laid out as follows:
671 *
672 * if indexed is TRUE:
673 * struct {
674 * uint32_t count;
675 * uint32_t instance_count;
676 * uint32_t start;
677 * int32_t index_bias;
678 * uint32_t start_instance;
679 * };
680 * otherwise:
681 * struct {
682 * uint32_t count;
683 * uint32_t instance_count;
684 * uint32_t start;
685 * uint32_t start_instance;
686 * };
687 */
688 struct pipe_resource *indirect;
689 unsigned indirect_offset; /**< must be 4 byte aligned */
690 unsigned indirect_stride; /**< must be 4 byte aligned */
691 unsigned indirect_count; /**< number of indirect draws */
692
693 /* Indirect draw count resource: If not NULL, contains a 32-bit value which
694 * is to be used as the real indirect_count. In that case indirect_count
695 * becomes the maximum possible value.
696 */
697 struct pipe_resource *indirect_params;
698 unsigned indirect_params_offset; /**< must be 4 byte aligned */
699 };
700
701
702 /**
703 * Information to describe a blit call.
704 */
705 struct pipe_blit_info
706 {
707 struct {
708 struct pipe_resource *resource;
709 unsigned level;
710 struct pipe_box box; /**< negative width, height only legal for src */
711 /* For pipe_surface-like format casting: */
712 enum pipe_format format; /**< must be supported for sampling (src)
713 or rendering (dst), ZS is always supported */
714 } dst, src;
715
716 unsigned mask; /**< bitmask of PIPE_MASK_R/G/B/A/Z/S */
717 unsigned filter; /**< PIPE_TEX_FILTER_* */
718
719 boolean scissor_enable;
720 struct pipe_scissor_state scissor;
721
722 /* Window rectangles can either be inclusive or exclusive. */
723 boolean window_rectangle_include;
724 unsigned num_window_rectangles;
725 struct pipe_scissor_state window_rectangles[PIPE_MAX_WINDOW_RECTANGLES];
726
727 boolean render_condition_enable; /**< whether the blit should honor the
728 current render condition */
729 boolean alpha_blend; /* dst.rgb = src.rgb * src.a + dst.rgb * (1 - src.a) */
730 };
731
732 /**
733 * Information to describe a launch_grid call.
734 */
735 struct pipe_grid_info
736 {
737 /**
738 * For drivers that use PIPE_SHADER_IR_LLVM as their prefered IR, this value
739 * will be the index of the kernel in the opencl.kernels metadata list.
740 */
741 uint32_t pc;
742
743 /**
744 * Will be used to initialize the INPUT resource, and it should point to a
745 * buffer of at least pipe_compute_state::req_input_mem bytes.
746 */
747 void *input;
748
749 /**
750 * Grid number of dimensions, 1-3, e.g. the work_dim parameter passed to
751 * clEnqueueNDRangeKernel. Note block[] and grid[] must be padded with
752 * 1 for non-used dimensions.
753 */
754 uint work_dim;
755
756 /**
757 * Determine the layout of the working block (in thread units) to be used.
758 */
759 uint block[3];
760
761 /**
762 * Determine the layout of the grid (in block units) to be used.
763 */
764 uint grid[3];
765
766 /* Indirect compute parameters resource: If not NULL, block sizes are taken
767 * from this buffer instead, which is laid out as follows:
768 *
769 * struct {
770 * uint32_t num_blocks_x;
771 * uint32_t num_blocks_y;
772 * uint32_t num_blocks_z;
773 * };
774 */
775 struct pipe_resource *indirect;
776 unsigned indirect_offset; /**< must be 4 byte aligned */
777 };
778
779 /**
780 * Structure used as a header for serialized LLVM programs.
781 */
782 struct pipe_llvm_program_header
783 {
784 uint32_t num_bytes; /**< Number of bytes in the LLVM bytecode program. */
785 };
786
787 struct pipe_compute_state
788 {
789 enum pipe_shader_ir ir_type; /**< IR type contained in prog. */
790 const void *prog; /**< Compute program to be executed. */
791 unsigned req_local_mem; /**< Required size of the LOCAL resource. */
792 unsigned req_private_mem; /**< Required size of the PRIVATE resource. */
793 unsigned req_input_mem; /**< Required size of the INPUT resource. */
794 };
795
796 /**
797 * Structure that contains a callback for debug messages from the driver back
798 * to the state tracker.
799 */
800 struct pipe_debug_callback
801 {
802 /**
803 * When set to \c true, the callback may be called asynchronously from a
804 * driver-created thread.
805 */
806 bool async;
807
808 /**
809 * Callback for the driver to report debug/performance/etc information back
810 * to the state tracker.
811 *
812 * \param data user-supplied data pointer
813 * \param id message type identifier, if pointed value is 0, then a
814 * new id is assigned
815 * \param type PIPE_DEBUG_TYPE_*
816 * \param format printf-style format string
817 * \param args args for format string
818 */
819 void (*debug_message)(void *data,
820 unsigned *id,
821 enum pipe_debug_type type,
822 const char *fmt,
823 va_list args);
824 void *data;
825 };
826
827 /**
828 * Information about memory usage. All sizes are in kilobytes.
829 */
830 struct pipe_memory_info
831 {
832 unsigned total_device_memory; /**< size of device memory, e.g. VRAM */
833 unsigned avail_device_memory; /**< free device memory at the moment */
834 unsigned total_staging_memory; /**< size of staging memory, e.g. GART */
835 unsigned avail_staging_memory; /**< free staging memory at the moment */
836 unsigned device_memory_evicted; /**< size of memory evicted (monotonic counter) */
837 unsigned nr_device_memory_evictions; /**< # of evictions (monotonic counter) */
838 };
839
840 #ifdef __cplusplus
841 }
842 #endif
843
844 #endif