1 /**************************************************************************
3 * Copyright 2007 VMware, Inc.
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26 **************************************************************************/
32 * Abstract graphics pipe state objects.
35 * 1. Want compact representations, so we use bitfields.
36 * 2. Put bitfields before other (GLfloat) fields.
37 * 3. enum bitfields need to be at least one bit extra in size so the most
38 * significant bit is zero. MSVC treats enums as signed so if the high
39 * bit is set, the value will be interpreted as a negative number.
40 * That causes trouble in various places.
47 #include "p_compiler.h"
48 #include "p_defines.h"
58 * Implementation limits
60 #define PIPE_MAX_ATTRIBS 32
61 #define PIPE_MAX_CLIP_PLANES 8
62 #define PIPE_MAX_COLOR_BUFS 8
63 #define PIPE_MAX_CONSTANT_BUFFERS 32
64 #define PIPE_MAX_SAMPLERS 32
65 #define PIPE_MAX_SHADER_INPUTS 80 /* 32 GENERIC + 32 PATCH + 16 others */
66 #define PIPE_MAX_SHADER_OUTPUTS 80 /* 32 GENERIC + 32 PATCH + 16 others */
67 #define PIPE_MAX_SHADER_SAMPLER_VIEWS 128
68 #define PIPE_MAX_SHADER_BUFFERS 32
69 #define PIPE_MAX_SHADER_IMAGES 32
70 #define PIPE_MAX_TEXTURE_LEVELS 16
71 #define PIPE_MAX_SO_BUFFERS 4
72 #define PIPE_MAX_SO_OUTPUTS 64
73 #define PIPE_MAX_VIEWPORTS 16
74 #define PIPE_MAX_CLIP_OR_CULL_DISTANCE_COUNT 8
75 #define PIPE_MAX_CLIP_OR_CULL_DISTANCE_ELEMENT_COUNT 2
76 #define PIPE_MAX_WINDOW_RECTANGLES 8
77 #define PIPE_MAX_SAMPLE_LOCATION_GRID_SIZE 4
79 #define PIPE_MAX_HW_ATOMIC_BUFFERS 32
83 int32_t count
; /* atomic */
89 * Primitive (point/line/tri) rasterization info
91 struct pipe_rasterizer_state
94 unsigned light_twoside
:1;
95 unsigned clamp_vertex_color
:1;
96 unsigned clamp_fragment_color
:1;
98 unsigned cull_face
:2; /**< PIPE_FACE_x */
99 unsigned fill_front
:2; /**< PIPE_POLYGON_MODE_x */
100 unsigned fill_back
:2; /**< PIPE_POLYGON_MODE_x */
101 unsigned offset_point
:1;
102 unsigned offset_line
:1;
103 unsigned offset_tri
:1;
105 unsigned poly_smooth
:1;
106 unsigned poly_stipple_enable
:1;
107 unsigned point_smooth
:1;
108 unsigned sprite_coord_mode
:1; /**< PIPE_SPRITE_COORD_ */
109 unsigned point_quad_rasterization
:1; /** points rasterized as quads or points */
110 unsigned point_tri_clip
:1; /** large points clipped as tris or points */
111 unsigned point_size_per_vertex
:1; /**< size computed in vertex shader */
112 unsigned multisample
:1; /* XXX maybe more ms state in future */
113 unsigned force_persample_interp
:1;
114 unsigned line_smooth
:1;
115 unsigned line_stipple_enable
:1;
116 unsigned line_last_pixel
:1;
117 unsigned conservative_raster_mode
:2; /**< PIPE_CONSERVATIVE_RASTER_x */
120 * Use the first vertex of a primitive as the provoking vertex for
123 unsigned flatshade_first
:1;
125 unsigned half_pixel_center
:1;
126 unsigned bottom_edge_rule
:1;
129 * Conservative rasterization subpixel precision bias in bits
131 unsigned subpixel_precision_x
:4;
132 unsigned subpixel_precision_y
:4;
135 * When true, rasterization is disabled and no pixels are written.
136 * This only makes sense with the Stream Out functionality.
138 unsigned rasterizer_discard
:1;
141 * Exposed by PIPE_CAP_TILE_RASTER_ORDER. When true,
142 * tile_raster_order_increasing_* indicate the order that the rasterizer
143 * should render tiles, to meet the requirements of
144 * GL_MESA_tile_raster_order.
146 unsigned tile_raster_order_fixed
:1;
147 unsigned tile_raster_order_increasing_x
:1;
148 unsigned tile_raster_order_increasing_y
:1;
151 * When false, depth clipping is disabled and the depth value will be
152 * clamped later at the per-pixel level before depth testing.
153 * This depends on PIPE_CAP_DEPTH_CLIP_DISABLE.
155 * If PIPE_CAP_DEPTH_CLIP_DISABLE_SEPARATE is unsupported, depth_clip_near
156 * is equal to depth_clip_far.
158 unsigned depth_clip_near
:1;
159 unsigned depth_clip_far
:1;
162 * When true clip space in the z axis goes from [0..1] (D3D). When false
165 * NOTE: D3D will always use depth clamping.
167 unsigned clip_halfz
:1;
170 * When true do not scale offset_units and use same rules for unorm and
171 * float depth buffers (D3D9). When false use GL/D3D1X behaviour.
172 * This depends on PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED.
174 unsigned offset_units_unscaled
:1;
177 * Enable bits for clipping half-spaces.
178 * This applies to both user clip planes and shader clip distances.
179 * Note that if the bound shader exports any clip distances, these
180 * replace all user clip planes, and clip half-spaces enabled here
181 * but not written by the shader count as disabled.
183 unsigned clip_plane_enable
:PIPE_MAX_CLIP_PLANES
;
185 unsigned line_stipple_factor
:8; /**< [1..256] actually */
186 unsigned line_stipple_pattern
:16;
189 * Replace the given TEXCOORD inputs with point coordinates, max. 8 inputs.
190 * If TEXCOORD (including PCOORD) are unsupported, replace GENERIC inputs
191 * instead. Max. 9 inputs: 8x GENERIC to emulate TEXCOORD, and 1x GENERIC
194 uint16_t sprite_coord_enable
; /* 0-7: TEXCOORD/GENERIC, 8: PCOORD */
197 float point_size
; /**< used when no per-vertex size */
201 float conservative_raster_dilate
;
205 struct pipe_poly_stipple
207 unsigned stipple
[32];
211 struct pipe_viewport_state
218 struct pipe_scissor_state
227 struct pipe_clip_state
229 float ucp
[PIPE_MAX_CLIP_PLANES
][4];
233 * A single output for vertex transform feedback.
235 struct pipe_stream_output
237 unsigned register_index
:6; /**< 0 to 63 (OUT index) */
238 unsigned start_component
:2; /** 0 to 3 */
239 unsigned num_components
:3; /** 1 to 4 */
240 unsigned output_buffer
:3; /**< 0 to PIPE_MAX_SO_BUFFERS */
241 unsigned dst_offset
:16; /**< offset into the buffer in dwords */
242 unsigned stream
:2; /**< 0 to 3 */
246 * Stream output for vertex transform feedback.
248 struct pipe_stream_output_info
250 unsigned num_outputs
;
251 /** stride for an entire vertex for each buffer in dwords */
252 uint16_t stride
[PIPE_MAX_SO_BUFFERS
];
255 * Array of stream outputs, in the order they are to be written in.
256 * Selected components are tightly packed into the output buffer.
258 struct pipe_stream_output output
[PIPE_MAX_SO_OUTPUTS
];
262 * The 'type' parameter identifies whether the shader state contains TGSI
263 * tokens, etc. If the driver returns 'PIPE_SHADER_IR_TGSI' for the
264 * 'PIPE_SHADER_CAP_PREFERRED_IR' shader param, the ir will *always* be
265 * 'PIPE_SHADER_IR_TGSI' and the tokens ptr will be valid. If the driver
266 * requests a different 'pipe_shader_ir' type, then it must check the 'type'
267 * enum to see if it is getting TGSI tokens or its preferred IR.
269 * TODO pipe_compute_state should probably get similar treatment to handle
270 * multiple IR's in a cleaner way..
272 * NOTE: since it is expected that the consumer will want to perform
273 * additional passes on the nir_shader, the driver takes ownership of
274 * the nir_shader. If state trackers need to hang on to the IR (for
275 * example, variant management), it should use nir_shader_clone().
277 struct pipe_shader_state
279 enum pipe_shader_ir type
;
280 /* TODO move tokens into union. */
281 const struct tgsi_token
*tokens
;
286 struct pipe_stream_output_info stream_output
;
290 pipe_shader_state_from_tgsi(struct pipe_shader_state
*state
,
291 const struct tgsi_token
*tokens
)
293 state
->type
= PIPE_SHADER_IR_TGSI
;
294 state
->tokens
= tokens
;
295 memset(&state
->stream_output
, 0, sizeof(state
->stream_output
));
298 struct pipe_depth_state
300 unsigned enabled
:1; /**< depth test enabled? */
301 unsigned writemask
:1; /**< allow depth buffer writes? */
302 unsigned func
:3; /**< depth test func (PIPE_FUNC_x) */
303 unsigned bounds_test
:1; /**< depth bounds test enabled? */
304 float bounds_min
; /**< minimum depth bound */
305 float bounds_max
; /**< maximum depth bound */
309 struct pipe_stencil_state
311 unsigned enabled
:1; /**< stencil[0]: stencil enabled, stencil[1]: two-side enabled */
312 unsigned func
:3; /**< PIPE_FUNC_x */
313 unsigned fail_op
:3; /**< PIPE_STENCIL_OP_x */
314 unsigned zpass_op
:3; /**< PIPE_STENCIL_OP_x */
315 unsigned zfail_op
:3; /**< PIPE_STENCIL_OP_x */
316 unsigned valuemask
:8;
317 unsigned writemask
:8;
321 struct pipe_alpha_state
324 unsigned func
:3; /**< PIPE_FUNC_x */
325 float ref_value
; /**< reference value */
329 struct pipe_depth_stencil_alpha_state
331 struct pipe_depth_state depth
;
332 struct pipe_stencil_state stencil
[2]; /**< [0] = front, [1] = back */
333 struct pipe_alpha_state alpha
;
337 struct pipe_rt_blend_state
339 unsigned blend_enable
:1;
341 unsigned rgb_func
:3; /**< PIPE_BLEND_x */
342 unsigned rgb_src_factor
:5; /**< PIPE_BLENDFACTOR_x */
343 unsigned rgb_dst_factor
:5; /**< PIPE_BLENDFACTOR_x */
345 unsigned alpha_func
:3; /**< PIPE_BLEND_x */
346 unsigned alpha_src_factor
:5; /**< PIPE_BLENDFACTOR_x */
347 unsigned alpha_dst_factor
:5; /**< PIPE_BLENDFACTOR_x */
349 unsigned colormask
:4; /**< bitmask of PIPE_MASK_R/G/B/A */
353 struct pipe_blend_state
355 unsigned independent_blend_enable
:1;
356 unsigned logicop_enable
:1;
357 unsigned logicop_func
:4; /**< PIPE_LOGICOP_x */
359 unsigned alpha_to_coverage
:1;
360 unsigned alpha_to_one
:1;
361 struct pipe_rt_blend_state rt
[PIPE_MAX_COLOR_BUFS
];
365 struct pipe_blend_color
371 struct pipe_stencil_ref
378 * Note that pipe_surfaces are "texture views for rendering"
379 * and so in the case of ARB_framebuffer_no_attachment there
380 * is no pipe_surface state available such that we may
381 * extract the number of samples and layers.
383 struct pipe_framebuffer_state
385 uint16_t width
, height
;
386 uint16_t layers
; /**< Number of layers in a no-attachment framebuffer */
387 ubyte samples
; /**< Number of samples in a no-attachment framebuffer */
389 /** multiple color buffers for multiple render targets */
391 struct pipe_surface
*cbufs
[PIPE_MAX_COLOR_BUFS
];
393 struct pipe_surface
*zsbuf
; /**< Z/stencil buffer */
398 * Texture sampler state.
400 struct pipe_sampler_state
402 unsigned wrap_s
:3; /**< PIPE_TEX_WRAP_x */
403 unsigned wrap_t
:3; /**< PIPE_TEX_WRAP_x */
404 unsigned wrap_r
:3; /**< PIPE_TEX_WRAP_x */
405 unsigned min_img_filter
:1; /**< PIPE_TEX_FILTER_x */
406 unsigned min_mip_filter
:2; /**< PIPE_TEX_MIPFILTER_x */
407 unsigned mag_img_filter
:1; /**< PIPE_TEX_FILTER_x */
408 unsigned compare_mode
:1; /**< PIPE_TEX_COMPARE_x */
409 unsigned compare_func
:3; /**< PIPE_FUNC_x */
410 unsigned normalized_coords
:1; /**< Are coords normalized to [0,1]? */
411 unsigned max_anisotropy
:5;
412 unsigned seamless_cube_map
:1;
413 float lod_bias
; /**< LOD/lambda bias */
414 float min_lod
, max_lod
; /**< LOD clamp range, after bias */
415 union pipe_color_union border_color
;
418 union pipe_surface_desc
{
421 unsigned first_layer
:16;
422 unsigned last_layer
:16;
425 unsigned first_element
;
426 unsigned last_element
;
431 * A view into a texture that can be bound to a color render target /
432 * depth stencil attachment point.
436 struct pipe_reference reference
;
437 enum pipe_format format
:16;
438 unsigned writable
:1; /**< writable shader resource */
439 struct pipe_resource
*texture
; /**< resource into which this is a view */
440 struct pipe_context
*context
; /**< context this surface belongs to */
442 /* XXX width/height should be removed */
443 uint16_t width
; /**< logical width in pixels */
444 uint16_t height
; /**< logical height in pixels */
447 * Number of samples for the surface. This will be 0 if rendering
448 * should use the resource's nr_samples, or another value if the resource
449 * is bound using FramebufferTexture2DMultisampleEXT.
451 unsigned nr_samples
:8;
453 union pipe_surface_desc u
;
458 * A view into a texture that can be bound to a shader stage.
460 struct pipe_sampler_view
462 struct pipe_reference reference
;
463 enum pipe_format format
:15; /**< typed PIPE_FORMAT_x */
464 enum pipe_texture_target target
:5; /**< PIPE_TEXTURE_x */
465 unsigned swizzle_r
:3; /**< PIPE_SWIZZLE_x for red component */
466 unsigned swizzle_g
:3; /**< PIPE_SWIZZLE_x for green component */
467 unsigned swizzle_b
:3; /**< PIPE_SWIZZLE_x for blue component */
468 unsigned swizzle_a
:3; /**< PIPE_SWIZZLE_x for alpha component */
469 struct pipe_resource
*texture
; /**< texture into which this is a view */
470 struct pipe_context
*context
; /**< context this view belongs to */
473 unsigned first_layer
:16; /**< first layer to use for array textures */
474 unsigned last_layer
:16; /**< last layer to use for array textures */
475 unsigned first_level
:8; /**< first mipmap level to use */
476 unsigned last_level
:8; /**< last mipmap level to use */
479 unsigned offset
; /**< offset in bytes */
480 unsigned size
; /**< size of the readable sub-range in bytes */
487 * A description of a buffer or texture image that can be bound to a shader
490 struct pipe_image_view
492 struct pipe_resource
*resource
; /**< resource into which this is a view */
493 enum pipe_format format
; /**< typed PIPE_FORMAT_x */
494 uint16_t access
; /**< PIPE_IMAGE_ACCESS_x */
495 uint16_t shader_access
; /**< PIPE_IMAGE_ACCESS_x */
499 unsigned first_layer
:16; /**< first layer to use for array textures */
500 unsigned last_layer
:16; /**< last layer to use for array textures */
501 unsigned level
:8; /**< mipmap level to use */
504 unsigned offset
; /**< offset in bytes */
505 unsigned size
; /**< size of the accessible sub-range in bytes */
512 * Subregion of 1D/2D/3D image resource.
516 /* Fields only used by textures use int16_t instead of int.
517 * x and width are used by buffers, so they need the full 32-bit range.
529 * A memory object/resource such as a vertex buffer or texture.
533 struct pipe_reference reference
;
535 unsigned width0
; /**< Used by both buffers and textures. */
536 uint16_t height0
; /* Textures: The maximum height/depth/array_size is 16k. */
540 enum pipe_format format
:16; /**< PIPE_FORMAT_x */
541 enum pipe_texture_target target
:8; /**< PIPE_TEXTURE_x */
542 unsigned last_level
:8; /**< Index of last mipmap level present/defined */
544 /** Number of samples determining quality, driving rasterizer, shading,
547 unsigned nr_samples
:8;
549 /** Multiple samples within a pixel can have the same value.
550 * nr_storage_samples determines how many slots for different values
551 * there are per pixel. Only color buffers can set this lower than
554 unsigned nr_storage_samples
:8;
556 unsigned usage
:8; /**< PIPE_USAGE_x (not a bitmask) */
557 unsigned bind
; /**< bitmask of PIPE_BIND_x */
558 unsigned flags
; /**< bitmask of PIPE_RESOURCE_FLAG_x */
561 * For planar images, ie. YUV EGLImage external, etc, pointer to the
564 struct pipe_resource
*next
;
565 /* The screen pointer should be last for optimal structure packing. */
566 struct pipe_screen
*screen
; /**< screen that this texture belongs to */
571 * Transfer object. For data transfer to/from a resource.
575 struct pipe_resource
*resource
; /**< resource to transfer to/from */
576 unsigned level
; /**< texture mipmap level */
577 enum pipe_transfer_usage usage
;
578 struct pipe_box box
; /**< region of the resource to access */
579 unsigned stride
; /**< row stride in bytes */
580 unsigned layer_stride
; /**< image/layer stride in bytes */
585 * A vertex buffer. Typically, all the vertex data/attributes for
586 * drawing something will be in one buffer. But it's also possible, for
587 * example, to put colors in one buffer and texcoords in another.
589 struct pipe_vertex_buffer
591 uint16_t stride
; /**< stride to same attrib in next vertex, in bytes */
593 unsigned buffer_offset
; /**< offset to start of data in buffer, in bytes */
596 struct pipe_resource
*resource
; /**< the actual buffer */
597 const void *user
; /**< pointer to a user buffer */
603 * A constant buffer. A subrange of an existing buffer can be set
604 * as a constant buffer.
606 struct pipe_constant_buffer
608 struct pipe_resource
*buffer
; /**< the actual buffer */
609 unsigned buffer_offset
; /**< offset to start of data in buffer, in bytes */
610 unsigned buffer_size
; /**< how much data can be read in shader */
611 const void *user_buffer
; /**< pointer to a user buffer if buffer == NULL */
616 * An untyped shader buffer supporting loads, stores, and atomics.
618 struct pipe_shader_buffer
{
619 struct pipe_resource
*buffer
; /**< the actual buffer */
620 unsigned buffer_offset
; /**< offset to start of data in buffer, in bytes */
621 unsigned buffer_size
; /**< how much data can be read in shader */
626 * A stream output target. The structure specifies the range vertices can
629 * In addition to that, the structure should internally maintain the offset
630 * into the buffer, which should be incremented everytime something is written
631 * (appended) to it. The internal offset is buffer_offset + how many bytes
632 * have been written. The internal offset can be stored on the device
633 * and the CPU actually doesn't have to query it.
635 * Note that the buffer_size variable is actually specifying the available
636 * space in the buffer, not the size of the attached buffer.
637 * In other words in majority of cases buffer_size would simply be
638 * 'buffer->width0 - buffer_offset', so buffer_size refers to the size
639 * of the buffer left, after accounting for buffer offset, for stream output
642 * Use PIPE_QUERY_SO_STATISTICS to know how many primitives have
643 * actually been written.
645 struct pipe_stream_output_target
647 struct pipe_reference reference
;
648 struct pipe_resource
*buffer
; /**< the output buffer */
649 struct pipe_context
*context
; /**< context this SO target belongs to */
651 unsigned buffer_offset
; /**< offset where data should be written, in bytes */
652 unsigned buffer_size
; /**< how much data is allowed to be written */
657 * Information to describe a vertex attribute (position, color, etc)
659 struct pipe_vertex_element
661 /** Offset of this attribute, in bytes, from the start of the vertex */
662 unsigned src_offset
:16;
664 /** Which vertex_buffer (as given to pipe->set_vertex_buffer()) does
665 * this attribute live in?
667 unsigned vertex_buffer_index
:5;
669 enum pipe_format src_format
:11;
671 /** Instance data rate divisor. 0 means this is per-vertex data,
672 * n means per-instance data used for n consecutive instances (n > 0).
674 unsigned instance_divisor
;
678 struct pipe_draw_indirect_info
680 unsigned offset
; /**< must be 4 byte aligned */
681 unsigned stride
; /**< must be 4 byte aligned */
682 unsigned draw_count
; /**< number of indirect draws */
683 unsigned indirect_draw_count_offset
; /**< must be 4 byte aligned */
685 /* Indirect draw parameters resource is laid out as follows:
687 * if using indexed drawing:
690 * uint32_t instance_count;
692 * int32_t index_bias;
693 * uint32_t start_instance;
698 * uint32_t instance_count;
700 * uint32_t start_instance;
703 struct pipe_resource
*buffer
;
705 /* Indirect draw count resource: If not NULL, contains a 32-bit value which
706 * is to be used as the real draw_count.
708 struct pipe_resource
*indirect_draw_count
;
713 * Information to describe a draw_vbo call.
715 struct pipe_draw_info
717 ubyte index_size
; /**< if 0, the draw is not indexed. */
718 enum pipe_prim_type mode
:8; /**< the mode of the primitive */
719 unsigned primitive_restart
:1;
720 unsigned has_user_indices
:1; /**< if true, use index.user_buffer */
721 ubyte vertices_per_patch
; /**< the number of vertices per patch */
724 * Direct draws: start is the index of the first vertex
725 * Non-indexed indirect draws: not used
726 * Indexed indirect draws: start is added to the indirect start.
729 unsigned count
; /**< number of vertices */
731 unsigned start_instance
; /**< first instance id */
732 unsigned instance_count
; /**< number of instances */
734 unsigned drawid
; /**< id of this draw in a multidraw */
737 * For indexed drawing, these fields apply after index lookup.
739 int index_bias
; /**< a bias to be added to each index */
740 unsigned min_index
; /**< the min index */
741 unsigned max_index
; /**< the max index */
744 * Primitive restart enable/index (only applies to indexed drawing)
746 unsigned restart_index
;
748 /* Pointers must be at the end for an optimal structure layout on 64-bit. */
751 * An index buffer. When an index buffer is bound, all indices to vertices
752 * will be looked up from the buffer.
754 * If has_user_indices, use index.user, else use index.resource.
757 struct pipe_resource
*resource
; /**< real buffer */
758 const void *user
; /**< pointer to a user buffer */
761 struct pipe_draw_indirect_info
*indirect
; /**< Indirect draw. */
764 * Stream output target. If not NULL, it's used to provide the 'count'
765 * parameter based on the number vertices captured by the stream output
766 * stage. (or generally, based on the number of bytes captured)
768 * Only 'mode', 'start_instance', and 'instance_count' are taken into
769 * account, all the other variables from pipe_draw_info are ignored.
771 * 'start' is implicitly 0 and 'count' is set as discussed above.
772 * The draw command is non-indexed.
774 * Note that this only provides the count. The vertex buffers must
775 * be set via set_vertex_buffers manually.
777 struct pipe_stream_output_target
*count_from_stream_output
;
782 * Information to describe a blit call.
784 struct pipe_blit_info
787 struct pipe_resource
*resource
;
789 struct pipe_box box
; /**< negative width, height only legal for src */
790 /* For pipe_surface-like format casting: */
791 enum pipe_format format
; /**< must be supported for sampling (src)
792 or rendering (dst), ZS is always supported */
795 unsigned mask
; /**< bitmask of PIPE_MASK_R/G/B/A/Z/S */
796 unsigned filter
; /**< PIPE_TEX_FILTER_* */
798 boolean scissor_enable
;
799 struct pipe_scissor_state scissor
;
801 /* Window rectangles can either be inclusive or exclusive. */
802 boolean window_rectangle_include
;
803 unsigned num_window_rectangles
;
804 struct pipe_scissor_state window_rectangles
[PIPE_MAX_WINDOW_RECTANGLES
];
806 boolean render_condition_enable
; /**< whether the blit should honor the
807 current render condition */
808 boolean alpha_blend
; /* dst.rgb = src.rgb * src.a + dst.rgb * (1 - src.a) */
812 * Information to describe a launch_grid call.
814 struct pipe_grid_info
817 * For drivers that use PIPE_SHADER_IR_NATIVE as their prefered IR, this
818 * value will be the index of the kernel in the opencl.kernels metadata
824 * Will be used to initialize the INPUT resource, and it should point to a
825 * buffer of at least pipe_compute_state::req_input_mem bytes.
830 * Grid number of dimensions, 1-3, e.g. the work_dim parameter passed to
831 * clEnqueueNDRangeKernel. Note block[] and grid[] must be padded with
832 * 1 for non-used dimensions.
837 * Determine the layout of the working block (in thread units) to be used.
842 * last_block allows disabling threads at the farthermost grid boundary.
843 * Full blocks as specified by "block" are launched, but the threads
844 * outside of "last_block" dimensions are disabled.
846 * If a block touches the grid boundary in the i-th axis, threads with
847 * THREAD_ID[i] >= last_block[i] are disabled.
849 * If last_block[i] is 0, it has the same behavior as last_block[i] = block[i],
852 * It's equivalent to doing this at the beginning of the compute shader:
854 * for (i = 0; i < 3; i++) {
855 * if (block_id[i] == grid[i] - 1 &&
856 * last_block[i] && thread_id[i] >= last_block[i])
863 * Determine the layout of the grid (in block units) to be used.
867 /* Indirect compute parameters resource: If not NULL, block sizes are taken
868 * from this buffer instead, which is laid out as follows:
871 * uint32_t num_blocks_x;
872 * uint32_t num_blocks_y;
873 * uint32_t num_blocks_z;
876 struct pipe_resource
*indirect
;
877 unsigned indirect_offset
; /**< must be 4 byte aligned */
881 * Structure used as a header for serialized LLVM programs.
883 struct pipe_llvm_program_header
885 uint32_t num_bytes
; /**< Number of bytes in the LLVM bytecode program. */
888 struct pipe_compute_state
890 enum pipe_shader_ir ir_type
; /**< IR type contained in prog. */
891 const void *prog
; /**< Compute program to be executed. */
892 unsigned req_local_mem
; /**< Required size of the LOCAL resource. */
893 unsigned req_private_mem
; /**< Required size of the PRIVATE resource. */
894 unsigned req_input_mem
; /**< Required size of the INPUT resource. */
898 * Structure that contains a callback for debug messages from the driver back
899 * to the state tracker.
901 struct pipe_debug_callback
904 * When set to \c true, the callback may be called asynchronously from a
905 * driver-created thread.
910 * Callback for the driver to report debug/performance/etc information back
911 * to the state tracker.
913 * \param data user-supplied data pointer
914 * \param id message type identifier, if pointed value is 0, then a
916 * \param type PIPE_DEBUG_TYPE_*
917 * \param format printf-style format string
918 * \param args args for format string
920 void (*debug_message
)(void *data
,
922 enum pipe_debug_type type
,
929 * Structure that contains a callback for device reset messages from the driver
930 * back to the state tracker.
932 * The callback must not be called from driver-created threads.
934 struct pipe_device_reset_callback
937 * Callback for the driver to report when a device reset is detected.
939 * \param data user-supplied data pointer
940 * \param status PIPE_*_RESET
942 void (*reset
)(void *data
, enum pipe_reset_status status
);
948 * Information about memory usage. All sizes are in kilobytes.
950 struct pipe_memory_info
952 unsigned total_device_memory
; /**< size of device memory, e.g. VRAM */
953 unsigned avail_device_memory
; /**< free device memory at the moment */
954 unsigned total_staging_memory
; /**< size of staging memory, e.g. GART */
955 unsigned avail_staging_memory
; /**< free staging memory at the moment */
956 unsigned device_memory_evicted
; /**< size of memory evicted (monotonic counter) */
957 unsigned nr_device_memory_evictions
; /**< # of evictions (monotonic counter) */
961 * Structure that contains information about external memory
963 struct pipe_memory_object