1 /**************************************************************************
3 * Copyright 2007 VMware, Inc.
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23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **************************************************************************/
32 * Abstract graphics pipe state objects.
35 * 1. Want compact representations, so we use bitfields.
36 * 2. Put bitfields before other (GLfloat) fields.
43 #include "p_compiler.h"
44 #include "p_defines.h"
54 * Implementation limits
56 #define PIPE_MAX_ATTRIBS 32
57 #define PIPE_MAX_CLIP_PLANES 8
58 #define PIPE_MAX_COLOR_BUFS 8
59 #define PIPE_MAX_CONSTANT_BUFFERS 32
60 #define PIPE_MAX_SAMPLERS 32
61 #define PIPE_MAX_SHADER_INPUTS 80 /* 32 GENERIC + 32 PATCH + 16 others */
62 #define PIPE_MAX_SHADER_OUTPUTS 80 /* 32 GENERIC + 32 PATCH + 16 others */
63 #define PIPE_MAX_SHADER_SAMPLER_VIEWS 32
64 #define PIPE_MAX_SHADER_BUFFERS 32
65 #define PIPE_MAX_SHADER_IMAGES 32
66 #define PIPE_MAX_TEXTURE_LEVELS 16
67 #define PIPE_MAX_SO_BUFFERS 4
68 #define PIPE_MAX_SO_OUTPUTS 64
69 #define PIPE_MAX_VIEWPORTS 16
70 #define PIPE_MAX_CLIP_OR_CULL_DISTANCE_COUNT 8
71 #define PIPE_MAX_CLIP_OR_CULL_DISTANCE_ELEMENT_COUNT 2
72 #define PIPE_MAX_WINDOW_RECTANGLES 8
77 int32_t count
; /* atomic */
83 * Primitive (point/line/tri) rasterization info
85 struct pipe_rasterizer_state
88 unsigned light_twoside
:1;
89 unsigned clamp_vertex_color
:1;
90 unsigned clamp_fragment_color
:1;
92 unsigned cull_face
:2; /**< PIPE_FACE_x */
93 unsigned fill_front
:2; /**< PIPE_POLYGON_MODE_x */
94 unsigned fill_back
:2; /**< PIPE_POLYGON_MODE_x */
95 unsigned offset_point
:1;
96 unsigned offset_line
:1;
97 unsigned offset_tri
:1;
99 unsigned poly_smooth
:1;
100 unsigned poly_stipple_enable
:1;
101 unsigned point_smooth
:1;
102 unsigned sprite_coord_mode
:1; /**< PIPE_SPRITE_COORD_ */
103 unsigned point_quad_rasterization
:1; /** points rasterized as quads or points */
104 unsigned point_tri_clip
:1; /** large points clipped as tris or points */
105 unsigned point_size_per_vertex
:1; /**< size computed in vertex shader */
106 unsigned multisample
:1; /* XXX maybe more ms state in future */
107 unsigned force_persample_interp
:1;
108 unsigned line_smooth
:1;
109 unsigned line_stipple_enable
:1;
110 unsigned line_last_pixel
:1;
113 * Use the first vertex of a primitive as the provoking vertex for
116 unsigned flatshade_first
:1;
118 unsigned half_pixel_center
:1;
119 unsigned bottom_edge_rule
:1;
122 * When true, rasterization is disabled and no pixels are written.
123 * This only makes sense with the Stream Out functionality.
125 unsigned rasterizer_discard
:1;
128 * When false, depth clipping is disabled and the depth value will be
129 * clamped later at the per-pixel level before depth testing.
130 * This depends on PIPE_CAP_DEPTH_CLIP_DISABLE.
132 unsigned depth_clip
:1;
135 * When true clip space in the z axis goes from [0..1] (D3D). When false
138 * NOTE: D3D will always use depth clamping.
140 unsigned clip_halfz
:1;
143 * When true do not scale offset_units and use same rules for unorm and
144 * float depth buffers (D3D9). When false use GL/D3D1X behaviour.
145 * This depends on PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED.
147 unsigned offset_units_unscaled
:1;
150 * Enable bits for clipping half-spaces.
151 * This applies to both user clip planes and shader clip distances.
152 * Note that if the bound shader exports any clip distances, these
153 * replace all user clip planes, and clip half-spaces enabled here
154 * but not written by the shader count as disabled.
156 unsigned clip_plane_enable
:PIPE_MAX_CLIP_PLANES
;
158 unsigned line_stipple_factor
:8; /**< [1..256] actually */
159 unsigned line_stipple_pattern
:16;
162 * Replace the given TEXCOORD inputs with point coordinates, max. 8 inputs.
163 * If TEXCOORD (including PCOORD) are unsupported, replace GENERIC inputs
164 * instead. Max. 9 inputs: 8x GENERIC to emulate TEXCOORD, and 1x GENERIC
167 uint16_t sprite_coord_enable
; /* 0-7: TEXCOORD/GENERIC, 8: PCOORD */
170 float point_size
; /**< used when no per-vertex size */
177 struct pipe_poly_stipple
179 unsigned stipple
[32];
183 struct pipe_viewport_state
190 struct pipe_scissor_state
199 struct pipe_clip_state
201 float ucp
[PIPE_MAX_CLIP_PLANES
][4];
205 * A single output for vertex transform feedback.
207 struct pipe_stream_output
209 unsigned register_index
:6; /**< 0 to 63 (OUT index) */
210 unsigned start_component
:2; /** 0 to 3 */
211 unsigned num_components
:3; /** 1 to 4 */
212 unsigned output_buffer
:3; /**< 0 to PIPE_MAX_SO_BUFFERS */
213 unsigned dst_offset
:16; /**< offset into the buffer in dwords */
214 unsigned stream
:2; /**< 0 to 3 */
218 * Stream output for vertex transform feedback.
220 struct pipe_stream_output_info
222 unsigned num_outputs
;
223 /** stride for an entire vertex for each buffer in dwords */
224 uint16_t stride
[PIPE_MAX_SO_BUFFERS
];
227 * Array of stream outputs, in the order they are to be written in.
228 * Selected components are tightly packed into the output buffer.
230 struct pipe_stream_output output
[PIPE_MAX_SO_OUTPUTS
];
234 * The 'type' parameter identifies whether the shader state contains TGSI
235 * tokens, etc. If the driver returns 'PIPE_SHADER_IR_TGSI' for the
236 * 'PIPE_SHADER_CAP_PREFERRED_IR' shader param, the ir will *always* be
237 * 'PIPE_SHADER_IR_TGSI' and the tokens ptr will be valid. If the driver
238 * requests a different 'pipe_shader_ir' type, then it must check the 'type'
239 * enum to see if it is getting TGSI tokens or its preferred IR.
241 * TODO pipe_compute_state should probably get similar treatment to handle
242 * multiple IR's in a cleaner way..
244 * NOTE: since it is expected that the consumer will want to perform
245 * additional passes on the nir_shader, the driver takes ownership of
246 * the nir_shader. If state trackers need to hang on to the IR (for
247 * example, variant management), it should use nir_shader_clone().
249 struct pipe_shader_state
251 enum pipe_shader_ir type
;
252 /* TODO move tokens into union. */
253 const struct tgsi_token
*tokens
;
259 struct pipe_stream_output_info stream_output
;
263 pipe_shader_state_from_tgsi(struct pipe_shader_state
*state
,
264 const struct tgsi_token
*tokens
)
266 state
->type
= PIPE_SHADER_IR_TGSI
;
267 state
->tokens
= tokens
;
268 memset(&state
->stream_output
, 0, sizeof(state
->stream_output
));
271 struct pipe_depth_state
273 unsigned enabled
:1; /**< depth test enabled? */
274 unsigned writemask
:1; /**< allow depth buffer writes? */
275 unsigned func
:3; /**< depth test func (PIPE_FUNC_x) */
276 unsigned bounds_test
:1; /**< depth bounds test enabled? */
277 float bounds_min
; /**< minimum depth bound */
278 float bounds_max
; /**< maximum depth bound */
282 struct pipe_stencil_state
284 unsigned enabled
:1; /**< stencil[0]: stencil enabled, stencil[1]: two-side enabled */
285 unsigned func
:3; /**< PIPE_FUNC_x */
286 unsigned fail_op
:3; /**< PIPE_STENCIL_OP_x */
287 unsigned zpass_op
:3; /**< PIPE_STENCIL_OP_x */
288 unsigned zfail_op
:3; /**< PIPE_STENCIL_OP_x */
289 unsigned valuemask
:8;
290 unsigned writemask
:8;
294 struct pipe_alpha_state
297 unsigned func
:3; /**< PIPE_FUNC_x */
298 float ref_value
; /**< reference value */
302 struct pipe_depth_stencil_alpha_state
304 struct pipe_depth_state depth
;
305 struct pipe_stencil_state stencil
[2]; /**< [0] = front, [1] = back */
306 struct pipe_alpha_state alpha
;
310 struct pipe_rt_blend_state
312 unsigned blend_enable
:1;
314 unsigned rgb_func
:3; /**< PIPE_BLEND_x */
315 unsigned rgb_src_factor
:5; /**< PIPE_BLENDFACTOR_x */
316 unsigned rgb_dst_factor
:5; /**< PIPE_BLENDFACTOR_x */
318 unsigned alpha_func
:3; /**< PIPE_BLEND_x */
319 unsigned alpha_src_factor
:5; /**< PIPE_BLENDFACTOR_x */
320 unsigned alpha_dst_factor
:5; /**< PIPE_BLENDFACTOR_x */
322 unsigned colormask
:4; /**< bitmask of PIPE_MASK_R/G/B/A */
326 struct pipe_blend_state
328 unsigned independent_blend_enable
:1;
329 unsigned logicop_enable
:1;
330 unsigned logicop_func
:4; /**< PIPE_LOGICOP_x */
332 unsigned alpha_to_coverage
:1;
333 unsigned alpha_to_one
:1;
334 struct pipe_rt_blend_state rt
[PIPE_MAX_COLOR_BUFS
];
338 struct pipe_blend_color
344 struct pipe_stencil_ref
351 * Note that pipe_surfaces are "texture views for rendering"
352 * and so in the case of ARB_framebuffer_no_attachment there
353 * is no pipe_surface state available such that we may
354 * extract the number of samples and layers.
356 struct pipe_framebuffer_state
358 uint16_t width
, height
;
359 uint16_t layers
; /**< Number of layers in a no-attachment framebuffer */
360 ubyte samples
; /**< Number of samples in a no-attachment framebuffer */
362 /** multiple color buffers for multiple render targets */
364 struct pipe_surface
*cbufs
[PIPE_MAX_COLOR_BUFS
];
366 struct pipe_surface
*zsbuf
; /**< Z/stencil buffer */
371 * Texture sampler state.
373 struct pipe_sampler_state
375 unsigned wrap_s
:3; /**< PIPE_TEX_WRAP_x */
376 unsigned wrap_t
:3; /**< PIPE_TEX_WRAP_x */
377 unsigned wrap_r
:3; /**< PIPE_TEX_WRAP_x */
378 unsigned min_img_filter
:1; /**< PIPE_TEX_FILTER_x */
379 unsigned min_mip_filter
:2; /**< PIPE_TEX_MIPFILTER_x */
380 unsigned mag_img_filter
:1; /**< PIPE_TEX_FILTER_x */
381 unsigned compare_mode
:1; /**< PIPE_TEX_COMPARE_x */
382 unsigned compare_func
:3; /**< PIPE_FUNC_x */
383 unsigned normalized_coords
:1; /**< Are coords normalized to [0,1]? */
384 unsigned max_anisotropy
:5;
385 unsigned seamless_cube_map
:1;
386 float lod_bias
; /**< LOD/lambda bias */
387 float min_lod
, max_lod
; /**< LOD clamp range, after bias */
388 union pipe_color_union border_color
;
391 union pipe_surface_desc
{
394 unsigned first_layer
:16;
395 unsigned last_layer
:16;
398 unsigned first_element
;
399 unsigned last_element
;
404 * A view into a texture that can be bound to a color render target /
405 * depth stencil attachment point.
409 struct pipe_reference reference
;
410 enum pipe_format format
:16;
411 unsigned writable
:1; /**< writable shader resource */
412 struct pipe_resource
*texture
; /**< resource into which this is a view */
413 struct pipe_context
*context
; /**< context this surface belongs to */
415 /* XXX width/height should be removed */
416 uint16_t width
; /**< logical width in pixels */
417 uint16_t height
; /**< logical height in pixels */
419 union pipe_surface_desc u
;
424 * A view into a texture that can be bound to a shader stage.
426 struct pipe_sampler_view
428 struct pipe_reference reference
;
429 enum pipe_format format
:16; /**< typed PIPE_FORMAT_x */
430 enum pipe_texture_target target
:4; /**< PIPE_TEXTURE_x */
431 unsigned swizzle_r
:3; /**< PIPE_SWIZZLE_x for red component */
432 unsigned swizzle_g
:3; /**< PIPE_SWIZZLE_x for green component */
433 unsigned swizzle_b
:3; /**< PIPE_SWIZZLE_x for blue component */
434 unsigned swizzle_a
:3; /**< PIPE_SWIZZLE_x for alpha component */
435 struct pipe_resource
*texture
; /**< texture into which this is a view */
436 struct pipe_context
*context
; /**< context this view belongs to */
439 unsigned first_layer
:16; /**< first layer to use for array textures */
440 unsigned last_layer
:16; /**< last layer to use for array textures */
441 unsigned first_level
:8; /**< first mipmap level to use */
442 unsigned last_level
:8; /**< last mipmap level to use */
445 unsigned offset
; /**< offset in bytes */
446 unsigned size
; /**< size of the readable sub-range in bytes */
453 * A description of a buffer or texture image that can be bound to a shader
456 struct pipe_image_view
458 struct pipe_resource
*resource
; /**< resource into which this is a view */
459 enum pipe_format format
; /**< typed PIPE_FORMAT_x */
460 unsigned access
; /**< PIPE_IMAGE_ACCESS_x */
464 unsigned first_layer
:16; /**< first layer to use for array textures */
465 unsigned last_layer
:16; /**< last layer to use for array textures */
466 unsigned level
:8; /**< mipmap level to use */
469 unsigned offset
; /**< offset in bytes */
470 unsigned size
; /**< size of the accessible sub-range in bytes */
477 * Subregion of 1D/2D/3D image resource.
481 /* Fields only used by textures use int16_t instead of int.
482 * x and width are used by buffers, so they need the full 32-bit range.
494 * A memory object/resource such as a vertex buffer or texture.
498 struct pipe_reference reference
;
499 struct pipe_screen
*screen
; /**< screen that this texture belongs to */
501 unsigned width0
; /**< Used by both buffers and textures. */
502 uint16_t height0
; /* Textures: The maximum height/depth/array_size is 16k. */
506 enum pipe_format format
:16; /**< PIPE_FORMAT_x */
507 enum pipe_texture_target target
:8; /**< PIPE_TEXTURE_x */
508 unsigned last_level
:8; /**< Index of last mipmap level present/defined */
509 unsigned nr_samples
:8; /**< for multisampled surfaces, nr of samples */
510 unsigned usage
:8; /**< PIPE_USAGE_x (not a bitmask) */
512 unsigned bind
; /**< bitmask of PIPE_BIND_x */
513 unsigned flags
; /**< bitmask of PIPE_RESOURCE_FLAG_x */
516 * For planar images, ie. YUV EGLImage external, etc, pointer to the
519 struct pipe_resource
*next
;
524 * Transfer object. For data transfer to/from a resource.
528 struct pipe_resource
*resource
; /**< resource to transfer to/from */
529 unsigned level
; /**< texture mipmap level */
530 enum pipe_transfer_usage usage
;
531 struct pipe_box box
; /**< region of the resource to access */
532 unsigned stride
; /**< row stride in bytes */
533 unsigned layer_stride
; /**< image/layer stride in bytes */
539 * A vertex buffer. Typically, all the vertex data/attributes for
540 * drawing something will be in one buffer. But it's also possible, for
541 * example, to put colors in one buffer and texcoords in another.
543 struct pipe_vertex_buffer
545 unsigned stride
; /**< stride to same attrib in next vertex, in bytes */
546 unsigned buffer_offset
; /**< offset to start of data in buffer, in bytes */
547 struct pipe_resource
*buffer
; /**< the actual buffer */
548 const void *user_buffer
; /**< pointer to a user buffer if buffer == NULL */
553 * A constant buffer. A subrange of an existing buffer can be set
554 * as a constant buffer.
556 struct pipe_constant_buffer
558 struct pipe_resource
*buffer
; /**< the actual buffer */
559 unsigned buffer_offset
; /**< offset to start of data in buffer, in bytes */
560 unsigned buffer_size
; /**< how much data can be read in shader */
561 const void *user_buffer
; /**< pointer to a user buffer if buffer == NULL */
566 * An untyped shader buffer supporting loads, stores, and atomics.
568 struct pipe_shader_buffer
{
569 struct pipe_resource
*buffer
; /**< the actual buffer */
570 unsigned buffer_offset
; /**< offset to start of data in buffer, in bytes */
571 unsigned buffer_size
; /**< how much data can be read in shader */
576 * A stream output target. The structure specifies the range vertices can
579 * In addition to that, the structure should internally maintain the offset
580 * into the buffer, which should be incremented everytime something is written
581 * (appended) to it. The internal offset is buffer_offset + how many bytes
582 * have been written. The internal offset can be stored on the device
583 * and the CPU actually doesn't have to query it.
585 * Note that the buffer_size variable is actually specifying the available
586 * space in the buffer, not the size of the attached buffer.
587 * In other words in majority of cases buffer_size would simply be
588 * 'buffer->width0 - buffer_offset', so buffer_size refers to the size
589 * of the buffer left, after accounting for buffer offset, for stream output
592 * Use PIPE_QUERY_SO_STATISTICS to know how many primitives have
593 * actually been written.
595 struct pipe_stream_output_target
597 struct pipe_reference reference
;
598 struct pipe_resource
*buffer
; /**< the output buffer */
599 struct pipe_context
*context
; /**< context this SO target belongs to */
601 unsigned buffer_offset
; /**< offset where data should be written, in bytes */
602 unsigned buffer_size
; /**< how much data is allowed to be written */
607 * Information to describe a vertex attribute (position, color, etc)
609 struct pipe_vertex_element
611 /** Offset of this attribute, in bytes, from the start of the vertex */
612 unsigned src_offset
:16;
614 /** Which vertex_buffer (as given to pipe->set_vertex_buffer()) does
615 * this attribute live in?
617 unsigned vertex_buffer_index
:5;
619 enum pipe_format src_format
:11;
621 /** Instance data rate divisor. 0 means this is per-vertex data,
622 * n means per-instance data used for n consecutive instances (n > 0).
624 unsigned instance_divisor
;
629 * An index buffer. When an index buffer is bound, all indices to vertices
630 * will be looked up in the buffer.
632 struct pipe_index_buffer
634 unsigned index_size
; /**< size of an index, in bytes */
635 unsigned offset
; /**< offset to start of data in buffer, in bytes */
636 struct pipe_resource
*buffer
; /**< the actual buffer */
637 const void *user_buffer
; /**< pointer to a user buffer if buffer == NULL */
642 * Information to describe a draw_vbo call.
644 struct pipe_draw_info
646 boolean indexed
; /**< use index buffer */
647 enum pipe_prim_type mode
:8; /**< the mode of the primitive */
648 boolean primitive_restart
;
649 ubyte vertices_per_patch
; /**< the number of vertices per patch */
651 unsigned start
; /**< the index of the first vertex */
652 unsigned count
; /**< number of vertices */
654 unsigned start_instance
; /**< first instance id */
655 unsigned instance_count
; /**< number of instances */
657 unsigned drawid
; /**< id of this draw in a multidraw */
660 * For indexed drawing, these fields apply after index lookup.
662 int index_bias
; /**< a bias to be added to each index */
663 unsigned min_index
; /**< the min index */
664 unsigned max_index
; /**< the max index */
667 * Primitive restart enable/index (only applies to indexed drawing)
669 unsigned restart_index
;
671 unsigned indirect_offset
; /**< must be 4 byte aligned */
672 unsigned indirect_stride
; /**< must be 4 byte aligned */
673 unsigned indirect_count
; /**< number of indirect draws */
675 unsigned indirect_params_offset
; /**< must be 4 byte aligned */
677 /* Pointers must be at the end for an optimal structure layout on 64-bit. */
679 /* Indirect draw parameters resource: If not NULL, most values are taken
680 * from this buffer instead, which is laid out as follows:
682 * if indexed is TRUE:
685 * uint32_t instance_count;
687 * int32_t index_bias;
688 * uint32_t start_instance;
693 * uint32_t instance_count;
695 * uint32_t start_instance;
698 struct pipe_resource
*indirect
;
700 /* Indirect draw count resource: If not NULL, contains a 32-bit value which
701 * is to be used as the real indirect_count. In that case indirect_count
702 * becomes the maximum possible value.
704 struct pipe_resource
*indirect_params
;
707 * Stream output target. If not NULL, it's used to provide the 'count'
708 * parameter based on the number vertices captured by the stream output
709 * stage. (or generally, based on the number of bytes captured)
711 * Only 'mode', 'start_instance', and 'instance_count' are taken into
712 * account, all the other variables from pipe_draw_info are ignored.
714 * 'start' is implicitly 0 and 'count' is set as discussed above.
715 * The draw command is non-indexed.
717 * Note that this only provides the count. The vertex buffers must
718 * be set via set_vertex_buffers manually.
720 struct pipe_stream_output_target
*count_from_stream_output
;
725 * Information to describe a blit call.
727 struct pipe_blit_info
730 struct pipe_resource
*resource
;
732 struct pipe_box box
; /**< negative width, height only legal for src */
733 /* For pipe_surface-like format casting: */
734 enum pipe_format format
; /**< must be supported for sampling (src)
735 or rendering (dst), ZS is always supported */
738 unsigned mask
; /**< bitmask of PIPE_MASK_R/G/B/A/Z/S */
739 unsigned filter
; /**< PIPE_TEX_FILTER_* */
741 boolean scissor_enable
;
742 struct pipe_scissor_state scissor
;
744 /* Window rectangles can either be inclusive or exclusive. */
745 boolean window_rectangle_include
;
746 unsigned num_window_rectangles
;
747 struct pipe_scissor_state window_rectangles
[PIPE_MAX_WINDOW_RECTANGLES
];
749 boolean render_condition_enable
; /**< whether the blit should honor the
750 current render condition */
751 boolean alpha_blend
; /* dst.rgb = src.rgb * src.a + dst.rgb * (1 - src.a) */
755 * Information to describe a launch_grid call.
757 struct pipe_grid_info
760 * For drivers that use PIPE_SHADER_IR_LLVM as their prefered IR, this value
761 * will be the index of the kernel in the opencl.kernels metadata list.
766 * Will be used to initialize the INPUT resource, and it should point to a
767 * buffer of at least pipe_compute_state::req_input_mem bytes.
772 * Grid number of dimensions, 1-3, e.g. the work_dim parameter passed to
773 * clEnqueueNDRangeKernel. Note block[] and grid[] must be padded with
774 * 1 for non-used dimensions.
779 * Determine the layout of the working block (in thread units) to be used.
784 * Determine the layout of the grid (in block units) to be used.
788 /* Indirect compute parameters resource: If not NULL, block sizes are taken
789 * from this buffer instead, which is laid out as follows:
792 * uint32_t num_blocks_x;
793 * uint32_t num_blocks_y;
794 * uint32_t num_blocks_z;
797 struct pipe_resource
*indirect
;
798 unsigned indirect_offset
; /**< must be 4 byte aligned */
802 * Structure used as a header for serialized LLVM programs.
804 struct pipe_llvm_program_header
806 uint32_t num_bytes
; /**< Number of bytes in the LLVM bytecode program. */
809 struct pipe_compute_state
811 enum pipe_shader_ir ir_type
; /**< IR type contained in prog. */
812 const void *prog
; /**< Compute program to be executed. */
813 unsigned req_local_mem
; /**< Required size of the LOCAL resource. */
814 unsigned req_private_mem
; /**< Required size of the PRIVATE resource. */
815 unsigned req_input_mem
; /**< Required size of the INPUT resource. */
819 * Structure that contains a callback for debug messages from the driver back
820 * to the state tracker.
822 struct pipe_debug_callback
825 * When set to \c true, the callback may be called asynchronously from a
826 * driver-created thread.
831 * Callback for the driver to report debug/performance/etc information back
832 * to the state tracker.
834 * \param data user-supplied data pointer
835 * \param id message type identifier, if pointed value is 0, then a
837 * \param type PIPE_DEBUG_TYPE_*
838 * \param format printf-style format string
839 * \param args args for format string
841 void (*debug_message
)(void *data
,
843 enum pipe_debug_type type
,
850 * Structure that contains a callback for device reset messages from the driver
851 * back to the state tracker.
853 * The callback must not be called from driver-created threads.
855 struct pipe_device_reset_callback
858 * Callback for the driver to report when a device reset is detected.
860 * \param data user-supplied data pointer
861 * \param status PIPE_*_RESET
863 void (*reset
)(void *data
, enum pipe_reset_status status
);
869 * Information about memory usage. All sizes are in kilobytes.
871 struct pipe_memory_info
873 unsigned total_device_memory
; /**< size of device memory, e.g. VRAM */
874 unsigned avail_device_memory
; /**< free device memory at the moment */
875 unsigned total_staging_memory
; /**< size of staging memory, e.g. GART */
876 unsigned avail_staging_memory
; /**< free staging memory at the moment */
877 unsigned device_memory_evicted
; /**< size of memory evicted (monotonic counter) */
878 unsigned nr_device_memory_evictions
; /**< # of evictions (monotonic counter) */