1 /**************************************************************************
3 * Copyright 2007 VMware, Inc.
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26 **************************************************************************/
32 * Abstract graphics pipe state objects.
35 * 1. Want compact representations, so we use bitfields.
36 * 2. Put bitfields before other (GLfloat) fields.
37 * 3. enum bitfields need to be at least one bit extra in size so the most
38 * significant bit is zero. MSVC treats enums as signed so if the high
39 * bit is set, the value will be interpreted as a negative number.
40 * That causes trouble in various places.
47 #include "p_compiler.h"
48 #include "p_defines.h"
58 * Implementation limits
60 #define PIPE_MAX_ATTRIBS 32
61 #define PIPE_MAX_CLIP_PLANES 8
62 #define PIPE_MAX_COLOR_BUFS 8
63 #define PIPE_MAX_CONSTANT_BUFFERS 32
64 #define PIPE_MAX_SAMPLERS 32
65 #define PIPE_MAX_SHADER_INPUTS 80 /* 32 GENERIC + 32 PATCH + 16 others */
66 #define PIPE_MAX_SHADER_OUTPUTS 80 /* 32 GENERIC + 32 PATCH + 16 others */
67 #define PIPE_MAX_SHADER_SAMPLER_VIEWS 32
68 #define PIPE_MAX_SHADER_BUFFERS 32
69 #define PIPE_MAX_SHADER_IMAGES 32
70 #define PIPE_MAX_TEXTURE_LEVELS 16
71 #define PIPE_MAX_SO_BUFFERS 4
72 #define PIPE_MAX_SO_OUTPUTS 64
73 #define PIPE_MAX_VIEWPORTS 16
74 #define PIPE_MAX_CLIP_OR_CULL_DISTANCE_COUNT 8
75 #define PIPE_MAX_CLIP_OR_CULL_DISTANCE_ELEMENT_COUNT 2
76 #define PIPE_MAX_WINDOW_RECTANGLES 8
78 #define PIPE_MAX_HW_ATOMIC_BUFFERS 32
82 int32_t count
; /* atomic */
88 * Primitive (point/line/tri) rasterization info
90 struct pipe_rasterizer_state
93 unsigned light_twoside
:1;
94 unsigned clamp_vertex_color
:1;
95 unsigned clamp_fragment_color
:1;
97 unsigned cull_face
:2; /**< PIPE_FACE_x */
98 unsigned fill_front
:2; /**< PIPE_POLYGON_MODE_x */
99 unsigned fill_back
:2; /**< PIPE_POLYGON_MODE_x */
100 unsigned offset_point
:1;
101 unsigned offset_line
:1;
102 unsigned offset_tri
:1;
104 unsigned poly_smooth
:1;
105 unsigned poly_stipple_enable
:1;
106 unsigned point_smooth
:1;
107 unsigned sprite_coord_mode
:1; /**< PIPE_SPRITE_COORD_ */
108 unsigned point_quad_rasterization
:1; /** points rasterized as quads or points */
109 unsigned point_tri_clip
:1; /** large points clipped as tris or points */
110 unsigned point_size_per_vertex
:1; /**< size computed in vertex shader */
111 unsigned multisample
:1; /* XXX maybe more ms state in future */
112 unsigned force_persample_interp
:1;
113 unsigned line_smooth
:1;
114 unsigned line_stipple_enable
:1;
115 unsigned line_last_pixel
:1;
118 * Use the first vertex of a primitive as the provoking vertex for
121 unsigned flatshade_first
:1;
123 unsigned half_pixel_center
:1;
124 unsigned bottom_edge_rule
:1;
127 * When true, rasterization is disabled and no pixels are written.
128 * This only makes sense with the Stream Out functionality.
130 unsigned rasterizer_discard
:1;
133 * Exposed by PIPE_CAP_TILE_RASTER_ORDER. When true,
134 * tile_raster_order_increasing_* indicate the order that the rasterizer
135 * should render tiles, to meet the requirements of
136 * GL_MESA_tile_raster_order.
138 unsigned tile_raster_order_fixed
:1;
139 unsigned tile_raster_order_increasing_x
:1;
140 unsigned tile_raster_order_increasing_y
:1;
143 * When false, depth clipping is disabled and the depth value will be
144 * clamped later at the per-pixel level before depth testing.
145 * This depends on PIPE_CAP_DEPTH_CLIP_DISABLE.
147 unsigned depth_clip
:1;
150 * When true clip space in the z axis goes from [0..1] (D3D). When false
153 * NOTE: D3D will always use depth clamping.
155 unsigned clip_halfz
:1;
158 * When true do not scale offset_units and use same rules for unorm and
159 * float depth buffers (D3D9). When false use GL/D3D1X behaviour.
160 * This depends on PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED.
162 unsigned offset_units_unscaled
:1;
165 * Enable bits for clipping half-spaces.
166 * This applies to both user clip planes and shader clip distances.
167 * Note that if the bound shader exports any clip distances, these
168 * replace all user clip planes, and clip half-spaces enabled here
169 * but not written by the shader count as disabled.
171 unsigned clip_plane_enable
:PIPE_MAX_CLIP_PLANES
;
173 unsigned line_stipple_factor
:8; /**< [1..256] actually */
174 unsigned line_stipple_pattern
:16;
177 * Replace the given TEXCOORD inputs with point coordinates, max. 8 inputs.
178 * If TEXCOORD (including PCOORD) are unsupported, replace GENERIC inputs
179 * instead. Max. 9 inputs: 8x GENERIC to emulate TEXCOORD, and 1x GENERIC
182 uint16_t sprite_coord_enable
; /* 0-7: TEXCOORD/GENERIC, 8: PCOORD */
185 float point_size
; /**< used when no per-vertex size */
192 struct pipe_poly_stipple
194 unsigned stipple
[32];
198 struct pipe_viewport_state
205 struct pipe_scissor_state
214 struct pipe_clip_state
216 float ucp
[PIPE_MAX_CLIP_PLANES
][4];
220 * A single output for vertex transform feedback.
222 struct pipe_stream_output
224 unsigned register_index
:6; /**< 0 to 63 (OUT index) */
225 unsigned start_component
:2; /** 0 to 3 */
226 unsigned num_components
:3; /** 1 to 4 */
227 unsigned output_buffer
:3; /**< 0 to PIPE_MAX_SO_BUFFERS */
228 unsigned dst_offset
:16; /**< offset into the buffer in dwords */
229 unsigned stream
:2; /**< 0 to 3 */
233 * Stream output for vertex transform feedback.
235 struct pipe_stream_output_info
237 unsigned num_outputs
;
238 /** stride for an entire vertex for each buffer in dwords */
239 uint16_t stride
[PIPE_MAX_SO_BUFFERS
];
242 * Array of stream outputs, in the order they are to be written in.
243 * Selected components are tightly packed into the output buffer.
245 struct pipe_stream_output output
[PIPE_MAX_SO_OUTPUTS
];
249 * The 'type' parameter identifies whether the shader state contains TGSI
250 * tokens, etc. If the driver returns 'PIPE_SHADER_IR_TGSI' for the
251 * 'PIPE_SHADER_CAP_PREFERRED_IR' shader param, the ir will *always* be
252 * 'PIPE_SHADER_IR_TGSI' and the tokens ptr will be valid. If the driver
253 * requests a different 'pipe_shader_ir' type, then it must check the 'type'
254 * enum to see if it is getting TGSI tokens or its preferred IR.
256 * TODO pipe_compute_state should probably get similar treatment to handle
257 * multiple IR's in a cleaner way..
259 * NOTE: since it is expected that the consumer will want to perform
260 * additional passes on the nir_shader, the driver takes ownership of
261 * the nir_shader. If state trackers need to hang on to the IR (for
262 * example, variant management), it should use nir_shader_clone().
264 struct pipe_shader_state
266 enum pipe_shader_ir type
;
267 /* TODO move tokens into union. */
268 const struct tgsi_token
*tokens
;
274 struct pipe_stream_output_info stream_output
;
278 pipe_shader_state_from_tgsi(struct pipe_shader_state
*state
,
279 const struct tgsi_token
*tokens
)
281 state
->type
= PIPE_SHADER_IR_TGSI
;
282 state
->tokens
= tokens
;
283 memset(&state
->stream_output
, 0, sizeof(state
->stream_output
));
286 struct pipe_depth_state
288 unsigned enabled
:1; /**< depth test enabled? */
289 unsigned writemask
:1; /**< allow depth buffer writes? */
290 unsigned func
:3; /**< depth test func (PIPE_FUNC_x) */
291 unsigned bounds_test
:1; /**< depth bounds test enabled? */
292 float bounds_min
; /**< minimum depth bound */
293 float bounds_max
; /**< maximum depth bound */
297 struct pipe_stencil_state
299 unsigned enabled
:1; /**< stencil[0]: stencil enabled, stencil[1]: two-side enabled */
300 unsigned func
:3; /**< PIPE_FUNC_x */
301 unsigned fail_op
:3; /**< PIPE_STENCIL_OP_x */
302 unsigned zpass_op
:3; /**< PIPE_STENCIL_OP_x */
303 unsigned zfail_op
:3; /**< PIPE_STENCIL_OP_x */
304 unsigned valuemask
:8;
305 unsigned writemask
:8;
309 struct pipe_alpha_state
312 unsigned func
:3; /**< PIPE_FUNC_x */
313 float ref_value
; /**< reference value */
317 struct pipe_depth_stencil_alpha_state
319 struct pipe_depth_state depth
;
320 struct pipe_stencil_state stencil
[2]; /**< [0] = front, [1] = back */
321 struct pipe_alpha_state alpha
;
325 struct pipe_rt_blend_state
327 unsigned blend_enable
:1;
329 unsigned rgb_func
:3; /**< PIPE_BLEND_x */
330 unsigned rgb_src_factor
:5; /**< PIPE_BLENDFACTOR_x */
331 unsigned rgb_dst_factor
:5; /**< PIPE_BLENDFACTOR_x */
333 unsigned alpha_func
:3; /**< PIPE_BLEND_x */
334 unsigned alpha_src_factor
:5; /**< PIPE_BLENDFACTOR_x */
335 unsigned alpha_dst_factor
:5; /**< PIPE_BLENDFACTOR_x */
337 unsigned colormask
:4; /**< bitmask of PIPE_MASK_R/G/B/A */
341 struct pipe_blend_state
343 unsigned independent_blend_enable
:1;
344 unsigned logicop_enable
:1;
345 unsigned logicop_func
:4; /**< PIPE_LOGICOP_x */
347 unsigned alpha_to_coverage
:1;
348 unsigned alpha_to_one
:1;
349 struct pipe_rt_blend_state rt
[PIPE_MAX_COLOR_BUFS
];
353 struct pipe_blend_color
359 struct pipe_stencil_ref
366 * Note that pipe_surfaces are "texture views for rendering"
367 * and so in the case of ARB_framebuffer_no_attachment there
368 * is no pipe_surface state available such that we may
369 * extract the number of samples and layers.
371 struct pipe_framebuffer_state
373 uint16_t width
, height
;
374 uint16_t layers
; /**< Number of layers in a no-attachment framebuffer */
375 ubyte samples
; /**< Number of samples in a no-attachment framebuffer */
377 /** multiple color buffers for multiple render targets */
379 struct pipe_surface
*cbufs
[PIPE_MAX_COLOR_BUFS
];
381 struct pipe_surface
*zsbuf
; /**< Z/stencil buffer */
386 * Texture sampler state.
388 struct pipe_sampler_state
390 unsigned wrap_s
:3; /**< PIPE_TEX_WRAP_x */
391 unsigned wrap_t
:3; /**< PIPE_TEX_WRAP_x */
392 unsigned wrap_r
:3; /**< PIPE_TEX_WRAP_x */
393 unsigned min_img_filter
:1; /**< PIPE_TEX_FILTER_x */
394 unsigned min_mip_filter
:2; /**< PIPE_TEX_MIPFILTER_x */
395 unsigned mag_img_filter
:1; /**< PIPE_TEX_FILTER_x */
396 unsigned compare_mode
:1; /**< PIPE_TEX_COMPARE_x */
397 unsigned compare_func
:3; /**< PIPE_FUNC_x */
398 unsigned normalized_coords
:1; /**< Are coords normalized to [0,1]? */
399 unsigned max_anisotropy
:5;
400 unsigned seamless_cube_map
:1;
401 float lod_bias
; /**< LOD/lambda bias */
402 float min_lod
, max_lod
; /**< LOD clamp range, after bias */
403 union pipe_color_union border_color
;
406 union pipe_surface_desc
{
409 unsigned first_layer
:16;
410 unsigned last_layer
:16;
413 unsigned first_element
;
414 unsigned last_element
;
419 * A view into a texture that can be bound to a color render target /
420 * depth stencil attachment point.
424 struct pipe_reference reference
;
425 enum pipe_format format
:16;
426 unsigned writable
:1; /**< writable shader resource */
427 struct pipe_resource
*texture
; /**< resource into which this is a view */
428 struct pipe_context
*context
; /**< context this surface belongs to */
430 /* XXX width/height should be removed */
431 uint16_t width
; /**< logical width in pixels */
432 uint16_t height
; /**< logical height in pixels */
434 union pipe_surface_desc u
;
439 * A view into a texture that can be bound to a shader stage.
441 struct pipe_sampler_view
443 struct pipe_reference reference
;
444 enum pipe_format format
:15; /**< typed PIPE_FORMAT_x */
445 enum pipe_texture_target target
:5; /**< PIPE_TEXTURE_x */
446 unsigned swizzle_r
:3; /**< PIPE_SWIZZLE_x for red component */
447 unsigned swizzle_g
:3; /**< PIPE_SWIZZLE_x for green component */
448 unsigned swizzle_b
:3; /**< PIPE_SWIZZLE_x for blue component */
449 unsigned swizzle_a
:3; /**< PIPE_SWIZZLE_x for alpha component */
450 struct pipe_resource
*texture
; /**< texture into which this is a view */
451 struct pipe_context
*context
; /**< context this view belongs to */
454 unsigned first_layer
:16; /**< first layer to use for array textures */
455 unsigned last_layer
:16; /**< last layer to use for array textures */
456 unsigned first_level
:8; /**< first mipmap level to use */
457 unsigned last_level
:8; /**< last mipmap level to use */
460 unsigned offset
; /**< offset in bytes */
461 unsigned size
; /**< size of the readable sub-range in bytes */
468 * A description of a buffer or texture image that can be bound to a shader
471 struct pipe_image_view
473 struct pipe_resource
*resource
; /**< resource into which this is a view */
474 enum pipe_format format
; /**< typed PIPE_FORMAT_x */
475 unsigned access
; /**< PIPE_IMAGE_ACCESS_x */
479 unsigned first_layer
:16; /**< first layer to use for array textures */
480 unsigned last_layer
:16; /**< last layer to use for array textures */
481 unsigned level
:8; /**< mipmap level to use */
484 unsigned offset
; /**< offset in bytes */
485 unsigned size
; /**< size of the accessible sub-range in bytes */
492 * Subregion of 1D/2D/3D image resource.
496 /* Fields only used by textures use int16_t instead of int.
497 * x and width are used by buffers, so they need the full 32-bit range.
509 * A memory object/resource such as a vertex buffer or texture.
513 struct pipe_reference reference
;
514 struct pipe_screen
*screen
; /**< screen that this texture belongs to */
516 unsigned width0
; /**< Used by both buffers and textures. */
517 uint16_t height0
; /* Textures: The maximum height/depth/array_size is 16k. */
521 enum pipe_format format
:16; /**< PIPE_FORMAT_x */
522 enum pipe_texture_target target
:8; /**< PIPE_TEXTURE_x */
523 unsigned last_level
:8; /**< Index of last mipmap level present/defined */
524 unsigned nr_samples
:8; /**< for multisampled surfaces, nr of samples */
525 unsigned usage
:8; /**< PIPE_USAGE_x (not a bitmask) */
527 unsigned bind
; /**< bitmask of PIPE_BIND_x */
528 unsigned flags
; /**< bitmask of PIPE_RESOURCE_FLAG_x */
531 * For planar images, ie. YUV EGLImage external, etc, pointer to the
534 struct pipe_resource
*next
;
539 * Transfer object. For data transfer to/from a resource.
543 struct pipe_resource
*resource
; /**< resource to transfer to/from */
544 unsigned level
; /**< texture mipmap level */
545 enum pipe_transfer_usage usage
;
546 struct pipe_box box
; /**< region of the resource to access */
547 unsigned stride
; /**< row stride in bytes */
548 unsigned layer_stride
; /**< image/layer stride in bytes */
553 * A vertex buffer. Typically, all the vertex data/attributes for
554 * drawing something will be in one buffer. But it's also possible, for
555 * example, to put colors in one buffer and texcoords in another.
557 struct pipe_vertex_buffer
559 uint16_t stride
; /**< stride to same attrib in next vertex, in bytes */
561 unsigned buffer_offset
; /**< offset to start of data in buffer, in bytes */
564 struct pipe_resource
*resource
; /**< the actual buffer */
565 const void *user
; /**< pointer to a user buffer */
571 * A constant buffer. A subrange of an existing buffer can be set
572 * as a constant buffer.
574 struct pipe_constant_buffer
576 struct pipe_resource
*buffer
; /**< the actual buffer */
577 unsigned buffer_offset
; /**< offset to start of data in buffer, in bytes */
578 unsigned buffer_size
; /**< how much data can be read in shader */
579 const void *user_buffer
; /**< pointer to a user buffer if buffer == NULL */
584 * An untyped shader buffer supporting loads, stores, and atomics.
586 struct pipe_shader_buffer
{
587 struct pipe_resource
*buffer
; /**< the actual buffer */
588 unsigned buffer_offset
; /**< offset to start of data in buffer, in bytes */
589 unsigned buffer_size
; /**< how much data can be read in shader */
594 * A stream output target. The structure specifies the range vertices can
597 * In addition to that, the structure should internally maintain the offset
598 * into the buffer, which should be incremented everytime something is written
599 * (appended) to it. The internal offset is buffer_offset + how many bytes
600 * have been written. The internal offset can be stored on the device
601 * and the CPU actually doesn't have to query it.
603 * Note that the buffer_size variable is actually specifying the available
604 * space in the buffer, not the size of the attached buffer.
605 * In other words in majority of cases buffer_size would simply be
606 * 'buffer->width0 - buffer_offset', so buffer_size refers to the size
607 * of the buffer left, after accounting for buffer offset, for stream output
610 * Use PIPE_QUERY_SO_STATISTICS to know how many primitives have
611 * actually been written.
613 struct pipe_stream_output_target
615 struct pipe_reference reference
;
616 struct pipe_resource
*buffer
; /**< the output buffer */
617 struct pipe_context
*context
; /**< context this SO target belongs to */
619 unsigned buffer_offset
; /**< offset where data should be written, in bytes */
620 unsigned buffer_size
; /**< how much data is allowed to be written */
625 * Information to describe a vertex attribute (position, color, etc)
627 struct pipe_vertex_element
629 /** Offset of this attribute, in bytes, from the start of the vertex */
630 unsigned src_offset
:16;
632 /** Which vertex_buffer (as given to pipe->set_vertex_buffer()) does
633 * this attribute live in?
635 unsigned vertex_buffer_index
:5;
637 enum pipe_format src_format
:11;
639 /** Instance data rate divisor. 0 means this is per-vertex data,
640 * n means per-instance data used for n consecutive instances (n > 0).
642 unsigned instance_divisor
;
646 struct pipe_draw_indirect_info
648 unsigned offset
; /**< must be 4 byte aligned */
649 unsigned stride
; /**< must be 4 byte aligned */
650 unsigned draw_count
; /**< number of indirect draws */
651 unsigned indirect_draw_count_offset
; /**< must be 4 byte aligned */
653 /* Indirect draw parameters resource is laid out as follows:
655 * if using indexed drawing:
658 * uint32_t instance_count;
660 * int32_t index_bias;
661 * uint32_t start_instance;
666 * uint32_t instance_count;
668 * uint32_t start_instance;
671 struct pipe_resource
*buffer
;
673 /* Indirect draw count resource: If not NULL, contains a 32-bit value which
674 * is to be used as the real draw_count.
676 struct pipe_resource
*indirect_draw_count
;
681 * Information to describe a draw_vbo call.
683 struct pipe_draw_info
685 ubyte index_size
; /**< if 0, the draw is not indexed. */
686 enum pipe_prim_type mode
:8; /**< the mode of the primitive */
687 unsigned primitive_restart
:1;
688 unsigned has_user_indices
:1; /**< if true, use index.user_buffer */
689 ubyte vertices_per_patch
; /**< the number of vertices per patch */
692 * Direct draws: start is the index of the first vertex
693 * Non-indexed indirect draws: not used
694 * Indexed indirect draws: start is added to the indirect start.
697 unsigned count
; /**< number of vertices */
699 unsigned start_instance
; /**< first instance id */
700 unsigned instance_count
; /**< number of instances */
702 unsigned drawid
; /**< id of this draw in a multidraw */
705 * For indexed drawing, these fields apply after index lookup.
707 int index_bias
; /**< a bias to be added to each index */
708 unsigned min_index
; /**< the min index */
709 unsigned max_index
; /**< the max index */
712 * Primitive restart enable/index (only applies to indexed drawing)
714 unsigned restart_index
;
716 /* Pointers must be at the end for an optimal structure layout on 64-bit. */
719 * An index buffer. When an index buffer is bound, all indices to vertices
720 * will be looked up from the buffer.
722 * If has_user_indices, use index.user, else use index.resource.
725 struct pipe_resource
*resource
; /**< real buffer */
726 const void *user
; /**< pointer to a user buffer */
729 struct pipe_draw_indirect_info
*indirect
; /**< Indirect draw. */
732 * Stream output target. If not NULL, it's used to provide the 'count'
733 * parameter based on the number vertices captured by the stream output
734 * stage. (or generally, based on the number of bytes captured)
736 * Only 'mode', 'start_instance', and 'instance_count' are taken into
737 * account, all the other variables from pipe_draw_info are ignored.
739 * 'start' is implicitly 0 and 'count' is set as discussed above.
740 * The draw command is non-indexed.
742 * Note that this only provides the count. The vertex buffers must
743 * be set via set_vertex_buffers manually.
745 struct pipe_stream_output_target
*count_from_stream_output
;
750 * Information to describe a blit call.
752 struct pipe_blit_info
755 struct pipe_resource
*resource
;
757 struct pipe_box box
; /**< negative width, height only legal for src */
758 /* For pipe_surface-like format casting: */
759 enum pipe_format format
; /**< must be supported for sampling (src)
760 or rendering (dst), ZS is always supported */
763 unsigned mask
; /**< bitmask of PIPE_MASK_R/G/B/A/Z/S */
764 unsigned filter
; /**< PIPE_TEX_FILTER_* */
766 boolean scissor_enable
;
767 struct pipe_scissor_state scissor
;
769 /* Window rectangles can either be inclusive or exclusive. */
770 boolean window_rectangle_include
;
771 unsigned num_window_rectangles
;
772 struct pipe_scissor_state window_rectangles
[PIPE_MAX_WINDOW_RECTANGLES
];
774 boolean render_condition_enable
; /**< whether the blit should honor the
775 current render condition */
776 boolean alpha_blend
; /* dst.rgb = src.rgb * src.a + dst.rgb * (1 - src.a) */
780 * Information to describe a launch_grid call.
782 struct pipe_grid_info
785 * For drivers that use PIPE_SHADER_IR_NATIVE as their prefered IR, this
786 * value will be the index of the kernel in the opencl.kernels metadata
792 * Will be used to initialize the INPUT resource, and it should point to a
793 * buffer of at least pipe_compute_state::req_input_mem bytes.
798 * Grid number of dimensions, 1-3, e.g. the work_dim parameter passed to
799 * clEnqueueNDRangeKernel. Note block[] and grid[] must be padded with
800 * 1 for non-used dimensions.
805 * Determine the layout of the working block (in thread units) to be used.
810 * Determine the layout of the grid (in block units) to be used.
814 /* Indirect compute parameters resource: If not NULL, block sizes are taken
815 * from this buffer instead, which is laid out as follows:
818 * uint32_t num_blocks_x;
819 * uint32_t num_blocks_y;
820 * uint32_t num_blocks_z;
823 struct pipe_resource
*indirect
;
824 unsigned indirect_offset
; /**< must be 4 byte aligned */
828 * Structure used as a header for serialized LLVM programs.
830 struct pipe_llvm_program_header
832 uint32_t num_bytes
; /**< Number of bytes in the LLVM bytecode program. */
835 struct pipe_compute_state
837 enum pipe_shader_ir ir_type
; /**< IR type contained in prog. */
838 const void *prog
; /**< Compute program to be executed. */
839 unsigned req_local_mem
; /**< Required size of the LOCAL resource. */
840 unsigned req_private_mem
; /**< Required size of the PRIVATE resource. */
841 unsigned req_input_mem
; /**< Required size of the INPUT resource. */
845 * Structure that contains a callback for debug messages from the driver back
846 * to the state tracker.
848 struct pipe_debug_callback
851 * When set to \c true, the callback may be called asynchronously from a
852 * driver-created thread.
857 * Callback for the driver to report debug/performance/etc information back
858 * to the state tracker.
860 * \param data user-supplied data pointer
861 * \param id message type identifier, if pointed value is 0, then a
863 * \param type PIPE_DEBUG_TYPE_*
864 * \param format printf-style format string
865 * \param args args for format string
867 void (*debug_message
)(void *data
,
869 enum pipe_debug_type type
,
876 * Structure that contains a callback for device reset messages from the driver
877 * back to the state tracker.
879 * The callback must not be called from driver-created threads.
881 struct pipe_device_reset_callback
884 * Callback for the driver to report when a device reset is detected.
886 * \param data user-supplied data pointer
887 * \param status PIPE_*_RESET
889 void (*reset
)(void *data
, enum pipe_reset_status status
);
895 * Information about memory usage. All sizes are in kilobytes.
897 struct pipe_memory_info
899 unsigned total_device_memory
; /**< size of device memory, e.g. VRAM */
900 unsigned avail_device_memory
; /**< free device memory at the moment */
901 unsigned total_staging_memory
; /**< size of staging memory, e.g. GART */
902 unsigned avail_staging_memory
; /**< free staging memory at the moment */
903 unsigned device_memory_evicted
; /**< size of memory evicted (monotonic counter) */
904 unsigned nr_device_memory_evictions
; /**< # of evictions (monotonic counter) */
908 * Structure that contains information about external memory
910 struct pipe_memory_object