1 /**************************************************************************
3 * Copyright 2007 VMware, Inc.
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26 **************************************************************************/
32 * Abstract graphics pipe state objects.
35 * 1. Want compact representations, so we use bitfields.
36 * 2. Put bitfields before other (GLfloat) fields.
37 * 3. enum bitfields need to be at least one bit extra in size so the most
38 * significant bit is zero. MSVC treats enums as signed so if the high
39 * bit is set, the value will be interpreted as a negative number.
40 * That causes trouble in various places.
47 #include "p_compiler.h"
48 #include "p_defines.h"
58 * Implementation limits
60 #define PIPE_MAX_ATTRIBS 32
61 #define PIPE_MAX_CLIP_PLANES 8
62 #define PIPE_MAX_COLOR_BUFS 8
63 #define PIPE_MAX_CONSTANT_BUFFERS 32
64 #define PIPE_MAX_SAMPLERS 32
65 #define PIPE_MAX_SHADER_INPUTS 80 /* 32 GENERIC + 32 PATCH + 16 others */
66 #define PIPE_MAX_SHADER_OUTPUTS 80 /* 32 GENERIC + 32 PATCH + 16 others */
67 #define PIPE_MAX_SHADER_SAMPLER_VIEWS 128
68 #define PIPE_MAX_SHADER_BUFFERS 32
69 #define PIPE_MAX_SHADER_IMAGES 32
70 #define PIPE_MAX_TEXTURE_LEVELS 16
71 #define PIPE_MAX_SO_BUFFERS 4
72 #define PIPE_MAX_SO_OUTPUTS 64
73 #define PIPE_MAX_VIEWPORTS 16
74 #define PIPE_MAX_CLIP_OR_CULL_DISTANCE_COUNT 8
75 #define PIPE_MAX_CLIP_OR_CULL_DISTANCE_ELEMENT_COUNT 2
76 #define PIPE_MAX_WINDOW_RECTANGLES 8
77 #define PIPE_MAX_SAMPLE_LOCATION_GRID_SIZE 4
79 #define PIPE_MAX_HW_ATOMIC_BUFFERS 32
80 #define PIPE_MAX_VERTEX_STREAMS 4
84 int32_t count
; /* atomic */
90 * Primitive (point/line/tri) rasterization info
92 struct pipe_rasterizer_state
95 unsigned light_twoside
:1;
96 unsigned clamp_vertex_color
:1;
97 unsigned clamp_fragment_color
:1;
99 unsigned cull_face
:2; /**< PIPE_FACE_x */
100 unsigned fill_front
:2; /**< PIPE_POLYGON_MODE_x */
101 unsigned fill_back
:2; /**< PIPE_POLYGON_MODE_x */
102 unsigned offset_point
:1;
103 unsigned offset_line
:1;
104 unsigned offset_tri
:1;
106 unsigned poly_smooth
:1;
107 unsigned poly_stipple_enable
:1;
108 unsigned point_smooth
:1;
109 unsigned sprite_coord_mode
:1; /**< PIPE_SPRITE_COORD_ */
110 unsigned point_quad_rasterization
:1; /** points rasterized as quads or points */
111 unsigned point_tri_clip
:1; /** large points clipped as tris or points */
112 unsigned point_size_per_vertex
:1; /**< size computed in vertex shader */
113 unsigned multisample
:1; /* XXX maybe more ms state in future */
114 unsigned force_persample_interp
:1;
115 unsigned line_smooth
:1;
116 unsigned line_stipple_enable
:1;
117 unsigned line_last_pixel
:1;
118 unsigned conservative_raster_mode
:2; /**< PIPE_CONSERVATIVE_RASTER_x */
121 * Use the first vertex of a primitive as the provoking vertex for
124 unsigned flatshade_first
:1;
126 unsigned half_pixel_center
:1;
127 unsigned bottom_edge_rule
:1;
130 * Conservative rasterization subpixel precision bias in bits
132 unsigned subpixel_precision_x
:4;
133 unsigned subpixel_precision_y
:4;
136 * When true, rasterization is disabled and no pixels are written.
137 * This only makes sense with the Stream Out functionality.
139 unsigned rasterizer_discard
:1;
142 * Exposed by PIPE_CAP_TILE_RASTER_ORDER. When true,
143 * tile_raster_order_increasing_* indicate the order that the rasterizer
144 * should render tiles, to meet the requirements of
145 * GL_MESA_tile_raster_order.
147 unsigned tile_raster_order_fixed
:1;
148 unsigned tile_raster_order_increasing_x
:1;
149 unsigned tile_raster_order_increasing_y
:1;
152 * When false, depth clipping is disabled and the depth value will be
153 * clamped later at the per-pixel level before depth testing.
154 * This depends on PIPE_CAP_DEPTH_CLIP_DISABLE.
156 * If PIPE_CAP_DEPTH_CLIP_DISABLE_SEPARATE is unsupported, depth_clip_near
157 * is equal to depth_clip_far.
159 unsigned depth_clip_near
:1;
160 unsigned depth_clip_far
:1;
163 * When true clip space in the z axis goes from [0..1] (D3D). When false
166 * NOTE: D3D will always use depth clamping.
168 unsigned clip_halfz
:1;
171 * When true do not scale offset_units and use same rules for unorm and
172 * float depth buffers (D3D9). When false use GL/D3D1X behaviour.
173 * This depends on PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED.
175 unsigned offset_units_unscaled
:1;
178 * Enable bits for clipping half-spaces.
179 * This applies to both user clip planes and shader clip distances.
180 * Note that if the bound shader exports any clip distances, these
181 * replace all user clip planes, and clip half-spaces enabled here
182 * but not written by the shader count as disabled.
184 unsigned clip_plane_enable
:PIPE_MAX_CLIP_PLANES
;
186 unsigned line_stipple_factor
:8; /**< [1..256] actually */
187 unsigned line_stipple_pattern
:16;
190 * Replace the given TEXCOORD inputs with point coordinates, max. 8 inputs.
191 * If TEXCOORD (including PCOORD) are unsupported, replace GENERIC inputs
192 * instead. Max. 9 inputs: 8x GENERIC to emulate TEXCOORD, and 1x GENERIC
195 uint16_t sprite_coord_enable
; /* 0-7: TEXCOORD/GENERIC, 8: PCOORD */
198 float point_size
; /**< used when no per-vertex size */
202 float conservative_raster_dilate
;
206 struct pipe_poly_stipple
208 unsigned stipple
[32];
212 struct pipe_viewport_state
216 enum pipe_viewport_swizzle swizzle_x
:3;
217 enum pipe_viewport_swizzle swizzle_y
:3;
218 enum pipe_viewport_swizzle swizzle_z
:3;
219 enum pipe_viewport_swizzle swizzle_w
:3;
223 struct pipe_scissor_state
232 struct pipe_clip_state
234 float ucp
[PIPE_MAX_CLIP_PLANES
][4];
238 * A single output for vertex transform feedback.
240 struct pipe_stream_output
242 unsigned register_index
:6; /**< 0 to 63 (OUT index) */
243 unsigned start_component
:2; /** 0 to 3 */
244 unsigned num_components
:3; /** 1 to 4 */
245 unsigned output_buffer
:3; /**< 0 to PIPE_MAX_SO_BUFFERS */
246 unsigned dst_offset
:16; /**< offset into the buffer in dwords */
247 unsigned stream
:2; /**< 0 to 3 */
251 * Stream output for vertex transform feedback.
253 struct pipe_stream_output_info
255 unsigned num_outputs
;
256 /** stride for an entire vertex for each buffer in dwords */
257 uint16_t stride
[PIPE_MAX_SO_BUFFERS
];
260 * Array of stream outputs, in the order they are to be written in.
261 * Selected components are tightly packed into the output buffer.
263 struct pipe_stream_output output
[PIPE_MAX_SO_OUTPUTS
];
267 * The 'type' parameter identifies whether the shader state contains TGSI
268 * tokens, etc. If the driver returns 'PIPE_SHADER_IR_TGSI' for the
269 * 'PIPE_SHADER_CAP_PREFERRED_IR' shader param, the ir will *always* be
270 * 'PIPE_SHADER_IR_TGSI' and the tokens ptr will be valid. If the driver
271 * requests a different 'pipe_shader_ir' type, then it must check the 'type'
272 * enum to see if it is getting TGSI tokens or its preferred IR.
274 * TODO pipe_compute_state should probably get similar treatment to handle
275 * multiple IR's in a cleaner way..
277 * NOTE: since it is expected that the consumer will want to perform
278 * additional passes on the nir_shader, the driver takes ownership of
279 * the nir_shader. If gallium frontends need to hang on to the IR (for
280 * example, variant management), it should use nir_shader_clone().
282 struct pipe_shader_state
284 enum pipe_shader_ir type
;
285 /* TODO move tokens into union. */
286 const struct tgsi_token
*tokens
;
291 struct pipe_stream_output_info stream_output
;
295 pipe_shader_state_from_tgsi(struct pipe_shader_state
*state
,
296 const struct tgsi_token
*tokens
)
298 state
->type
= PIPE_SHADER_IR_TGSI
;
299 state
->tokens
= tokens
;
300 memset(&state
->stream_output
, 0, sizeof(state
->stream_output
));
303 struct pipe_depth_state
305 unsigned enabled
:1; /**< depth test enabled? */
306 unsigned writemask
:1; /**< allow depth buffer writes? */
307 unsigned func
:3; /**< depth test func (PIPE_FUNC_x) */
308 unsigned bounds_test
:1; /**< depth bounds test enabled? */
309 float bounds_min
; /**< minimum depth bound */
310 float bounds_max
; /**< maximum depth bound */
314 struct pipe_stencil_state
316 unsigned enabled
:1; /**< stencil[0]: stencil enabled, stencil[1]: two-side enabled */
317 unsigned func
:3; /**< PIPE_FUNC_x */
318 unsigned fail_op
:3; /**< PIPE_STENCIL_OP_x */
319 unsigned zpass_op
:3; /**< PIPE_STENCIL_OP_x */
320 unsigned zfail_op
:3; /**< PIPE_STENCIL_OP_x */
321 unsigned valuemask
:8;
322 unsigned writemask
:8;
326 struct pipe_alpha_state
329 unsigned func
:3; /**< PIPE_FUNC_x */
330 float ref_value
; /**< reference value */
334 struct pipe_depth_stencil_alpha_state
336 struct pipe_depth_state depth
;
337 struct pipe_stencil_state stencil
[2]; /**< [0] = front, [1] = back */
338 struct pipe_alpha_state alpha
;
342 struct pipe_rt_blend_state
344 unsigned blend_enable
:1;
346 unsigned rgb_func
:3; /**< PIPE_BLEND_x */
347 unsigned rgb_src_factor
:5; /**< PIPE_BLENDFACTOR_x */
348 unsigned rgb_dst_factor
:5; /**< PIPE_BLENDFACTOR_x */
350 unsigned alpha_func
:3; /**< PIPE_BLEND_x */
351 unsigned alpha_src_factor
:5; /**< PIPE_BLENDFACTOR_x */
352 unsigned alpha_dst_factor
:5; /**< PIPE_BLENDFACTOR_x */
354 unsigned colormask
:4; /**< bitmask of PIPE_MASK_R/G/B/A */
358 struct pipe_blend_state
360 unsigned independent_blend_enable
:1;
361 unsigned logicop_enable
:1;
362 unsigned logicop_func
:4; /**< PIPE_LOGICOP_x */
364 unsigned alpha_to_coverage
:1;
365 unsigned alpha_to_coverage_dither
:1;
366 unsigned alpha_to_one
:1;
367 unsigned max_rt
:3; /* index of max rt, Ie. # of cbufs minus 1 */
368 unsigned advanced_blend_func
:4;
369 struct pipe_rt_blend_state rt
[PIPE_MAX_COLOR_BUFS
];
373 struct pipe_blend_color
379 struct pipe_stencil_ref
386 * Note that pipe_surfaces are "texture views for rendering"
387 * and so in the case of ARB_framebuffer_no_attachment there
388 * is no pipe_surface state available such that we may
389 * extract the number of samples and layers.
391 struct pipe_framebuffer_state
393 uint16_t width
, height
;
394 uint16_t layers
; /**< Number of layers in a no-attachment framebuffer */
395 ubyte samples
; /**< Number of samples in a no-attachment framebuffer */
397 /** multiple color buffers for multiple render targets */
399 struct pipe_surface
*cbufs
[PIPE_MAX_COLOR_BUFS
];
401 struct pipe_surface
*zsbuf
; /**< Z/stencil buffer */
406 * Texture sampler state.
408 struct pipe_sampler_state
410 unsigned wrap_s
:3; /**< PIPE_TEX_WRAP_x */
411 unsigned wrap_t
:3; /**< PIPE_TEX_WRAP_x */
412 unsigned wrap_r
:3; /**< PIPE_TEX_WRAP_x */
413 unsigned min_img_filter
:1; /**< PIPE_TEX_FILTER_x */
414 unsigned min_mip_filter
:2; /**< PIPE_TEX_MIPFILTER_x */
415 unsigned mag_img_filter
:1; /**< PIPE_TEX_FILTER_x */
416 unsigned compare_mode
:1; /**< PIPE_TEX_COMPARE_x */
417 unsigned compare_func
:3; /**< PIPE_FUNC_x */
418 unsigned normalized_coords
:1; /**< Are coords normalized to [0,1]? */
419 unsigned max_anisotropy
:5;
420 unsigned seamless_cube_map
:1;
421 float lod_bias
; /**< LOD/lambda bias */
422 float min_lod
, max_lod
; /**< LOD clamp range, after bias */
423 union pipe_color_union border_color
;
426 union pipe_surface_desc
{
429 unsigned first_layer
:16;
430 unsigned last_layer
:16;
433 unsigned first_element
;
434 unsigned last_element
;
439 * A view into a texture that can be bound to a color render target /
440 * depth stencil attachment point.
444 struct pipe_reference reference
;
445 enum pipe_format format
:16;
446 unsigned writable
:1; /**< writable shader resource */
447 struct pipe_resource
*texture
; /**< resource into which this is a view */
448 struct pipe_context
*context
; /**< context this surface belongs to */
450 /* XXX width/height should be removed */
451 uint16_t width
; /**< logical width in pixels */
452 uint16_t height
; /**< logical height in pixels */
455 * Number of samples for the surface. This will be 0 if rendering
456 * should use the resource's nr_samples, or another value if the resource
457 * is bound using FramebufferTexture2DMultisampleEXT.
459 unsigned nr_samples
:8;
461 union pipe_surface_desc u
;
466 * A view into a texture that can be bound to a shader stage.
468 struct pipe_sampler_view
470 struct pipe_reference reference
;
471 enum pipe_format format
:15; /**< typed PIPE_FORMAT_x */
472 enum pipe_texture_target target
:5; /**< PIPE_TEXTURE_x */
473 unsigned swizzle_r
:3; /**< PIPE_SWIZZLE_x for red component */
474 unsigned swizzle_g
:3; /**< PIPE_SWIZZLE_x for green component */
475 unsigned swizzle_b
:3; /**< PIPE_SWIZZLE_x for blue component */
476 unsigned swizzle_a
:3; /**< PIPE_SWIZZLE_x for alpha component */
477 struct pipe_resource
*texture
; /**< texture into which this is a view */
478 struct pipe_context
*context
; /**< context this view belongs to */
481 unsigned first_layer
:16; /**< first layer to use for array textures */
482 unsigned last_layer
:16; /**< last layer to use for array textures */
483 unsigned first_level
:8; /**< first mipmap level to use */
484 unsigned last_level
:8; /**< last mipmap level to use */
487 unsigned offset
; /**< offset in bytes */
488 unsigned size
; /**< size of the readable sub-range in bytes */
495 * A description of a buffer or texture image that can be bound to a shader
498 struct pipe_image_view
500 struct pipe_resource
*resource
; /**< resource into which this is a view */
501 enum pipe_format format
; /**< typed PIPE_FORMAT_x */
502 uint16_t access
; /**< PIPE_IMAGE_ACCESS_x */
503 uint16_t shader_access
; /**< PIPE_IMAGE_ACCESS_x */
507 unsigned first_layer
:16; /**< first layer to use for array textures */
508 unsigned last_layer
:16; /**< last layer to use for array textures */
509 unsigned level
:8; /**< mipmap level to use */
512 unsigned offset
; /**< offset in bytes */
513 unsigned size
; /**< size of the accessible sub-range in bytes */
520 * Subregion of 1D/2D/3D image resource.
524 /* Fields only used by textures use int16_t instead of int.
525 * x and width are used by buffers, so they need the full 32-bit range.
537 * A memory object/resource such as a vertex buffer or texture.
541 struct pipe_reference reference
;
543 unsigned width0
; /**< Used by both buffers and textures. */
544 uint16_t height0
; /* Textures: The maximum height/depth/array_size is 16k. */
548 enum pipe_format format
:16; /**< PIPE_FORMAT_x */
549 enum pipe_texture_target target
:8; /**< PIPE_TEXTURE_x */
550 unsigned last_level
:8; /**< Index of last mipmap level present/defined */
552 /** Number of samples determining quality, driving rasterizer, shading,
555 unsigned nr_samples
:8;
557 /** Multiple samples within a pixel can have the same value.
558 * nr_storage_samples determines how many slots for different values
559 * there are per pixel. Only color buffers can set this lower than
562 unsigned nr_storage_samples
:8;
564 unsigned usage
:8; /**< PIPE_USAGE_x (not a bitmask) */
565 unsigned bind
; /**< bitmask of PIPE_BIND_x */
566 unsigned flags
; /**< bitmask of PIPE_RESOURCE_FLAG_x */
569 * For planar images, ie. YUV EGLImage external, etc, pointer to the
572 struct pipe_resource
*next
;
573 /* The screen pointer should be last for optimal structure packing. */
574 struct pipe_screen
*screen
; /**< screen that this texture belongs to */
578 * Opaque object used for separate resource/memory allocations.
580 struct pipe_memory_allocation
;
583 * Transfer object. For data transfer to/from a resource.
587 struct pipe_resource
*resource
; /**< resource to transfer to/from */
588 unsigned level
; /**< texture mipmap level */
589 enum pipe_transfer_usage usage
;
590 struct pipe_box box
; /**< region of the resource to access */
591 unsigned stride
; /**< row stride in bytes */
592 unsigned layer_stride
; /**< image/layer stride in bytes */
597 * A vertex buffer. Typically, all the vertex data/attributes for
598 * drawing something will be in one buffer. But it's also possible, for
599 * example, to put colors in one buffer and texcoords in another.
601 struct pipe_vertex_buffer
603 uint16_t stride
; /**< stride to same attrib in next vertex, in bytes */
605 unsigned buffer_offset
; /**< offset to start of data in buffer, in bytes */
608 struct pipe_resource
*resource
; /**< the actual buffer */
609 const void *user
; /**< pointer to a user buffer */
615 * A constant buffer. A subrange of an existing buffer can be set
616 * as a constant buffer.
618 struct pipe_constant_buffer
620 struct pipe_resource
*buffer
; /**< the actual buffer */
621 unsigned buffer_offset
; /**< offset to start of data in buffer, in bytes */
622 unsigned buffer_size
; /**< how much data can be read in shader */
623 const void *user_buffer
; /**< pointer to a user buffer if buffer == NULL */
628 * An untyped shader buffer supporting loads, stores, and atomics.
630 struct pipe_shader_buffer
{
631 struct pipe_resource
*buffer
; /**< the actual buffer */
632 unsigned buffer_offset
; /**< offset to start of data in buffer, in bytes */
633 unsigned buffer_size
; /**< how much data can be read in shader */
638 * A stream output target. The structure specifies the range vertices can
641 * In addition to that, the structure should internally maintain the offset
642 * into the buffer, which should be incremented everytime something is written
643 * (appended) to it. The internal offset is buffer_offset + how many bytes
644 * have been written. The internal offset can be stored on the device
645 * and the CPU actually doesn't have to query it.
647 * Note that the buffer_size variable is actually specifying the available
648 * space in the buffer, not the size of the attached buffer.
649 * In other words in majority of cases buffer_size would simply be
650 * 'buffer->width0 - buffer_offset', so buffer_size refers to the size
651 * of the buffer left, after accounting for buffer offset, for stream output
654 * Use PIPE_QUERY_SO_STATISTICS to know how many primitives have
655 * actually been written.
657 struct pipe_stream_output_target
659 struct pipe_reference reference
;
660 struct pipe_resource
*buffer
; /**< the output buffer */
661 struct pipe_context
*context
; /**< context this SO target belongs to */
663 unsigned buffer_offset
; /**< offset where data should be written, in bytes */
664 unsigned buffer_size
; /**< how much data is allowed to be written */
669 * Information to describe a vertex attribute (position, color, etc)
671 struct pipe_vertex_element
673 /** Offset of this attribute, in bytes, from the start of the vertex */
674 unsigned src_offset
:16;
676 /** Which vertex_buffer (as given to pipe->set_vertex_buffer()) does
677 * this attribute live in?
679 unsigned vertex_buffer_index
:5;
681 enum pipe_format src_format
:11;
683 /** Instance data rate divisor. 0 means this is per-vertex data,
684 * n means per-instance data used for n consecutive instances (n > 0).
686 unsigned instance_divisor
;
690 struct pipe_draw_indirect_info
692 unsigned offset
; /**< must be 4 byte aligned */
693 unsigned stride
; /**< must be 4 byte aligned */
694 unsigned draw_count
; /**< number of indirect draws */
695 unsigned indirect_draw_count_offset
; /**< must be 4 byte aligned */
697 /* Indirect draw parameters resource is laid out as follows:
699 * if using indexed drawing:
702 * uint32_t instance_count;
704 * int32_t index_bias;
705 * uint32_t start_instance;
710 * uint32_t instance_count;
712 * uint32_t start_instance;
715 struct pipe_resource
*buffer
;
717 /* Indirect draw count resource: If not NULL, contains a 32-bit value which
718 * is to be used as the real draw_count.
720 struct pipe_resource
*indirect_draw_count
;
725 * Information to describe a draw_vbo call.
727 struct pipe_draw_info
729 ubyte index_size
; /**< if 0, the draw is not indexed. */
730 enum pipe_prim_type mode
:8; /**< the mode of the primitive */
731 unsigned primitive_restart
:1;
732 unsigned has_user_indices
:1; /**< if true, use index.user_buffer */
733 ubyte vertices_per_patch
; /**< the number of vertices per patch */
736 * Direct draws: start is the index of the first vertex
737 * Non-indexed indirect draws: not used
738 * Indexed indirect draws: start is added to the indirect start.
741 unsigned count
; /**< number of vertices */
743 unsigned start_instance
; /**< first instance id */
744 unsigned instance_count
; /**< number of instances */
746 unsigned drawid
; /**< id of this draw in a multidraw */
749 * For indexed drawing, these fields apply after index lookup.
751 int index_bias
; /**< a bias to be added to each index */
752 unsigned min_index
; /**< the min index */
753 unsigned max_index
; /**< the max index */
756 * Primitive restart enable/index (only applies to indexed drawing)
758 unsigned restart_index
;
760 /* Pointers must be at the end for an optimal structure layout on 64-bit. */
763 * An index buffer. When an index buffer is bound, all indices to vertices
764 * will be looked up from the buffer.
766 * If has_user_indices, use index.user, else use index.resource.
769 struct pipe_resource
*resource
; /**< real buffer */
770 const void *user
; /**< pointer to a user buffer */
773 struct pipe_draw_indirect_info
*indirect
; /**< Indirect draw. */
776 * Stream output target. If not NULL, it's used to provide the 'count'
777 * parameter based on the number vertices captured by the stream output
778 * stage. (or generally, based on the number of bytes captured)
780 * Only 'mode', 'start_instance', and 'instance_count' are taken into
781 * account, all the other variables from pipe_draw_info are ignored.
783 * 'start' is implicitly 0 and 'count' is set as discussed above.
784 * The draw command is non-indexed.
786 * Note that this only provides the count. The vertex buffers must
787 * be set via set_vertex_buffers manually.
789 struct pipe_stream_output_target
*count_from_stream_output
;
794 * Information to describe a blit call.
796 struct pipe_blit_info
799 struct pipe_resource
*resource
;
801 struct pipe_box box
; /**< negative width, height only legal for src */
802 /* For pipe_surface-like format casting: */
803 enum pipe_format format
; /**< must be supported for sampling (src)
804 or rendering (dst), ZS is always supported */
807 unsigned mask
; /**< bitmask of PIPE_MASK_R/G/B/A/Z/S */
808 unsigned filter
; /**< PIPE_TEX_FILTER_* */
811 struct pipe_scissor_state scissor
;
813 /* Window rectangles can either be inclusive or exclusive. */
814 bool window_rectangle_include
;
815 unsigned num_window_rectangles
;
816 struct pipe_scissor_state window_rectangles
[PIPE_MAX_WINDOW_RECTANGLES
];
818 bool render_condition_enable
; /**< whether the blit should honor the
819 current render condition */
820 bool alpha_blend
; /* dst.rgb = src.rgb * src.a + dst.rgb * (1 - src.a) */
824 * Information to describe a launch_grid call.
826 struct pipe_grid_info
829 * For drivers that use PIPE_SHADER_IR_NATIVE as their prefered IR, this
830 * value will be the index of the kernel in the opencl.kernels metadata
836 * Will be used to initialize the INPUT resource, and it should point to a
837 * buffer of at least pipe_compute_state::req_input_mem bytes.
842 * Grid number of dimensions, 1-3, e.g. the work_dim parameter passed to
843 * clEnqueueNDRangeKernel. Note block[] and grid[] must be padded with
844 * 1 for non-used dimensions.
849 * Determine the layout of the working block (in thread units) to be used.
854 * last_block allows disabling threads at the farthermost grid boundary.
855 * Full blocks as specified by "block" are launched, but the threads
856 * outside of "last_block" dimensions are disabled.
858 * If a block touches the grid boundary in the i-th axis, threads with
859 * THREAD_ID[i] >= last_block[i] are disabled.
861 * If last_block[i] is 0, it has the same behavior as last_block[i] = block[i],
864 * It's equivalent to doing this at the beginning of the compute shader:
866 * for (i = 0; i < 3; i++) {
867 * if (block_id[i] == grid[i] - 1 &&
868 * last_block[i] && thread_id[i] >= last_block[i])
875 * Determine the layout of the grid (in block units) to be used.
879 /* Indirect compute parameters resource: If not NULL, block sizes are taken
880 * from this buffer instead, which is laid out as follows:
883 * uint32_t num_blocks_x;
884 * uint32_t num_blocks_y;
885 * uint32_t num_blocks_z;
888 struct pipe_resource
*indirect
;
889 unsigned indirect_offset
; /**< must be 4 byte aligned */
893 * Structure used as a header for serialized compute programs.
895 struct pipe_binary_program_header
897 uint32_t num_bytes
; /**< Number of bytes in the LLVM bytecode program. */
901 struct pipe_compute_state
903 enum pipe_shader_ir ir_type
; /**< IR type contained in prog. */
904 const void *prog
; /**< Compute program to be executed. */
905 unsigned req_local_mem
; /**< Required size of the LOCAL resource. */
906 unsigned req_private_mem
; /**< Required size of the PRIVATE resource. */
907 unsigned req_input_mem
; /**< Required size of the INPUT resource. */
911 * Structure that contains a callback for debug messages from the driver back
912 * to the gallium frontend.
914 struct pipe_debug_callback
917 * When set to \c true, the callback may be called asynchronously from a
918 * driver-created thread.
923 * Callback for the driver to report debug/performance/etc information back
924 * to the gallium frontend.
926 * \param data user-supplied data pointer
927 * \param id message type identifier, if pointed value is 0, then a
929 * \param type PIPE_DEBUG_TYPE_*
930 * \param format printf-style format string
931 * \param args args for format string
933 void (*debug_message
)(void *data
,
935 enum pipe_debug_type type
,
942 * Structure that contains a callback for device reset messages from the driver
943 * back to the gallium frontend.
945 * The callback must not be called from driver-created threads.
947 struct pipe_device_reset_callback
950 * Callback for the driver to report when a device reset is detected.
952 * \param data user-supplied data pointer
953 * \param status PIPE_*_RESET
955 void (*reset
)(void *data
, enum pipe_reset_status status
);
961 * Information about memory usage. All sizes are in kilobytes.
963 struct pipe_memory_info
965 unsigned total_device_memory
; /**< size of device memory, e.g. VRAM */
966 unsigned avail_device_memory
; /**< free device memory at the moment */
967 unsigned total_staging_memory
; /**< size of staging memory, e.g. GART */
968 unsigned avail_staging_memory
; /**< free staging memory at the moment */
969 unsigned device_memory_evicted
; /**< size of memory evicted (monotonic counter) */
970 unsigned nr_device_memory_evictions
; /**< # of evictions (monotonic counter) */
974 * Structure that contains information about external memory
976 struct pipe_memory_object