src/gallium/winsys/drm/intel/gem/intel_be_batchbuffer.h

   1
   2 #ifndef INTEL_BE_BATCHBUFFER_H
   3 #define INTEL_BE_BATCHBUFFER_H
   4
   5 #include "i915simple/i915_batch.h"
   6
   7 #include "drm.h"
   8 #include "intel_bufmgr.h"
   9
  10 #define BATCH_RESERVED 16
  11
  12 #define INTEL_DEFAULT_RELOCS 100
  13 #define INTEL_MAX_RELOCS 400
  14
  15 #define INTEL_BATCH_NO_CLIPRECTS 0x1
  16 #define INTEL_BATCH_CLIPRECTS    0x2
  17
  18 struct intel_be_context;
  19 struct intel_be_device;
  20 struct intel_be_fence;
  21
  22 struct intel_be_batchbuffer
  23 {
  24         struct i915_batchbuffer base;
  25
  26         struct intel_be_context *intel;
  27         struct intel_be_device *device;
  28
  29         drm_intel_bo *bo;
  30 };
  31
  32 struct intel_be_batchbuffer *
  33 intel_be_batchbuffer_alloc(struct intel_be_context *intel);
  34
  35 void
  36 intel_be_batchbuffer_free(struct intel_be_batchbuffer *batch);
  37
  38 void
  39 intel_be_batchbuffer_finish(struct intel_be_batchbuffer *batch);
  40
  41 void
  42 intel_be_batchbuffer_flush(struct intel_be_batchbuffer *batch,
  43                            struct intel_be_fence **fence);
  44
  45 void
  46 intel_be_batchbuffer_reset(struct intel_be_batchbuffer *batch);
  47
  48 int
  49 intel_be_offset_relocation(struct intel_be_batchbuffer *batch,
  50                            unsigned pre_add,
  51                            drm_intel_bo *bo,
  52                            uint32_t read_domains,
  53                            uint32_t write_doman);
  54
  55 #endif