2 * Copyright © 2008 Jérôme Glisse
6 * Permission is hereby granted, free of charge, to any person obtaining
7 * a copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
15 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
16 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
17 * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
18 * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
23 * The above copyright notice and this permission notice (including the
24 * next paragraph) shall be included in all copies or substantial portions
29 * Jérôme Glisse <glisse@freedesktop.org>
30 * Corbin Simpson <MostAwesomeDude@gmail.com>
33 #include "radeon_buffer.h"
35 #include "radeon_bo_gem.h"
36 #include "softpipe/sp_texture.h"
37 #include "r300_context.h"
38 #include "util/u_math.h"
39 #include <X11/Xutil.h>
41 struct radeon_vl_context
48 static const char *radeon_get_name(struct pipe_winsys
*ws
)
50 return "Radeon/GEM+KMS";
53 static struct pipe_buffer
*radeon_buffer_create(struct pipe_winsys
*ws
,
58 struct radeon_winsys
*radeon_ws
= (struct radeon_winsys
*)ws
;
59 struct radeon_pipe_buffer
*radeon_buffer
;
62 radeon_buffer
= CALLOC_STRUCT(radeon_pipe_buffer
);
63 if (radeon_buffer
== NULL
) {
67 pipe_reference_init(&radeon_buffer
->base
.reference
, 1);
68 radeon_buffer
->base
.alignment
= alignment
;
69 radeon_buffer
->base
.usage
= usage
;
70 radeon_buffer
->base
.size
= size
;
74 if (usage
& PIPE_BUFFER_USAGE_PIXEL
) {
75 domain
|= RADEON_GEM_DOMAIN_VRAM
;
77 if (usage
& PIPE_BUFFER_USAGE_VERTEX
) {
78 domain
|= RADEON_GEM_DOMAIN_GTT
;
80 if (usage
& PIPE_BUFFER_USAGE_INDEX
) {
81 domain
|= RADEON_GEM_DOMAIN_GTT
;
84 radeon_buffer
->bo
= radeon_bo_open(radeon_ws
->priv
->bom
, 0, size
,
85 alignment
, domain
, 0);
86 if (radeon_buffer
->bo
== NULL
) {
90 return &radeon_buffer
->base
;
93 static struct pipe_buffer
*radeon_buffer_user_create(struct pipe_winsys
*ws
,
97 struct radeon_pipe_buffer
*radeon_buffer
;
100 (struct radeon_pipe_buffer
*)radeon_buffer_create(ws
, 0, 0, bytes
);
101 if (radeon_buffer
== NULL
) {
104 radeon_bo_map(radeon_buffer
->bo
, 1);
105 memcpy(radeon_buffer
->bo
->ptr
, ptr
, bytes
);
106 radeon_bo_unmap(radeon_buffer
->bo
);
107 return &radeon_buffer
->base
;
110 static struct pipe_buffer
*radeon_surface_buffer_create(struct pipe_winsys
*ws
,
113 enum pipe_format format
,
118 /* Radeons enjoy things in multiples of 32. */
119 /* XXX this can be 32 when POT */
120 const unsigned alignment
= 64;
121 unsigned nblocksy
, size
;
123 nblocksy
= pf_get_nblocksy(format
, height
);
124 *stride
= align(pf_get_stride(format
, width
), alignment
);
125 size
= *stride
* nblocksy
;
127 return radeon_buffer_create(ws
, 64, usage
, size
);
130 static void radeon_buffer_del(struct pipe_buffer
*buffer
)
132 struct radeon_pipe_buffer
*radeon_buffer
=
133 (struct radeon_pipe_buffer
*)buffer
;
135 radeon_bo_unref(radeon_buffer
->bo
);
139 static void *radeon_buffer_map(struct pipe_winsys
*ws
,
140 struct pipe_buffer
*buffer
,
143 struct radeon_winsys_priv
*priv
= ((struct radeon_winsys
*)ws
)->priv
;
144 struct radeon_pipe_buffer
*radeon_buffer
=
145 (struct radeon_pipe_buffer
*)buffer
;
148 if (radeon_bo_is_referenced_by_cs(radeon_buffer
->bo
, priv
->cs
)) {
149 priv
->cs
->space_flush_fn(priv
->cs
->space_flush_data
);
152 if (flags
& PIPE_BUFFER_USAGE_DONTBLOCK
) {
155 if (radeon_bo_is_busy(radeon_buffer
->bo
, &domain
))
158 if (flags
& PIPE_BUFFER_USAGE_CPU_WRITE
) {
162 if (radeon_bo_map(radeon_buffer
->bo
, write
)) {
166 return radeon_buffer
->bo
->ptr
;
169 static void radeon_buffer_unmap(struct pipe_winsys
*ws
,
170 struct pipe_buffer
*buffer
)
172 struct radeon_pipe_buffer
*radeon_buffer
=
173 (struct radeon_pipe_buffer
*)buffer
;
175 radeon_bo_unmap(radeon_buffer
->bo
);
178 static void radeon_fence_reference(struct pipe_winsys
*ws
,
179 struct pipe_fence_handle
**ptr
,
180 struct pipe_fence_handle
*pfence
)
184 static int radeon_fence_signalled(struct pipe_winsys
*ws
,
185 struct pipe_fence_handle
*pfence
,
191 static int radeon_fence_finish(struct pipe_winsys
*ws
,
192 struct pipe_fence_handle
*pfence
,
198 static void radeon_display_surface(struct pipe_winsys
*pws
,
199 struct pipe_surface
*psurf
,
200 struct radeon_vl_context
*rvl_ctx
)
202 struct r300_texture
*r300tex
= (struct r300_texture
*)(psurf
->texture
);
206 ximage
= XCreateImage(rvl_ctx
->display
,
207 XDefaultVisual(rvl_ctx
->display
, rvl_ctx
->screen
),
208 XDefaultDepth(rvl_ctx
->display
, rvl_ctx
->screen
),
209 ZPixmap
, 0, /* format, offset */
213 0); /* bytes_per_line */
215 assert(ximage
->format
);
216 assert(ximage
->bitmap_unit
);
218 data
= pws
->buffer_map(pws
, r300tex
->buffer
, 0);
220 /* update XImage's fields */
222 ximage
->width
= psurf
->width
;
223 ximage
->height
= psurf
->height
;
224 ximage
->bytes_per_line
= psurf
->width
* (ximage
->bits_per_pixel
>> 3);
226 XPutImage(rvl_ctx
->display
, rvl_ctx
->drawable
,
227 XDefaultGC(rvl_ctx
->display
, rvl_ctx
->screen
),
228 ximage
, 0, 0, 0, 0, psurf
->width
, psurf
->height
);
230 XSync(rvl_ctx
->display
, 0);
233 XDestroyImage(ximage
);
235 pws
->buffer_unmap(pws
, r300tex
->buffer
);
238 static void radeon_flush_frontbuffer(struct pipe_winsys
*pipe_winsys
,
239 struct pipe_surface
*pipe_surface
,
240 void *context_private
)
242 struct radeon_vl_context
*rvl_ctx
;
243 rvl_ctx
= (struct radeon_vl_context
*) context_private
;
244 radeon_display_surface(pipe_winsys
, pipe_surface
, rvl_ctx
);
247 struct radeon_winsys
* radeon_pipe_winsys(int fd
)
249 struct radeon_winsys
* radeon_ws
;
251 radeon_ws
= CALLOC_STRUCT(radeon_winsys
);
252 if (radeon_ws
== NULL
) {
256 radeon_ws
->priv
= CALLOC_STRUCT(radeon_winsys_priv
);
257 if (radeon_ws
->priv
== NULL
) {
262 radeon_ws
->priv
->fd
= fd
;
263 radeon_ws
->priv
->bom
= radeon_bo_manager_gem_ctor(fd
);
265 radeon_ws
->base
.flush_frontbuffer
= radeon_flush_frontbuffer
;
267 radeon_ws
->base
.buffer_create
= radeon_buffer_create
;
268 radeon_ws
->base
.user_buffer_create
= radeon_buffer_user_create
;
269 radeon_ws
->base
.surface_buffer_create
= radeon_surface_buffer_create
;
270 radeon_ws
->base
.buffer_map
= radeon_buffer_map
;
271 radeon_ws
->base
.buffer_unmap
= radeon_buffer_unmap
;
272 radeon_ws
->base
.buffer_destroy
= radeon_buffer_del
;
274 radeon_ws
->base
.fence_reference
= radeon_fence_reference
;
275 radeon_ws
->base
.fence_signalled
= radeon_fence_signalled
;
276 radeon_ws
->base
.fence_finish
= radeon_fence_finish
;
278 radeon_ws
->base
.get_name
= radeon_get_name
;
283 static struct pipe_buffer
*radeon_buffer_from_handle(struct radeon_screen
*radeon_screen
,
286 struct radeon_pipe_buffer
*radeon_buffer
;
287 struct radeon_bo
*bo
= NULL
;
289 bo
= radeon_bo_open(radeon_screen
->bom
, handle
, 0, 0, 0, 0);
293 radeon_buffer
= calloc(1, sizeof(struct radeon_pipe_buffer
));
294 if (radeon_buffer
== NULL
) {
298 pipe_reference_init(&radeon_buffer
->base
.reference
, 1);
299 radeon_buffer
->base
.usage
= PIPE_BUFFER_USAGE_PIXEL
;
300 radeon_buffer
->bo
= bo
;
301 return &radeon_buffer
->base
;
304 struct pipe_surface
*radeon_surface_from_handle(struct radeon_context
*radeon_context
,
306 enum pipe_format format
,
307 int w
, int h
, int pitch
)
309 struct pipe_screen
*pipe_screen
= radeon_context
->pipe_screen
;
310 struct pipe_winsys
*pipe_winsys
= radeon_context
->pipe_winsys
;
311 struct pipe_texture tmpl
;
312 struct pipe_surface
*ps
;
313 struct pipe_texture
*pt
;
314 struct pipe_buffer
*pb
;
316 pb
= radeon_buffer_from_handle(radeon_context
->radeon_screen
, handle
);
320 memset(&tmpl
, 0, sizeof(tmpl
));
321 tmpl
.tex_usage
= PIPE_TEXTURE_USAGE_DISPLAY_TARGET
;
322 tmpl
.target
= PIPE_TEXTURE_2D
;
326 tmpl
.format
= format
;
328 pt
= pipe_screen
->texture_blanket(pipe_screen
, &tmpl
, &pitch
, pb
);
330 pipe_buffer_reference(&pb
, NULL
);
332 ps
= pipe_screen
->get_tex_surface(pipe_screen
, pt
, 0, 0, 0,
333 PIPE_BUFFER_USAGE_GPU_WRITE
);