src/gallium/winsys/drm/radeon/core/radeon_drm.c

   1 /*
   2  * Copyright © 2009 Corbin Simpson
   3  * All Rights Reserved.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining
   6  * a copy of this software and associated documentation files (the
   7  * "Software"), to deal in the Software without restriction, including
   8  * without limitation the rights to use, copy, modify, merge, publish,
   9  * distribute, sub license, and/or sell copies of the Software, and to
  10  * permit persons to whom the Software is furnished to do so, subject to
  11  * the following conditions:
  12  *
  13  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  14  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  15  * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  16  * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
  17  * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  18  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  20  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * The above copyright notice and this permission notice (including the
  23  * next paragraph) shall be included in all copies or substantial portions
  24  * of the Software.
  25  */
  26 /*
  27  * Authors:
  28  *      Corbin Simpson <MostAwesomeDude@gmail.com>
  29  *      Joakim Sindholt <opensource@zhasha.com>
  30  */
  31
  32 #include "radeon_drm.h"
  33
  34 /* Helper function to do the ioctls needed for setup and init. */
  35 static void do_ioctls(int fd, struct radeon_winsys* winsys)
  36 {
  37     struct drm_radeon_gem_info gem_info = {0};
  38     struct drm_radeon_info info = {0};
  39     int target = 0;
  40     int retval;
  41
  42     info.value = (unsigned long)&target;
  43
  44     /* We do things in a specific order here.
  45      *
  46      * First, the PCI ID. This is essential and should return usable numbers
  47      * for all Radeons. If this fails, we probably got handed an FD for some
  48      * non-Radeon card.
  49      *
  50      * The GB and Z pipe requests should always succeed, but they might not
  51      * return sensical values for all chipsets, but that's alright because
  52      * the pipe drivers already know that.
  53      *
  54      * The GEM info is actually bogus on the kernel side, as well as our side
  55      * (see radeon_gem_info_ioctl in radeon_gem.c) but that's alright because
  56      * we don't actually use the info for anything yet.
  57      * XXX update the above when we can safely use vram_size instead of vram_visible */
  58     info.request = RADEON_INFO_DEVICE_ID;
  59     retval = drmCommandWriteRead(fd, DRM_RADEON_INFO, &info, sizeof(info));
  60     if (retval) {
  61         fprintf(stderr, "%s: Failed to get PCI ID, "
  62                 "error number %d\n", __FUNCTION__, retval);
  63         exit(1);
  64     }
  65     winsys->pci_id = target;
  66
  67     info.request = RADEON_INFO_NUM_GB_PIPES;
  68     retval = drmCommandWriteRead(fd, DRM_RADEON_INFO, &info, sizeof(info));
  69     if (retval) {
  70         fprintf(stderr, "%s: Failed to get GB pipe count, "
  71                 "error number %d\n", __FUNCTION__, retval);
  72         exit(1);
  73     }
  74     winsys->gb_pipes = target;
  75
  76     info.request = RADEON_INFO_NUM_Z_PIPES;
  77     retval = drmCommandWriteRead(fd, DRM_RADEON_INFO, &info, sizeof(info));
  78     if (retval) {
  79         fprintf(stderr, "%s: Failed to get Z pipe count, "
  80                 "error number %d\n", __FUNCTION__, retval);
  81         exit(1);
  82     }
  83     winsys->z_pipes = target;
  84
  85     retval = drmCommandWriteRead(fd, DRM_RADEON_GEM_INFO,
  86             &gem_info, sizeof(gem_info));
  87     if (retval) {
  88         fprintf(stderr, "%s: Failed to get MM info, error number %d\n",
  89                 __FUNCTION__, retval);
  90         exit(1);
  91     }
  92     winsys->gart_size = gem_info.gart_size;
  93     /* XXX */
  94     winsys->vram_size = gem_info.vram_visible;
  95 }
  96
  97 /* Create a pipe_screen. */
  98 struct pipe_screen* radeon_create_screen(struct drm_api* api,
  99                                          int drmFB,
 100                                          struct drm_create_screen_arg *arg)
 101 {
 102     struct radeon_winsys* winsys = radeon_pipe_winsys(drmFB);
 103     do_ioctls(drmFB, winsys);
 104
 105     if (debug_get_bool_option("RADEON_SOFTPIPE", FALSE)) {
 106         return softpipe_create_screen((struct pipe_winsys*)winsys);
 107     } else {
 108         radeon_setup_winsys(drmFB, winsys);
 109         return r300_create_screen(winsys);
 110     }
 111 }
 112
 113 /* Create a pipe_context. */
 114 struct pipe_context* radeon_create_context(struct drm_api* api,
 115                                            struct pipe_screen* screen)
 116 {
 117     if (debug_get_bool_option("RADEON_SOFTPIPE", FALSE)) {
 118         return radeon_create_softpipe(screen->winsys);
 119     } else {
 120         return r300_create_context(screen,
 121                                    (struct radeon_winsys*)screen->winsys);
 122     }
 123 }
 124
 125 boolean radeon_buffer_from_texture(struct drm_api* api,
 126                                    struct pipe_texture* texture,
 127                                    struct pipe_buffer** buffer,
 128                                    unsigned* stride)
 129 {
 130     /* XXX fix this */
 131     return r300_get_texture_buffer(texture, buffer, stride);
 132 }
 133
 134 /* Create a buffer from a handle. */
 135 /* XXX what's up with name? */
 136 struct pipe_buffer* radeon_buffer_from_handle(struct drm_api* api,
 137                                               struct pipe_screen* screen,
 138                                               const char* name,
 139                                               unsigned handle)
 140 {
 141     struct radeon_bo_manager* bom =
 142         ((struct radeon_winsys*)screen->winsys)->priv->bom;
 143     struct radeon_pipe_buffer* radeon_buffer;
 144     struct radeon_bo* bo = NULL;
 145
 146     bo = radeon_bo_open(bom, handle, 0, 0, 0, 0);
 147     if (bo == NULL) {
 148         return NULL;
 149     }
 150
 151     radeon_buffer = CALLOC_STRUCT(radeon_pipe_buffer);
 152     if (radeon_buffer == NULL) {
 153         radeon_bo_unref(bo);
 154         return NULL;
 155     }
 156
 157     pipe_reference_init(&radeon_buffer->base.reference, 1);
 158     radeon_buffer->base.screen = screen;
 159     radeon_buffer->base.usage = PIPE_BUFFER_USAGE_PIXEL;
 160     radeon_buffer->bo = bo;
 161     return &radeon_buffer->base;
 162 }
 163
 164 static struct pipe_texture*
 165 radeon_texture_from_shared_handle(struct drm_api *api,
 166                                   struct pipe_screen *screen,
 167                                   struct pipe_texture *templ,
 168                                   const char *name,
 169                                   unsigned stride,
 170                                   unsigned handle)
 171 {
 172     struct pipe_buffer *buffer;
 173     struct pipe_texture *blanket;
 174
 175     buffer = radeon_buffer_from_handle(api, screen, name, handle);
 176     if (!buffer) {
 177         return NULL;
 178     }
 179
 180     blanket = screen->texture_blanket(screen, templ, &stride, buffer);
 181
 182     pipe_buffer_reference(&buffer, NULL);
 183
 184     return blanket;
 185 }
 186
 187 static boolean radeon_shared_handle_from_texture(struct drm_api *api,
 188                                                  struct pipe_screen *screen,
 189                                                  struct pipe_texture *texture,
 190                                                  unsigned *stride,
 191                                                  unsigned *handle)
 192 {
 193     int retval, fd;
 194     struct drm_gem_flink flink;
 195     struct radeon_pipe_buffer* radeon_buffer;
 196     struct pipe_buffer *buffer;
 197
 198     if (!radeon_buffer_from_texture(api, texture, &buffer, stride)) {
 199         return FALSE;
 200     }
 201
 202     radeon_buffer = (struct radeon_pipe_buffer*)buffer;
 203     if (!radeon_buffer->flinked) {
 204         fd = ((struct radeon_winsys*)screen->winsys)->priv->fd;
 205
 206         flink.handle = radeon_buffer->bo->handle;
 207
 208         retval = ioctl(fd, DRM_IOCTL_GEM_FLINK, &flink);
 209         if (retval) {
 210             debug_printf("radeon: DRM_IOCTL_GEM_FLINK failed, error %d\n",
 211                     retval);
 212             return FALSE;
 213         }
 214
 215         radeon_buffer->flink = flink.name;
 216         radeon_buffer->flinked = TRUE;
 217     }
 218
 219     *handle = radeon_buffer->flink;
 220     return TRUE;
 221 }
 222
 223 static boolean radeon_local_handle_from_texture(struct drm_api *api,
 224                                                 struct pipe_screen *screen,
 225                                                 struct pipe_texture *texture,
 226                                                 unsigned *stride,
 227                                                 unsigned *handle)
 228 {
 229     struct pipe_buffer *buffer;
 230     if (!radeon_buffer_from_texture(api, texture, &buffer, stride)) {
 231         return FALSE;
 232     }
 233
 234     *handle = ((struct radeon_pipe_buffer*)buffer)->bo->handle;
 235
 236     pipe_buffer_reference(&buffer, NULL);
 237
 238     return TRUE;
 239 }
 240
 241 struct drm_api drm_api_hooks = {
 242     .create_screen = radeon_create_screen,
 243     .create_context = radeon_create_context,
 244     .texture_from_shared_handle = radeon_texture_from_shared_handle,
 245     .shared_handle_from_texture = radeon_shared_handle_from_texture,
 246     .local_handle_from_texture = radeon_local_handle_from_texture,
 247 };
 248
 249 struct drm_api* drm_api_create()
 250 {
 251 #ifdef DEBUG
 252     return trace_drm_create(&drm_api_hooks);
 253 #else
 254     return &drm_api_hooks;
 255 #endif
 256 }