src/gallium/winsys/drm/radeon/core/radeon_r300.c

   1 /*
   2  * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * on the rights to use, copy, modify, merge, publish, distribute, sub
   8  * license, and/or sell copies of the Software, and to permit persons to whom
   9  * the Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  21  * USE OR OTHER DEALINGS IN THE SOFTWARE. */
  22
  23 #include "radeon_r300.h"
  24
  25 static void radeon_r300_add_buffer(struct r300_winsys* winsys,
  26                                    struct pipe_buffer* pbuffer,
  27                                    uint32_t rd,
  28                                    uint32_t wd)
  29 {
  30     int i;
  31     struct radeon_winsys_priv* priv =
  32         (struct radeon_winsys_priv*)winsys->radeon_winsys;
  33     struct radeon_cs_space_check* sc = priv->sc;
  34     struct radeon_bo* bo = ((struct radeon_pipe_buffer*)pbuffer)->bo;
  35
  36     /* Check to see if this BO is already in line for validation;
  37      * find a slot for it otherwise. */
  38     assert(priv->bo_count <= RADEON_MAX_BOS);
  39     for (i = 0; i < priv->bo_count; i++) {
  40         if (sc[i].bo == bo) {
  41             sc[i].read_domains |= rd;
  42             sc[i].write_domain |= wd;
  43             return;
  44         }
  45     }
  46
  47     sc[priv->bo_count].bo = bo;
  48     sc[priv->bo_count].read_domains = rd;
  49     sc[priv->bo_count].write_domain = wd;
  50     priv->bo_count++;
  51 }
  52
  53 static boolean radeon_r300_validate(struct r300_winsys* winsys)
  54 {
  55     int retval, i;
  56     struct radeon_winsys_priv* priv =
  57         (struct radeon_winsys_priv*)winsys->radeon_winsys;
  58     struct radeon_cs_space_check* sc = priv->sc;
  59
  60     retval = radeon_cs_space_check(priv->cs, sc, priv->bo_count);
  61
  62     if (retval == RADEON_CS_SPACE_OP_TO_BIG) {
  63         /* We might as well HCF, since this is not going to fit in the card,
  64          * period. */
  65         /* XXX just drop it on the floor instead */
  66         exit(1);
  67     } else if (retval == RADEON_CS_SPACE_FLUSH) {
  68         /* We must flush before more rendering can commence. */
  69         return TRUE;
  70     }
  71
  72     /* Things are fine, we can proceed as normal. */
  73     return FALSE;
  74 }
  75
  76 static boolean radeon_r300_check_cs(struct r300_winsys* winsys, int size)
  77 {
  78     /* XXX check size here, lazy ass! */
  79     /* XXX also validate buffers */
  80     return TRUE;
  81 }
  82
  83 static void radeon_r300_begin_cs(struct r300_winsys* winsys,
  84                                  int size,
  85                                  const char* file,
  86                                  const char* function,
  87                                  int line)
  88 {
  89     struct radeon_winsys_priv* priv =
  90         (struct radeon_winsys_priv*)winsys->radeon_winsys;
  91
  92     radeon_cs_begin(priv->cs, size, file, function, line);
  93 }
  94
  95 static void radeon_r300_write_cs_dword(struct r300_winsys* winsys,
  96                                        uint32_t dword)
  97 {
  98     struct radeon_winsys_priv* priv =
  99         (struct radeon_winsys_priv*)winsys->radeon_winsys;
 100
 101     radeon_cs_write_dword(priv->cs, dword);
 102 }
 103
 104 static void radeon_r300_write_cs_reloc(struct r300_winsys* winsys,
 105                                        struct pipe_buffer* pbuffer,
 106                                        uint32_t rd,
 107                                        uint32_t wd,
 108                                        uint32_t flags)
 109 {
 110     struct radeon_winsys_priv* priv =
 111         (struct radeon_winsys_priv*)winsys->radeon_winsys;
 112
 113     radeon_cs_write_reloc(priv->cs,
 114             ((struct radeon_pipe_buffer*)pbuffer)->bo, rd, wd, flags);
 115 }
 116
 117 static void radeon_r300_end_cs(struct r300_winsys* winsys,
 118                                const char* file,
 119                                const char* function,
 120                                int line)
 121 {
 122     struct radeon_winsys_priv* priv =
 123         (struct radeon_winsys_priv*)winsys->radeon_winsys;
 124
 125     radeon_cs_end(priv->cs, file, function, line);
 126 }
 127
 128 static void radeon_r300_flush_cs(struct r300_winsys* winsys)
 129 {
 130     struct radeon_winsys_priv* priv =
 131         (struct radeon_winsys_priv*)winsys->radeon_winsys;
 132     struct radeon_cs_space_check* sc = priv->sc;
 133     int retval = 1;
 134
 135     /* Emit the CS. */
 136     retval = radeon_cs_emit(priv->cs);
 137     if (retval) {
 138         debug_printf("radeon: Bad CS, dumping...\n");
 139         radeon_cs_print(priv->cs, stderr);
 140     }
 141     radeon_cs_erase(priv->cs);
 142
 143     /* Clean out BOs. */
 144     memset(sc, 0, sizeof(struct radeon_cs_space_check) * RADEON_MAX_BOS);
 145     priv->bo_count = 0;
 146 }
 147
 148 /* Helper function to do the ioctls needed for setup and init. */
 149 static void do_ioctls(struct r300_winsys* winsys, int fd)
 150 {
 151     struct drm_radeon_gem_info gem_info = {0};
 152     drm_radeon_getparam_t gp = {0};
 153     struct drm_radeon_info info = {0};
 154     int target = 0;
 155     int retval;
 156
 157     info.value = &target;
 158     gp.value = &target;
 159
 160     /* First, get PCI ID */
 161     info.request = RADEON_INFO_DEVICE_ID;
 162     retval = drmCommandWriteRead(fd, DRM_RADEON_INFO, &info, sizeof(info));
 163     if (retval) {
 164         fprintf(stderr, "%s: New ioctl for PCI ID failed "
 165                 "(error number %d), trying classic ioctl...\n",
 166                 __FUNCTION__, retval);
 167         gp.param = RADEON_PARAM_DEVICE_ID;
 168         retval = drmCommandWriteRead(fd, DRM_RADEON_GETPARAM, &gp,
 169                 sizeof(gp));
 170         if (retval) {
 171             fprintf(stderr, "%s: Failed to get PCI ID, "
 172                     "error number %d\n", __FUNCTION__, retval);
 173             exit(1);
 174         }
 175     }
 176     winsys->pci_id = target;
 177
 178     /* Then, retrieve MM info */
 179     retval = drmCommandWriteRead(fd, DRM_RADEON_GEM_INFO,
 180             &gem_info, sizeof(gem_info));
 181     if (retval) {
 182         fprintf(stderr, "%s: Failed to get MM info, error number %d\n",
 183                 __FUNCTION__, retval);
 184         exit(1);
 185     }
 186     winsys->gart_size = gem_info.gart_size;
 187     /* XXX */
 188     winsys->vram_size = gem_info.vram_visible;
 189 }
 190
 191 struct r300_winsys*
 192 radeon_create_r300_winsys(int fd, struct radeon_winsys* old_winsys)
 193 {
 194     struct r300_winsys* winsys = CALLOC_STRUCT(r300_winsys);
 195     struct radeon_winsys_priv* priv;
 196
 197     if (winsys == NULL) {
 198         return NULL;
 199     }
 200
 201     priv = old_winsys->priv;
 202
 203     do_ioctls(winsys, fd);
 204
 205     priv->csm = radeon_cs_manager_gem_ctor(fd);
 206
 207     priv->cs = radeon_cs_create(priv->csm, 1024 * 64 / 4);
 208     radeon_cs_set_limit(priv->cs,
 209             RADEON_GEM_DOMAIN_GTT, winsys->gart_size);
 210     radeon_cs_set_limit(priv->cs,
 211             RADEON_GEM_DOMAIN_VRAM, winsys->vram_size);
 212
 213     winsys->add_buffer = radeon_r300_add_buffer;
 214     winsys->validate = radeon_r300_validate;
 215
 216     winsys->check_cs = radeon_r300_check_cs;
 217     winsys->begin_cs = radeon_r300_begin_cs;
 218     winsys->write_cs_dword = radeon_r300_write_cs_dword;
 219     winsys->write_cs_reloc = radeon_r300_write_cs_reloc;
 220     winsys->end_cs = radeon_r300_end_cs;
 221     winsys->flush_cs = radeon_r300_flush_cs;
 222
 223     memcpy(winsys, old_winsys, sizeof(struct radeon_winsys));
 224
 225     return winsys;
 226 }