src/gallium/winsys/drm/radeon/core/radeon_r300.c

   1 /*
   2  * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * on the rights to use, copy, modify, merge, publish, distribute, sub
   8  * license, and/or sell copies of the Software, and to permit persons to whom
   9  * the Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  21  * USE OR OTHER DEALINGS IN THE SOFTWARE. */
  22
  23 #include "radeon_r300.h"
  24
  25 static void radeon_set_flush_cb(struct radeon_winsys *winsys,
  26                                 void (*flush_cb)(void *),
  27                                 void *data)
  28 {
  29     winsys->priv->flush_cb = flush_cb;
  30     winsys->priv->flush_data = data;
  31     radeon_cs_space_set_flush(winsys->priv->cs, flush_cb, data);
  32 }
  33
  34 static boolean radeon_add_buffer(struct radeon_winsys* winsys,
  35                                  struct pipe_buffer* pbuffer,
  36                                  uint32_t rd,
  37                                  uint32_t wd)
  38 {
  39     struct radeon_bo* bo = ((struct radeon_pipe_buffer*)pbuffer)->bo;
  40
  41     radeon_cs_space_add_persistent_bo(winsys->priv->cs, bo, rd, wd);
  42     return TRUE;
  43 }
  44
  45 static boolean radeon_validate(struct radeon_winsys* winsys)
  46 {
  47     if (radeon_cs_space_check(winsys->priv->cs) < 0) {
  48         return FALSE;
  49     }
  50
  51     /* Things are fine, we can proceed as normal. */
  52     return TRUE;
  53 }
  54
  55 static boolean radeon_check_cs(struct radeon_winsys* winsys, int size)
  56 {
  57     struct radeon_cs* cs = winsys->priv->cs;
  58
  59     return radeon_validate(winsys) && cs->cdw + size <= cs->ndw;
  60 }
  61
  62 static void radeon_begin_cs(struct radeon_winsys* winsys,
  63                             int size,
  64                             const char* file,
  65                             const char* function,
  66                             int line)
  67 {
  68     radeon_cs_begin(winsys->priv->cs, size, file, function, line);
  69 }
  70
  71 static void radeon_write_cs_dword(struct radeon_winsys* winsys,
  72                                   uint32_t dword)
  73 {
  74     radeon_cs_write_dword(winsys->priv->cs, dword);
  75 }
  76
  77 static void radeon_write_cs_reloc(struct radeon_winsys* winsys,
  78                                   struct pipe_buffer* pbuffer,
  79                                   uint32_t rd,
  80                                   uint32_t wd,
  81                                   uint32_t flags)
  82 {
  83     int retval = 0;
  84     struct radeon_pipe_buffer* radeon_buffer =
  85         (struct radeon_pipe_buffer*)pbuffer;
  86
  87     assert(!radeon_buffer->pb);
  88
  89     retval = radeon_cs_write_reloc(winsys->priv->cs, radeon_buffer->bo,
  90                                    rd, wd, flags);
  91
  92     if (retval) {
  93         debug_printf("radeon: Relocation of %p (%d, %d, %d) failed!\n",
  94                 pbuffer, rd, wd, flags);
  95     }
  96 }
  97
  98 static void radeon_reset_bos(struct radeon_winsys *winsys)
  99 {
 100     radeon_cs_space_reset_bos(winsys->priv->cs);
 101 }
 102
 103 static void radeon_end_cs(struct radeon_winsys* winsys,
 104                           const char* file,
 105                           const char* function,
 106                           int line)
 107 {
 108     radeon_cs_end(winsys->priv->cs, file, function, line);
 109 }
 110
 111 static void radeon_flush_cs(struct radeon_winsys* winsys)
 112 {
 113     int retval;
 114
 115     /* Don't flush a zero-sized CS. */
 116     if (!winsys->priv->cs->cdw) {
 117         return;
 118     }
 119
 120     /* Emit the CS. */
 121     retval = radeon_cs_emit(winsys->priv->cs);
 122     if (retval) {
 123         debug_printf("radeon: Bad CS, dumping...\n");
 124         radeon_cs_print(winsys->priv->cs, stderr);
 125     }
 126
 127     /* Reset CS.
 128      * Someday, when we care about performance, we should really find a way
 129      * to rotate between two or three CS objects so that the GPU can be
 130      * spinning through one CS while another one is being filled. */
 131     radeon_cs_erase(winsys->priv->cs);
 132 }
 133
 134 void
 135 radeon_setup_winsys(int fd, struct radeon_winsys* winsys)
 136 {
 137     struct radeon_winsys_priv* priv = winsys->priv;
 138
 139     priv->csm = radeon_cs_manager_gem_ctor(fd);
 140
 141     /* Size limit on IBs is 64 kibibytes. */
 142     priv->cs = radeon_cs_create(priv->csm, 1024 * 64 / 4);
 143     radeon_cs_set_limit(priv->cs,
 144             RADEON_GEM_DOMAIN_GTT, winsys->gart_size);
 145     radeon_cs_set_limit(priv->cs,
 146             RADEON_GEM_DOMAIN_VRAM, winsys->vram_size);
 147
 148     winsys->add_buffer = radeon_add_buffer;
 149     winsys->validate = radeon_validate;
 150
 151     winsys->check_cs = radeon_check_cs;
 152     winsys->begin_cs = radeon_begin_cs;
 153     winsys->write_cs_dword = radeon_write_cs_dword;
 154     winsys->write_cs_reloc = radeon_write_cs_reloc;
 155     winsys->end_cs = radeon_end_cs;
 156     winsys->flush_cs = radeon_flush_cs;
 157     winsys->reset_bos = radeon_reset_bos;
 158     winsys->set_flush_cb = radeon_set_flush_cb;
 159 }