2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
23 #include "radeon_r300.h"
25 static boolean
radeon_r300_add_buffer(struct r300_winsys
* winsys
,
26 struct pipe_buffer
* pbuffer
,
31 struct radeon_winsys_priv
* priv
=
32 (struct radeon_winsys_priv
*)winsys
->radeon_winsys
;
33 struct radeon_cs_space_check
* sc
= priv
->sc
;
34 struct radeon_bo
* bo
= ((struct radeon_pipe_buffer
*)pbuffer
)->bo
;
36 /* Check to see if this BO is already in line for validation;
37 * find a slot for it otherwise. */
38 for (i
= 0; i
< priv
->bo_count
; i
++) {
40 sc
[i
].read_domains
|= rd
;
41 sc
[i
].write_domain
|= wd
;
46 if (priv
->bo_count
>= RADEON_MAX_BOS
) {
47 /* Dohoho. Not falling for that one again. Request a flush. */
51 sc
[priv
->bo_count
].bo
= bo
;
52 sc
[priv
->bo_count
].read_domains
= rd
;
53 sc
[priv
->bo_count
].write_domain
= wd
;
59 static boolean
radeon_r300_validate(struct r300_winsys
* winsys
)
62 struct radeon_winsys_priv
* priv
=
63 (struct radeon_winsys_priv
*)winsys
->radeon_winsys
;
64 struct radeon_cs_space_check
* sc
= priv
->sc
;
66 retval
= radeon_cs_space_check(priv
->cs
, sc
, priv
->bo_count
);
68 if (retval
== RADEON_CS_SPACE_OP_TO_BIG
) {
69 /* We might as well HCF, since this is not going to fit in the card,
71 /* XXX just drop it on the floor instead */
73 } else if (retval
== RADEON_CS_SPACE_FLUSH
) {
74 /* We must flush before more rendering can commence. */
78 /* XXX should probably be its own function */
79 for (i
= 0; i
< priv
->bo_count
; i
++) {
80 if (sc
[i
].read_domains
&& sc
[i
].write_domain
) {
81 /* Cute, cute. We need to flush first. */
82 debug_printf("radeon: BO %p can't be read and written; "
83 "requesting flush.\n", sc
[i
].bo
);
88 /* Things are fine, we can proceed as normal. */
92 static boolean
radeon_r300_check_cs(struct r300_winsys
* winsys
, int size
)
94 /* XXX check size here, lazy ass! */
95 /* XXX also validate buffers */
99 static void radeon_r300_begin_cs(struct r300_winsys
* winsys
,
102 const char* function
,
105 struct radeon_winsys_priv
* priv
=
106 (struct radeon_winsys_priv
*)winsys
->radeon_winsys
;
108 radeon_cs_begin(priv
->cs
, size
, file
, function
, line
);
111 static void radeon_r300_write_cs_dword(struct r300_winsys
* winsys
,
114 struct radeon_winsys_priv
* priv
=
115 (struct radeon_winsys_priv
*)winsys
->radeon_winsys
;
117 radeon_cs_write_dword(priv
->cs
, dword
);
120 static void radeon_r300_write_cs_reloc(struct r300_winsys
* winsys
,
121 struct pipe_buffer
* pbuffer
,
126 struct radeon_winsys_priv
* priv
=
127 (struct radeon_winsys_priv
*)winsys
->radeon_winsys
;
130 retval
= radeon_cs_write_reloc(priv
->cs
,
131 ((struct radeon_pipe_buffer
*)pbuffer
)->bo
, rd
, wd
, flags
);
134 debug_printf("radeon: Relocation of %p (%d, %d, %d) failed!\n",
135 pbuffer
, rd
, wd
, flags
);
139 static void radeon_r300_end_cs(struct r300_winsys
* winsys
,
141 const char* function
,
144 struct radeon_winsys_priv
* priv
=
145 (struct radeon_winsys_priv
*)winsys
->radeon_winsys
;
147 radeon_cs_end(priv
->cs
, file
, function
, line
);
150 static void radeon_r300_flush_cs(struct r300_winsys
* winsys
)
152 struct radeon_winsys_priv
* priv
=
153 (struct radeon_winsys_priv
*)winsys
->radeon_winsys
;
154 struct radeon_cs_space_check
* sc
= priv
->sc
;
158 retval
= radeon_cs_emit(priv
->cs
);
160 debug_printf("radeon: Bad CS, dumping...\n");
161 radeon_cs_print(priv
->cs
, stderr
);
163 radeon_cs_erase(priv
->cs
);
166 memset(sc
, 0, sizeof(struct radeon_cs_space_check
) * RADEON_MAX_BOS
);
170 /* Helper function to do the ioctls needed for setup and init. */
171 static void do_ioctls(struct r300_winsys
* winsys
, int fd
)
173 struct drm_radeon_gem_info gem_info
= {0};
174 drm_radeon_getparam_t gp
= {0};
175 struct drm_radeon_info info
= {0};
179 info
.value
= &target
;
182 /* First, get PCI ID */
183 info
.request
= RADEON_INFO_DEVICE_ID
;
184 retval
= drmCommandWriteRead(fd
, DRM_RADEON_INFO
, &info
, sizeof(info
));
186 fprintf(stderr
, "%s: New ioctl for PCI ID failed "
187 "(error number %d), trying classic ioctl...\n",
188 __FUNCTION__
, retval
);
189 gp
.param
= RADEON_PARAM_DEVICE_ID
;
190 retval
= drmCommandWriteRead(fd
, DRM_RADEON_GETPARAM
, &gp
,
193 fprintf(stderr
, "%s: Failed to get PCI ID, "
194 "error number %d\n", __FUNCTION__
, retval
);
198 winsys
->pci_id
= target
;
200 /* Then, retrieve MM info */
201 retval
= drmCommandWriteRead(fd
, DRM_RADEON_GEM_INFO
,
202 &gem_info
, sizeof(gem_info
));
204 fprintf(stderr
, "%s: Failed to get MM info, error number %d\n",
205 __FUNCTION__
, retval
);
208 winsys
->gart_size
= gem_info
.gart_size
;
210 winsys
->vram_size
= gem_info
.vram_visible
;
214 radeon_create_r300_winsys(int fd
, struct radeon_winsys
* old_winsys
)
216 struct r300_winsys
* winsys
= CALLOC_STRUCT(r300_winsys
);
217 struct radeon_winsys_priv
* priv
;
219 if (winsys
== NULL
) {
223 priv
= old_winsys
->priv
;
225 do_ioctls(winsys
, fd
);
227 priv
->csm
= radeon_cs_manager_gem_ctor(fd
);
229 priv
->cs
= radeon_cs_create(priv
->csm
, 1024 * 64 / 4);
230 radeon_cs_set_limit(priv
->cs
,
231 RADEON_GEM_DOMAIN_GTT
, winsys
->gart_size
);
232 radeon_cs_set_limit(priv
->cs
,
233 RADEON_GEM_DOMAIN_VRAM
, winsys
->vram_size
);
235 winsys
->add_buffer
= radeon_r300_add_buffer
;
236 winsys
->validate
= radeon_r300_validate
;
238 winsys
->check_cs
= radeon_r300_check_cs
;
239 winsys
->begin_cs
= radeon_r300_begin_cs
;
240 winsys
->write_cs_dword
= radeon_r300_write_cs_dword
;
241 winsys
->write_cs_reloc
= radeon_r300_write_cs_reloc
;
242 winsys
->end_cs
= radeon_r300_end_cs
;
243 winsys
->flush_cs
= radeon_r300_flush_cs
;
245 memcpy(winsys
, old_winsys
, sizeof(struct radeon_winsys
));