2 * Mesa 3-D graphics library
4 * Copyright (C) 2012-2014 LunarG, Inc.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included
14 * in all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
25 * Chia-I Wu <olv@lunarg.com>
31 #define ETIME ETIMEDOUT
36 #include <intel_bufmgr.h>
38 #include "state_tracker/drm_driver.h"
39 #include "pipe/p_state.h"
40 #include "util/u_inlines.h"
41 #include "util/u_memory.h"
42 #include "util/u_debug.h"
43 #include "../intel_winsys.h"
45 #define BATCH_SZ (8192 * sizeof(uint32_t))
49 drm_intel_bufmgr
*bufmgr
;
50 struct intel_winsys_info info
;
52 struct drm_intel_decode
*decode
;
56 gem_bo(const struct intel_bo
*bo
)
58 return (drm_intel_bo
*) bo
;
62 get_param(struct intel_winsys
*winsys
, int param
, int *value
)
64 struct drm_i915_getparam gp
;
69 memset(&gp
, 0, sizeof(gp
));
73 err
= drmCommandWriteRead(winsys
->fd
, DRM_I915_GETPARAM
, &gp
, sizeof(gp
));
83 test_address_swizzling(struct intel_winsys
*winsys
)
86 uint32_t tiling
= I915_TILING_X
, swizzle
;
89 bo
= drm_intel_bo_alloc_tiled(winsys
->bufmgr
,
90 "address swizzling test", 64, 64, 4, &tiling
, &pitch
, 0);
92 drm_intel_bo_get_tiling(bo
, &tiling
, &swizzle
);
93 drm_intel_bo_unreference(bo
);
96 swizzle
= I915_BIT_6_SWIZZLE_NONE
;
99 return (swizzle
!= I915_BIT_6_SWIZZLE_NONE
);
103 init_info(struct intel_winsys
*winsys
)
105 struct intel_winsys_info
*info
= &winsys
->info
;
109 * When we need the Nth vertex from a user vertex buffer, and the vertex is
110 * uploaded to, say, the beginning of a bo, we want the first vertex in the
111 * bo to be fetched. One way to do this is to set the base address of the
114 * bo->offset64 + (vb->buffer_offset - vb->stride * N).
116 * The second term may be negative, and we need kernel support to do that.
118 * This check is taken from the classic driver. u_vbuf_upload_buffers()
119 * guarantees the term is never negative, but it is good to require a
122 get_param(winsys
, I915_PARAM_HAS_RELAXED_DELTA
, &val
);
124 debug_error("kernel 2.6.39 required");
128 info
->devid
= drm_intel_bufmgr_gem_get_devid(winsys
->bufmgr
);
130 get_param(winsys
, I915_PARAM_HAS_LLC
, &val
);
133 get_param(winsys
, I915_PARAM_HAS_GEN7_SOL_RESET
, &val
);
134 info
->has_gen7_sol_reset
= val
;
136 info
->has_address_swizzling
= test_address_swizzling(winsys
);
141 struct intel_winsys
*
142 intel_winsys_create_for_fd(int fd
)
144 struct intel_winsys
*winsys
;
146 winsys
= CALLOC_STRUCT(intel_winsys
);
152 winsys
->bufmgr
= drm_intel_bufmgr_gem_init(winsys
->fd
, BATCH_SZ
);
153 if (!winsys
->bufmgr
) {
154 debug_error("failed to create GEM buffer manager");
159 if (!init_info(winsys
)) {
160 drm_intel_bufmgr_destroy(winsys
->bufmgr
);
166 * No need to implicitly set up a fence register for each non-linear reloc
167 * entry. When a fence register is needed for a reloc entry,
168 * drm_intel_bo_emit_reloc_fence() will be called explicitly.
170 * intel_bo_add_reloc() currently lacks "bool fenced" for this to work.
171 * But we never need a fence register on GEN4+ so we do not need to worry
174 drm_intel_bufmgr_gem_enable_fenced_relocs(winsys
->bufmgr
);
176 drm_intel_bufmgr_gem_enable_reuse(winsys
->bufmgr
);
182 intel_winsys_destroy(struct intel_winsys
*winsys
)
185 drm_intel_decode_context_free(winsys
->decode
);
187 drm_intel_bufmgr_destroy(winsys
->bufmgr
);
191 const struct intel_winsys_info
*
192 intel_winsys_get_info(const struct intel_winsys
*winsys
)
194 return &winsys
->info
;
197 struct intel_context
*
198 intel_winsys_create_context(struct intel_winsys
*winsys
)
200 return (struct intel_context
*)
201 drm_intel_gem_context_create(winsys
->bufmgr
);
205 intel_winsys_destroy_context(struct intel_winsys
*winsys
,
206 struct intel_context
*ctx
)
208 drm_intel_gem_context_destroy((drm_intel_context
*) ctx
);
212 intel_winsys_read_reg(struct intel_winsys
*winsys
,
213 uint32_t reg
, uint64_t *val
)
215 return drm_intel_reg_read(winsys
->bufmgr
, reg
, val
);
219 intel_winsys_alloc_buffer(struct intel_winsys
*winsys
,
222 uint32_t initial_domain
)
224 const bool for_render
=
225 (initial_domain
& (INTEL_DOMAIN_RENDER
| INTEL_DOMAIN_INSTRUCTION
));
226 const int alignment
= 4096; /* always page-aligned */
230 bo
= drm_intel_bo_alloc_for_render(winsys
->bufmgr
,
231 name
, size
, alignment
);
234 bo
= drm_intel_bo_alloc(winsys
->bufmgr
, name
, size
, alignment
);
237 return (struct intel_bo
*) bo
;
241 intel_winsys_alloc_texture(struct intel_winsys
*winsys
,
243 int width
, int height
, int cpp
,
244 enum intel_tiling_mode tiling
,
245 uint32_t initial_domain
,
246 unsigned long *pitch
)
248 const unsigned long flags
=
249 (initial_domain
& (INTEL_DOMAIN_RENDER
| INTEL_DOMAIN_INSTRUCTION
)) ?
250 BO_ALLOC_FOR_RENDER
: 0;
251 uint32_t real_tiling
= tiling
;
254 bo
= drm_intel_bo_alloc_tiled(winsys
->bufmgr
, name
,
255 width
, height
, cpp
, &real_tiling
, pitch
, flags
);
259 if (real_tiling
!= tiling
) {
260 assert(!"tiling mismatch");
261 drm_intel_bo_unreference(bo
);
265 return (struct intel_bo
*) bo
;
269 intel_winsys_import_handle(struct intel_winsys
*winsys
,
271 const struct winsys_handle
*handle
,
272 int width
, int height
, int cpp
,
273 enum intel_tiling_mode
*tiling
,
274 unsigned long *pitch
)
276 uint32_t real_tiling
, swizzle
;
280 switch (handle
->type
) {
281 case DRM_API_HANDLE_TYPE_SHARED
:
283 const uint32_t gem_name
= handle
->handle
;
284 bo
= drm_intel_bo_gem_create_from_name(winsys
->bufmgr
,
288 case DRM_API_HANDLE_TYPE_FD
:
290 const int fd
= (int) handle
->handle
;
291 bo
= drm_intel_bo_gem_create_from_prime(winsys
->bufmgr
,
292 fd
, height
* handle
->stride
);
303 err
= drm_intel_bo_get_tiling(bo
, &real_tiling
, &swizzle
);
305 drm_intel_bo_unreference(bo
);
309 *tiling
= real_tiling
;
310 *pitch
= handle
->stride
;
312 return (struct intel_bo
*) bo
;
316 intel_winsys_export_handle(struct intel_winsys
*winsys
,
318 enum intel_tiling_mode tiling
,
320 struct winsys_handle
*handle
)
324 switch (handle
->type
) {
325 case DRM_API_HANDLE_TYPE_SHARED
:
329 err
= drm_intel_bo_flink(gem_bo(bo
), &name
);
331 handle
->handle
= name
;
334 case DRM_API_HANDLE_TYPE_KMS
:
335 handle
->handle
= gem_bo(bo
)->handle
;
337 case DRM_API_HANDLE_TYPE_FD
:
341 err
= drm_intel_bo_gem_export_to_prime(gem_bo(bo
), &fd
);
354 handle
->stride
= pitch
;
360 intel_winsys_check_aperture_space(struct intel_winsys
*winsys
,
361 struct intel_bo
**bo_array
,
364 return drm_intel_bufmgr_check_aperture_space((drm_intel_bo
**) bo_array
,
369 intel_winsys_decode_commands(struct intel_winsys
*winsys
,
370 struct intel_bo
*bo
, int used
)
374 if (!winsys
->decode
) {
375 winsys
->decode
= drm_intel_decode_context_alloc(winsys
->info
.devid
);
379 /* debug_printf()/debug_error() uses stderr by default */
380 drm_intel_decode_set_output_file(winsys
->decode
, stderr
);
383 ptr
= intel_bo_map(bo
, false);
385 debug_printf("failed to map buffer for decoding\n");
392 drm_intel_decode_set_batch_pointer(winsys
->decode
,
393 ptr
, gem_bo(bo
)->offset64
, used
);
395 drm_intel_decode(winsys
->decode
);
401 intel_bo_reference(struct intel_bo
*bo
)
403 drm_intel_bo_reference(gem_bo(bo
));
407 intel_bo_unreference(struct intel_bo
*bo
)
409 drm_intel_bo_unreference(gem_bo(bo
));
413 intel_bo_map(struct intel_bo
*bo
, bool write_enable
)
417 err
= drm_intel_bo_map(gem_bo(bo
), write_enable
);
419 debug_error("failed to map bo");
423 return gem_bo(bo
)->virtual;
427 intel_bo_map_gtt(struct intel_bo
*bo
)
431 err
= drm_intel_gem_bo_map_gtt(gem_bo(bo
));
433 debug_error("failed to map bo");
437 return gem_bo(bo
)->virtual;
441 intel_bo_map_unsynchronized(struct intel_bo
*bo
)
445 err
= drm_intel_gem_bo_map_unsynchronized(gem_bo(bo
));
447 debug_error("failed to map bo");
451 return gem_bo(bo
)->virtual;
455 intel_bo_unmap(struct intel_bo
*bo
)
459 err
= drm_intel_bo_unmap(gem_bo(bo
));
464 intel_bo_pwrite(struct intel_bo
*bo
, unsigned long offset
,
465 unsigned long size
, const void *data
)
467 return drm_intel_bo_subdata(gem_bo(bo
), offset
, size
, data
);
471 intel_bo_pread(struct intel_bo
*bo
, unsigned long offset
,
472 unsigned long size
, void *data
)
474 return drm_intel_bo_get_subdata(gem_bo(bo
), offset
, size
, data
);
478 intel_bo_add_reloc(struct intel_bo
*bo
, uint32_t offset
,
479 struct intel_bo
*target_bo
, uint32_t target_offset
,
480 uint32_t read_domains
, uint32_t write_domain
,
481 uint64_t *presumed_offset
)
485 err
= drm_intel_bo_emit_reloc(gem_bo(bo
), offset
,
486 gem_bo(target_bo
), target_offset
,
487 read_domains
, write_domain
);
489 *presumed_offset
= gem_bo(target_bo
)->offset64
+ target_offset
;
495 intel_bo_get_reloc_count(struct intel_bo
*bo
)
497 return drm_intel_gem_bo_get_reloc_count(gem_bo(bo
));
501 intel_bo_truncate_relocs(struct intel_bo
*bo
, int start
)
503 drm_intel_gem_bo_clear_relocs(gem_bo(bo
), start
);
507 intel_bo_has_reloc(struct intel_bo
*bo
, struct intel_bo
*target_bo
)
509 return drm_intel_bo_references(gem_bo(bo
), gem_bo(target_bo
));
513 intel_bo_exec(struct intel_bo
*bo
, int used
,
514 struct intel_context
*ctx
, unsigned long flags
)
517 return drm_intel_gem_bo_context_exec(gem_bo(bo
),
518 (drm_intel_context
*) ctx
, used
, flags
);
521 return drm_intel_bo_mrb_exec(gem_bo(bo
),
522 used
, NULL
, 0, 0, flags
);
527 intel_bo_wait(struct intel_bo
*bo
, int64_t timeout
)
531 err
= drm_intel_gem_bo_wait(gem_bo(bo
), timeout
);
532 /* consider the bo idle on errors */
533 if (err
&& err
!= -ETIME
)