src/gallium/winsys/intel/drm/intel_drm_winsys.c

   1 /*
   2  * Mesa 3-D graphics library
   3  *
   4  * Copyright (C) 2012-2014 LunarG, Inc.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included
  14  * in all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22  * DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors:
  25  *    Chia-I Wu <olv@lunarg.com>
  26  */
  27
  28 #include <string.h>
  29 #include <errno.h>
  30 #ifndef ETIME
  31 #define ETIME ETIMEDOUT
  32 #endif
  33
  34 #include <xf86drm.h>
  35 #include <i915_drm.h>
  36 #include <intel_bufmgr.h>
  37
  38 #include "os/os_thread.h"
  39 #include "state_tracker/drm_driver.h"
  40 #include "pipe/p_state.h"
  41 #include "util/u_inlines.h"
  42 #include "util/u_memory.h"
  43 #include "util/u_debug.h"
  44 #include "../intel_winsys.h"
  45
  46 #define BATCH_SZ (8192 * sizeof(uint32_t))
  47
  48 struct intel_winsys {
  49    int fd;
  50    drm_intel_bufmgr *bufmgr;
  51    struct intel_winsys_info info;
  52
  53    /* these are protected by the mutex */
  54    pipe_mutex mutex;
  55    drm_intel_context *first_gem_ctx;
  56    struct drm_intel_decode *decode;
  57 };
  58
  59 static drm_intel_bo *
  60 gem_bo(const struct intel_bo *bo)
  61 {
  62    return (drm_intel_bo *) bo;
  63 }
  64
  65 static bool
  66 get_param(struct intel_winsys *winsys, int param, int *value)
  67 {
  68    struct drm_i915_getparam gp;
  69    int err;
  70
  71    *value = 0;
  72
  73    memset(&gp, 0, sizeof(gp));
  74    gp.param = param;
  75    gp.value = value;
  76
  77    err = drmCommandWriteRead(winsys->fd, DRM_I915_GETPARAM, &gp, sizeof(gp));
  78    if (err) {
  79       *value = 0;
  80       return false;
  81    }
  82
  83    return true;
  84 }
  85
  86 static bool
  87 test_address_swizzling(struct intel_winsys *winsys)
  88 {
  89    drm_intel_bo *bo;
  90    uint32_t tiling = I915_TILING_X, swizzle;
  91    unsigned long pitch;
  92
  93    bo = drm_intel_bo_alloc_tiled(winsys->bufmgr,
  94          "address swizzling test", 64, 64, 4, &tiling, &pitch, 0);
  95    if (bo) {
  96       drm_intel_bo_get_tiling(bo, &tiling, &swizzle);
  97       drm_intel_bo_unreference(bo);
  98    }
  99    else {
 100       swizzle = I915_BIT_6_SWIZZLE_NONE;
 101    }
 102
 103    return (swizzle != I915_BIT_6_SWIZZLE_NONE);
 104 }
 105
 106 static bool
 107 test_reg_read(struct intel_winsys *winsys, uint32_t reg)
 108 {
 109    uint64_t dummy;
 110
 111    return !drm_intel_reg_read(winsys->bufmgr, reg, &dummy);
 112 }
 113
 114 static bool
 115 probe_winsys(struct intel_winsys *winsys)
 116 {
 117    struct intel_winsys_info *info = &winsys->info;
 118    int val;
 119
 120    /*
 121     * When we need the Nth vertex from a user vertex buffer, and the vertex is
 122     * uploaded to, say, the beginning of a bo, we want the first vertex in the
 123     * bo to be fetched.  One way to do this is to set the base address of the
 124     * vertex buffer to
 125     *
 126     *   bo->offset64 + (vb->buffer_offset - vb->stride * N).
 127     *
 128     * The second term may be negative, and we need kernel support to do that.
 129     *
 130     * This check is taken from the classic driver.  u_vbuf_upload_buffers()
 131     * guarantees the term is never negative, but it is good to require a
 132     * recent kernel.
 133     */
 134    get_param(winsys, I915_PARAM_HAS_RELAXED_DELTA, &val);
 135    if (!val) {
 136       debug_error("kernel 2.6.39 required");
 137       return false;
 138    }
 139
 140    info->devid = drm_intel_bufmgr_gem_get_devid(winsys->bufmgr);
 141
 142    if (drm_intel_get_aperture_sizes(winsys->fd,
 143          &info->aperture_mappable, &info->aperture_total)) {
 144       debug_error("failed to query aperture sizes");
 145       return false;
 146    }
 147
 148    info->max_batch_size = BATCH_SZ;
 149
 150    get_param(winsys, I915_PARAM_HAS_LLC, &val);
 151    info->has_llc = val;
 152    info->has_address_swizzling = test_address_swizzling(winsys);
 153
 154    winsys->first_gem_ctx = drm_intel_gem_context_create(winsys->bufmgr);
 155    info->has_logical_context = (winsys->first_gem_ctx != NULL);
 156
 157    get_param(winsys, I915_PARAM_HAS_ALIASING_PPGTT, &val);
 158    info->has_ppgtt = val;
 159
 160    /* test TIMESTAMP read */
 161    info->has_timestamp = test_reg_read(winsys, 0x2358);
 162
 163    get_param(winsys, I915_PARAM_HAS_GEN7_SOL_RESET, &val);
 164    info->has_gen7_sol_reset = val;
 165
 166    return true;
 167 }
 168
 169 struct intel_winsys *
 170 intel_winsys_create_for_fd(int fd)
 171 {
 172    struct intel_winsys *winsys;
 173
 174    winsys = CALLOC_STRUCT(intel_winsys);
 175    if (!winsys)
 176       return NULL;
 177
 178    winsys->fd = fd;
 179
 180    winsys->bufmgr = drm_intel_bufmgr_gem_init(winsys->fd, BATCH_SZ);
 181    if (!winsys->bufmgr) {
 182       debug_error("failed to create GEM buffer manager");
 183       FREE(winsys);
 184       return NULL;
 185    }
 186
 187    pipe_mutex_init(winsys->mutex);
 188
 189    if (!probe_winsys(winsys)) {
 190       pipe_mutex_destroy(winsys->mutex);
 191       drm_intel_bufmgr_destroy(winsys->bufmgr);
 192       FREE(winsys);
 193       return NULL;
 194    }
 195
 196    /*
 197     * No need to implicitly set up a fence register for each non-linear reloc
 198     * entry.  When a fence register is needed for a reloc entry,
 199     * drm_intel_bo_emit_reloc_fence() will be called explicitly.
 200     *
 201     * intel_bo_add_reloc() currently lacks "bool fenced" for this to work.
 202     * But we never need a fence register on GEN4+ so we do not need to worry
 203     * about it yet.
 204     */
 205    drm_intel_bufmgr_gem_enable_fenced_relocs(winsys->bufmgr);
 206
 207    drm_intel_bufmgr_gem_enable_reuse(winsys->bufmgr);
 208
 209    return winsys;
 210 }
 211
 212 void
 213 intel_winsys_destroy(struct intel_winsys *winsys)
 214 {
 215    if (winsys->decode)
 216       drm_intel_decode_context_free(winsys->decode);
 217
 218    if (winsys->first_gem_ctx)
 219       drm_intel_gem_context_destroy(winsys->first_gem_ctx);
 220
 221    pipe_mutex_destroy(winsys->mutex);
 222    drm_intel_bufmgr_destroy(winsys->bufmgr);
 223    FREE(winsys);
 224 }
 225
 226 const struct intel_winsys_info *
 227 intel_winsys_get_info(const struct intel_winsys *winsys)
 228 {
 229    return &winsys->info;
 230 }
 231
 232 struct intel_context *
 233 intel_winsys_create_context(struct intel_winsys *winsys)
 234 {
 235    drm_intel_context *gem_ctx;
 236
 237    /* try the preallocated context first */
 238    pipe_mutex_lock(winsys->mutex);
 239    gem_ctx = winsys->first_gem_ctx;
 240    winsys->first_gem_ctx = NULL;
 241    pipe_mutex_unlock(winsys->mutex);
 242
 243    if (!gem_ctx)
 244       gem_ctx = drm_intel_gem_context_create(winsys->bufmgr);
 245
 246    return (struct intel_context *) gem_ctx;
 247 }
 248
 249 void
 250 intel_winsys_destroy_context(struct intel_winsys *winsys,
 251                              struct intel_context *ctx)
 252 {
 253    drm_intel_gem_context_destroy((drm_intel_context *) ctx);
 254 }
 255
 256 int
 257 intel_winsys_read_reg(struct intel_winsys *winsys,
 258                       uint32_t reg, uint64_t *val)
 259 {
 260    return drm_intel_reg_read(winsys->bufmgr, reg, val);
 261 }
 262
 263 struct intel_bo *
 264 intel_winsys_alloc_bo(struct intel_winsys *winsys,
 265                       const char *name,
 266                       enum intel_tiling_mode tiling,
 267                       unsigned long pitch,
 268                       unsigned long height,
 269                       uint32_t initial_domain)
 270 {
 271    const bool for_render =
 272       (initial_domain & (INTEL_DOMAIN_RENDER | INTEL_DOMAIN_INSTRUCTION));
 273    const unsigned int alignment = 4096; /* always page-aligned */
 274    unsigned long size;
 275    drm_intel_bo *bo;
 276
 277    switch (tiling) {
 278    case INTEL_TILING_X:
 279       if (pitch % 512)
 280          return NULL;
 281       break;
 282    case INTEL_TILING_Y:
 283       if (pitch % 128)
 284          return NULL;
 285       break;
 286    default:
 287       break;
 288    }
 289
 290    if (pitch > ULONG_MAX / height)
 291       return NULL;
 292
 293    size = pitch * height;
 294
 295    if (for_render) {
 296       bo = drm_intel_bo_alloc_for_render(winsys->bufmgr,
 297             name, size, alignment);
 298    }
 299    else {
 300       bo = drm_intel_bo_alloc(winsys->bufmgr, name, size, alignment);
 301    }
 302
 303    if (bo && tiling != INTEL_TILING_NONE) {
 304       uint32_t real_tiling = tiling;
 305       int err;
 306
 307       err = drm_intel_bo_set_tiling(bo, &real_tiling, pitch);
 308       if (err || real_tiling != tiling) {
 309          assert(!"tiling mismatch");
 310          drm_intel_bo_unreference(bo);
 311          return NULL;
 312       }
 313    }
 314
 315    return (struct intel_bo *) bo;
 316 }
 317
 318 struct intel_bo *
 319 intel_winsys_import_handle(struct intel_winsys *winsys,
 320                            const char *name,
 321                            const struct winsys_handle *handle,
 322                            unsigned long height,
 323                            enum intel_tiling_mode *tiling,
 324                            unsigned long *pitch)
 325 {
 326    uint32_t real_tiling, swizzle;
 327    drm_intel_bo *bo;
 328    int err;
 329
 330    switch (handle->type) {
 331    case DRM_API_HANDLE_TYPE_SHARED:
 332       {
 333          const uint32_t gem_name = handle->handle;
 334          bo = drm_intel_bo_gem_create_from_name(winsys->bufmgr,
 335                name, gem_name);
 336       }
 337       break;
 338    case DRM_API_HANDLE_TYPE_FD:
 339       {
 340          const int fd = (int) handle->handle;
 341          bo = drm_intel_bo_gem_create_from_prime(winsys->bufmgr,
 342                fd, height * handle->stride);
 343       }
 344       break;
 345    default:
 346       bo = NULL;
 347       break;
 348    }
 349
 350    if (!bo)
 351       return NULL;
 352
 353    err = drm_intel_bo_get_tiling(bo, &real_tiling, &swizzle);
 354    if (err) {
 355       drm_intel_bo_unreference(bo);
 356       return NULL;
 357    }
 358
 359    *tiling = real_tiling;
 360    *pitch = handle->stride;
 361
 362    return (struct intel_bo *) bo;
 363 }
 364
 365 int
 366 intel_winsys_export_handle(struct intel_winsys *winsys,
 367                            struct intel_bo *bo,
 368                            enum intel_tiling_mode tiling,
 369                            unsigned long pitch,
 370                            unsigned long height,
 371                            struct winsys_handle *handle)
 372 {
 373    int err = 0;
 374
 375    switch (handle->type) {
 376    case DRM_API_HANDLE_TYPE_SHARED:
 377       {
 378          uint32_t name;
 379
 380          err = drm_intel_bo_flink(gem_bo(bo), &name);
 381          if (!err)
 382             handle->handle = name;
 383       }
 384       break;
 385    case DRM_API_HANDLE_TYPE_KMS:
 386       handle->handle = gem_bo(bo)->handle;
 387       break;
 388    case DRM_API_HANDLE_TYPE_FD:
 389       {
 390          int fd;
 391
 392          err = drm_intel_bo_gem_export_to_prime(gem_bo(bo), &fd);
 393          if (!err)
 394             handle->handle = fd;
 395       }
 396       break;
 397    default:
 398       err = -EINVAL;
 399       break;
 400    }
 401
 402    if (err)
 403       return err;
 404
 405    handle->stride = pitch;
 406
 407    return 0;
 408 }
 409
 410 bool
 411 intel_winsys_can_submit_bo(struct intel_winsys *winsys,
 412                            struct intel_bo **bo_array,
 413                            int count)
 414 {
 415    return !drm_intel_bufmgr_check_aperture_space((drm_intel_bo **) bo_array,
 416                                                  count);
 417 }
 418
 419 int
 420 intel_winsys_submit_bo(struct intel_winsys *winsys,
 421                        enum intel_ring_type ring,
 422                        struct intel_bo *bo, int used,
 423                        struct intel_context *ctx,
 424                        unsigned long flags)
 425 {
 426    const unsigned long exec_flags = (unsigned long) ring | flags;
 427
 428    /* logical contexts are only available for the render ring */
 429    if (ring != INTEL_RING_RENDER)
 430       ctx = NULL;
 431
 432    if (ctx) {
 433       return drm_intel_gem_bo_context_exec(gem_bo(bo),
 434             (drm_intel_context *) ctx, used, exec_flags);
 435    }
 436    else {
 437       return drm_intel_bo_mrb_exec(gem_bo(bo),
 438             used, NULL, 0, 0, exec_flags);
 439    }
 440 }
 441
 442 void
 443 intel_winsys_decode_bo(struct intel_winsys *winsys,
 444                        struct intel_bo *bo, int used)
 445 {
 446    void *ptr;
 447
 448    ptr = intel_bo_map(bo, false);
 449    if (!ptr) {
 450       debug_printf("failed to map buffer for decoding\n");
 451       return;
 452    }
 453
 454    pipe_mutex_lock(winsys->mutex);
 455
 456    if (!winsys->decode) {
 457       winsys->decode = drm_intel_decode_context_alloc(winsys->info.devid);
 458       if (!winsys->decode) {
 459          pipe_mutex_unlock(winsys->mutex);
 460          intel_bo_unmap(bo);
 461          return;
 462       }
 463
 464       /* debug_printf()/debug_error() uses stderr by default */
 465       drm_intel_decode_set_output_file(winsys->decode, stderr);
 466    }
 467
 468    /* in dwords */
 469    used /= 4;
 470
 471    drm_intel_decode_set_batch_pointer(winsys->decode,
 472          ptr, gem_bo(bo)->offset64, used);
 473
 474    drm_intel_decode(winsys->decode);
 475
 476    pipe_mutex_unlock(winsys->mutex);
 477
 478    intel_bo_unmap(bo);
 479 }
 480
 481 void
 482 intel_bo_reference(struct intel_bo *bo)
 483 {
 484    drm_intel_bo_reference(gem_bo(bo));
 485 }
 486
 487 void
 488 intel_bo_unreference(struct intel_bo *bo)
 489 {
 490    drm_intel_bo_unreference(gem_bo(bo));
 491 }
 492
 493 void *
 494 intel_bo_map(struct intel_bo *bo, bool write_enable)
 495 {
 496    int err;
 497
 498    err = drm_intel_bo_map(gem_bo(bo), write_enable);
 499    if (err) {
 500       debug_error("failed to map bo");
 501       return NULL;
 502    }
 503
 504    return gem_bo(bo)->virtual;
 505 }
 506
 507 void *
 508 intel_bo_map_gtt(struct intel_bo *bo)
 509 {
 510    int err;
 511
 512    err = drm_intel_gem_bo_map_gtt(gem_bo(bo));
 513    if (err) {
 514       debug_error("failed to map bo");
 515       return NULL;
 516    }
 517
 518    return gem_bo(bo)->virtual;
 519 }
 520
 521 void *
 522 intel_bo_map_unsynchronized(struct intel_bo *bo)
 523 {
 524    int err;
 525
 526    err = drm_intel_gem_bo_map_unsynchronized(gem_bo(bo));
 527    if (err) {
 528       debug_error("failed to map bo");
 529       return NULL;
 530    }
 531
 532    return gem_bo(bo)->virtual;
 533 }
 534
 535 void
 536 intel_bo_unmap(struct intel_bo *bo)
 537 {
 538    int err;
 539
 540    err = drm_intel_bo_unmap(gem_bo(bo));
 541    assert(!err);
 542 }
 543
 544 int
 545 intel_bo_pwrite(struct intel_bo *bo, unsigned long offset,
 546                 unsigned long size, const void *data)
 547 {
 548    return drm_intel_bo_subdata(gem_bo(bo), offset, size, data);
 549 }
 550
 551 int
 552 intel_bo_pread(struct intel_bo *bo, unsigned long offset,
 553                unsigned long size, void *data)
 554 {
 555    return drm_intel_bo_get_subdata(gem_bo(bo), offset, size, data);
 556 }
 557
 558 int
 559 intel_bo_add_reloc(struct intel_bo *bo, uint32_t offset,
 560                    struct intel_bo *target_bo, uint32_t target_offset,
 561                    uint32_t read_domains, uint32_t write_domain,
 562                    uint64_t *presumed_offset)
 563 {
 564    int err;
 565
 566    err = drm_intel_bo_emit_reloc(gem_bo(bo), offset,
 567          gem_bo(target_bo), target_offset,
 568          read_domains, write_domain);
 569
 570    *presumed_offset = gem_bo(target_bo)->offset64 + target_offset;
 571
 572    return err;
 573 }
 574
 575 int
 576 intel_bo_get_reloc_count(struct intel_bo *bo)
 577 {
 578    return drm_intel_gem_bo_get_reloc_count(gem_bo(bo));
 579 }
 580
 581 void
 582 intel_bo_truncate_relocs(struct intel_bo *bo, int start)
 583 {
 584    drm_intel_gem_bo_clear_relocs(gem_bo(bo), start);
 585 }
 586
 587 bool
 588 intel_bo_has_reloc(struct intel_bo *bo, struct intel_bo *target_bo)
 589 {
 590    return drm_intel_bo_references(gem_bo(bo), gem_bo(target_bo));
 591 }
 592
 593 int
 594 intel_bo_wait(struct intel_bo *bo, int64_t timeout)
 595 {
 596    int err;
 597
 598    err = drm_intel_gem_bo_wait(gem_bo(bo), timeout);
 599    /* consider the bo idle on errors */
 600    if (err && err != -ETIME)
 601       err = 0;
 602
 603    return err;
 604 }