src/gallium/winsys/intel/intel_winsys.h

   1 /*
   2  * Mesa 3-D graphics library
   3  *
   4  * Copyright (C) 2012-2014 LunarG, Inc.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included
  14  * in all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22  * DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors:
  25  *    Chia-I Wu <olv@lunarg.com>
  26  */
  27
  28 #ifndef INTEL_WINSYS_H
  29 #define INTEL_WINSYS_H
  30
  31 #include "pipe/p_compiler.h"
  32
  33 /* this is compatible with i915_drm.h's definitions */
  34 enum intel_exec_flag {
  35    /* bits[2:0]: ring type */
  36    INTEL_EXEC_DEFAULT         = 0 << 0,
  37    INTEL_EXEC_RENDER          = 1 << 0,
  38    INTEL_EXEC_BSD             = 2 << 0,
  39    INTEL_EXEC_BLT             = 3 << 0,
  40
  41    /* bits[7:6]: constant buffer addressing mode */
  42
  43    /* bits[8]: reset SO write offset register on GEN7+ */
  44    INTEL_EXEC_GEN7_SOL_RESET  = 1 << 8,
  45 };
  46
  47 /* this is compatible with i915_drm.h's definitions */
  48 enum intel_domain_flag {
  49    INTEL_DOMAIN_CPU           = 0x00000001,
  50    INTEL_DOMAIN_RENDER        = 0x00000002,
  51    INTEL_DOMAIN_SAMPLER       = 0x00000004,
  52    INTEL_DOMAIN_COMMAND       = 0x00000008,
  53    INTEL_DOMAIN_INSTRUCTION   = 0x00000010,
  54    INTEL_DOMAIN_VERTEX        = 0x00000020,
  55    INTEL_DOMAIN_GTT           = 0x00000040,
  56 };
  57
  58 /* this is compatible with i915_drm.h's definitions */
  59 enum intel_tiling_mode {
  60    INTEL_TILING_NONE = 0,
  61    INTEL_TILING_X    = 1,
  62    INTEL_TILING_Y    = 2,
  63 };
  64
  65 struct winsys_handle;
  66 struct intel_winsys;
  67 struct intel_context;
  68 struct intel_bo;
  69
  70 struct intel_winsys_info {
  71    int devid;
  72
  73    bool has_llc;
  74    bool has_gen7_sol_reset;
  75    bool has_address_swizzling;
  76
  77    /* valid registers for intel_winsys_read_reg() */
  78    bool has_timestamp;
  79 };
  80
  81 struct intel_winsys *
  82 intel_winsys_create_for_fd(int fd);
  83
  84 void
  85 intel_winsys_destroy(struct intel_winsys *winsys);
  86
  87 const struct intel_winsys_info *
  88 intel_winsys_get_info(const struct intel_winsys *winsys);
  89
  90 /**
  91  * Create a logical context for use with the render ring.
  92  */
  93 struct intel_context *
  94 intel_winsys_create_context(struct intel_winsys *winsys);
  95
  96 /**
  97  * Destroy a logical context.
  98  */
  99 void
 100 intel_winsys_destroy_context(struct intel_winsys *winsys,
 101                              struct intel_context *ctx);
 102
 103 /**
 104  * Read a register.  Only registers that are considered safe, such as
 105  *
 106  *   TIMESTAMP (0x2358)
 107  *
 108  * can be read.
 109  */
 110 int
 111 intel_winsys_read_reg(struct intel_winsys *winsys,
 112                       uint32_t reg, uint64_t *val);
 113
 114 /**
 115  * Allocate a linear buffer object.
 116  *
 117  * \param name             Informative description of the bo.
 118  * \param size             Size of the bo.
 119  * \param initial_domain   Initial (write) domain.
 120  */
 121 struct intel_bo *
 122 intel_winsys_alloc_buffer(struct intel_winsys *winsys,
 123                           const char *name,
 124                           unsigned long size,
 125                           uint32_t initial_domain);
 126
 127 /**
 128  * Allocate a 2-dimentional buffer object.
 129  *
 130  * \param name             Informative description of the bo.
 131  * \param width            Width of the bo.
 132  * \param height           Height of the bo.
 133  * \param cpp              Bytes per texel.
 134  * \param tiling           Tiling mode.
 135  * \param initial_domain   Initial (write) domain.
 136  * \param pitch            Pitch of the bo.
 137  */
 138 struct intel_bo *
 139 intel_winsys_alloc_texture(struct intel_winsys *winsys,
 140                            const char *name,
 141                            int width, int height, int cpp,
 142                            enum intel_tiling_mode tiling,
 143                            uint32_t initial_domain,
 144                            unsigned long *pitch);
 145
 146 /**
 147  * Create a bo from a winsys handle.
 148  */
 149 struct intel_bo *
 150 intel_winsys_import_handle(struct intel_winsys *winsys,
 151                            const char *name,
 152                            const struct winsys_handle *handle,
 153                            int width, int height, int cpp,
 154                            enum intel_tiling_mode *tiling,
 155                            unsigned long *pitch);
 156
 157 /**
 158  * Export \p bo as a winsys handle for inter-process sharing.
 159  */
 160 int
 161 intel_winsys_export_handle(struct intel_winsys *winsys,
 162                            struct intel_bo *bo,
 163                            enum intel_tiling_mode tiling,
 164                            unsigned long pitch,
 165                            struct winsys_handle *handle);
 166
 167 /**
 168  * Return true when buffer objects directly specified in \p bo_array, and
 169  * those indirectly referenced by them, can fit in the aperture space.
 170  */
 171 bool
 172 intel_winsys_can_submit_bo(struct intel_winsys *winsys,
 173                            struct intel_bo **bo_array,
 174                            int count);
 175
 176 /**
 177  * Submit \p bo for execution.
 178  *
 179  * \p bo and all bos referenced by \p bo will be considered busy until all
 180  * commands are parsed and executed.  \p ctx is ignored when the bo is not
 181  * submitted to the render ring.
 182  */
 183 int
 184 intel_winsys_submit_bo(struct intel_winsys *winsys,
 185                        struct intel_bo *bo, int used,
 186                        struct intel_context *ctx,
 187                        unsigned long flags);
 188
 189 /**
 190  * Decode the commands contained in \p bo.  For debugging.
 191  *
 192  * \param bo      Batch buffer to decode.
 193  * \param used    Size of the commands in bytes.
 194  */
 195 void
 196 intel_winsys_decode_bo(struct intel_winsys *winsys,
 197                        struct intel_bo *bo, int used);
 198
 199 /**
 200  * Increase the reference count of \p bo.
 201  */
 202 void
 203 intel_bo_reference(struct intel_bo *bo);
 204
 205 /**
 206  * Decrease the reference count of \p bo.  When the reference count reaches
 207  * zero, \p bo is destroyed.
 208  */
 209 void
 210 intel_bo_unreference(struct intel_bo *bo);
 211
 212 /**
 213  * Map \p bo for CPU access.  Recursive mapping is allowed.
 214  *
 215  * map() maps the backing store into CPU address space, cached.  It will block
 216  * if the bo is busy.  This variant allows fastest random reads and writes,
 217  * but the caller needs to handle tiling or swizzling manually if the bo is
 218  * tiled or swizzled.  If write is enabled and there is no shared last-level
 219  * cache (LLC), the CPU cache will be flushed, which is expensive.
 220  *
 221  * map_gtt() maps the bo for MMIO access, uncached but write-combined.  It
 222  * will block if the bo is busy.  This variant promises a reasonable speed for
 223  * sequential writes, but reads would be very slow.  Callers always have a
 224  * linear view of the bo.
 225  *
 226  * map_unsynchronized() is similar to map_gtt(), except that it does not
 227  * block.
 228  */
 229 void *
 230 intel_bo_map(struct intel_bo *bo, bool write_enable);
 231
 232 void *
 233 intel_bo_map_gtt(struct intel_bo *bo);
 234
 235 void *
 236 intel_bo_map_unsynchronized(struct intel_bo *bo);
 237
 238 /**
 239  * Unmap \p bo.
 240  */
 241 void
 242 intel_bo_unmap(struct intel_bo *bo);
 243
 244 /**
 245  * Write data to \p bo.
 246  */
 247 int
 248 intel_bo_pwrite(struct intel_bo *bo, unsigned long offset,
 249                 unsigned long size, const void *data);
 250
 251 /**
 252  * Read data from the bo.
 253  */
 254 int
 255 intel_bo_pread(struct intel_bo *bo, unsigned long offset,
 256                unsigned long size, void *data);
 257
 258 /**
 259  * Add \p target_bo to the relocation list.
 260  *
 261  * When \p bo is submitted for execution, and if \p target_bo has moved,
 262  * the kernel will patch \p bo at \p offset to \p target_bo->offset plus
 263  * \p target_offset.
 264  */
 265 int
 266 intel_bo_add_reloc(struct intel_bo *bo, uint32_t offset,
 267                    struct intel_bo *target_bo, uint32_t target_offset,
 268                    uint32_t read_domains, uint32_t write_domain,
 269                    uint64_t *presumed_offset);
 270
 271 /**
 272  * Return the current number of relocations.
 273  */
 274 int
 275 intel_bo_get_reloc_count(struct intel_bo *bo);
 276
 277 /**
 278  * Truncate all relocations except the first \p start ones.
 279  *
 280  * Combined with \p intel_bo_get_reloc_count(), they can be used to undo the
 281  * \p intel_bo_add_reloc() calls that were just made.
 282  */
 283 void
 284 intel_bo_truncate_relocs(struct intel_bo *bo, int start);
 285
 286 /**
 287  * Return true if \p target_bo is on the relocation list of \p bo, or on
 288  * the relocation list of some bo that is referenced by \p bo.
 289  */
 290 bool
 291 intel_bo_has_reloc(struct intel_bo *bo, struct intel_bo *target_bo);
 292
 293 /**
 294  * Wait until \bo is idle, or \p timeout nanoseconds have passed.  A
 295  * negative timeout means to wait indefinitely.
 296  *
 297  * \return 0 only when \p bo is idle
 298  */
 299 int
 300 intel_bo_wait(struct intel_bo *bo, int64_t timeout);
 301
 302 /**
 303  * Return true if \p bo is busy.
 304  */
 305 static inline bool
 306 intel_bo_is_busy(struct intel_bo *bo)
 307 {
 308    return (intel_bo_wait(bo, 0) != 0);
 309 }
 310
 311 #endif /* INTEL_WINSYS_H */