src/gallium/winsys/intel/intel_winsys.h

   1 /*
   2  * Mesa 3-D graphics library
   3  *
   4  * Copyright (C) 2012-2014 LunarG, Inc.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included
  14  * in all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22  * DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors:
  25  *    Chia-I Wu <olv@lunarg.com>
  26  */
  27
  28 #ifndef INTEL_WINSYS_H
  29 #define INTEL_WINSYS_H
  30
  31 #include "pipe/p_compiler.h"
  32
  33 /* this is compatible with i915_drm.h's definitions */
  34 enum intel_exec_flag {
  35    /* bits[2:0]: ring type */
  36    INTEL_EXEC_DEFAULT         = 0 << 0,
  37    INTEL_EXEC_RENDER          = 1 << 0,
  38    INTEL_EXEC_BSD             = 2 << 0,
  39    INTEL_EXEC_BLT             = 3 << 0,
  40
  41    /* bits[7:6]: constant buffer addressing mode */
  42
  43    /* bits[8]: reset SO write offset register on GEN7+ */
  44    INTEL_EXEC_GEN7_SOL_RESET  = 1 << 8,
  45 };
  46
  47 /* this is compatible with i915_drm.h's definitions */
  48 enum intel_domain_flag {
  49    INTEL_DOMAIN_CPU           = 0x00000001,
  50    INTEL_DOMAIN_RENDER        = 0x00000002,
  51    INTEL_DOMAIN_SAMPLER       = 0x00000004,
  52    INTEL_DOMAIN_COMMAND       = 0x00000008,
  53    INTEL_DOMAIN_INSTRUCTION   = 0x00000010,
  54    INTEL_DOMAIN_VERTEX        = 0x00000020,
  55    INTEL_DOMAIN_GTT           = 0x00000040,
  56 };
  57
  58 /* this is compatible with i915_drm.h's definitions */
  59 enum intel_tiling_mode {
  60    INTEL_TILING_NONE = 0,
  61    INTEL_TILING_X    = 1,
  62    INTEL_TILING_Y    = 2,
  63 };
  64
  65 struct winsys_handle;
  66 struct intel_winsys;
  67 struct intel_context;
  68 struct intel_bo;
  69
  70 struct intel_winsys_info {
  71    int devid;
  72    bool has_llc;
  73    bool has_gen7_sol_reset;
  74    bool has_address_swizzling;
  75 };
  76
  77 struct intel_winsys *
  78 intel_winsys_create_for_fd(int fd);
  79
  80 void
  81 intel_winsys_destroy(struct intel_winsys *winsys);
  82
  83 const struct intel_winsys_info *
  84 intel_winsys_get_info(const struct intel_winsys *winsys);
  85
  86 /**
  87  * Create a logical context for use with the render ring.
  88  */
  89 struct intel_context *
  90 intel_winsys_create_context(struct intel_winsys *winsys);
  91
  92 /**
  93  * Destroy a logical context.
  94  */
  95 void
  96 intel_winsys_destroy_context(struct intel_winsys *winsys,
  97                              struct intel_context *ctx);
  98
  99 /**
 100  * Read a register.  Only registers that are considered safe, such as
 101  *
 102  *   TIMESTAMP (0x2358)
 103  *
 104  * can be read.
 105  */
 106 int
 107 intel_winsys_read_reg(struct intel_winsys *winsys,
 108                       uint32_t reg, uint64_t *val);
 109
 110 /**
 111  * Allocate a linear buffer object.
 112  *
 113  * \param name             Informative description of the bo.
 114  * \param size             Size of the bo.
 115  * \param initial_domain   Initial (write) domain.
 116  */
 117 struct intel_bo *
 118 intel_winsys_alloc_buffer(struct intel_winsys *winsys,
 119                           const char *name,
 120                           unsigned long size,
 121                           uint32_t initial_domain);
 122
 123 /**
 124  * Allocate a 2-dimentional buffer object.
 125  *
 126  * \param name             Informative description of the bo.
 127  * \param width            Width of the bo.
 128  * \param height           Height of the bo.
 129  * \param cpp              Bytes per texel.
 130  * \param tiling           Tiling mode.
 131  * \param initial_domain   Initial (write) domain.
 132  * \param pitch            Pitch of the bo.
 133  */
 134 struct intel_bo *
 135 intel_winsys_alloc_texture(struct intel_winsys *winsys,
 136                            const char *name,
 137                            int width, int height, int cpp,
 138                            enum intel_tiling_mode tiling,
 139                            uint32_t initial_domain,
 140                            unsigned long *pitch);
 141
 142 /**
 143  * Create a bo from a winsys handle.
 144  */
 145 struct intel_bo *
 146 intel_winsys_import_handle(struct intel_winsys *winsys,
 147                            const char *name,
 148                            const struct winsys_handle *handle,
 149                            int width, int height, int cpp,
 150                            enum intel_tiling_mode *tiling,
 151                            unsigned long *pitch);
 152
 153 /**
 154  * Export \p bo as a winsys handle for inter-process sharing.
 155  */
 156 int
 157 intel_winsys_export_handle(struct intel_winsys *winsys,
 158                            struct intel_bo *bo,
 159                            enum intel_tiling_mode tiling,
 160                            unsigned long pitch,
 161                            struct winsys_handle *handle);
 162
 163 /**
 164  * Check that buffer objects directly specified in \p bo_array, and those
 165  * indirectly referenced by them, can fit in the aperture space.
 166  */
 167 int
 168 intel_winsys_check_aperture_space(struct intel_winsys *winsys,
 169                                   struct intel_bo **bo_array,
 170                                   int count);
 171
 172 /**
 173  * Decode the commands contained in \p bo.  For debugging.
 174  *
 175  * \param bo      Batch buffer to decode.
 176  * \param used    Size of the commands in bytes.
 177  */
 178 void
 179 intel_winsys_decode_commands(struct intel_winsys *winsys,
 180                              struct intel_bo *bo, int used);
 181
 182 /**
 183  * Increase the reference count of \p bo.
 184  */
 185 void
 186 intel_bo_reference(struct intel_bo *bo);
 187
 188 /**
 189  * Decrease the reference count of \p bo.  When the reference count reaches
 190  * zero, \p bo is destroyed.
 191  */
 192 void
 193 intel_bo_unreference(struct intel_bo *bo);
 194
 195 /**
 196  * Map \p bo for CPU access.  Recursive mapping is allowed.
 197  *
 198  * map() maps the backing store into CPU address space, cached.  It will block
 199  * if the bo is busy.  This variant allows fastest random reads and writes,
 200  * but the caller needs to handle tiling or swizzling manually if the bo is
 201  * tiled or swizzled.  If write is enabled and there is no shared last-level
 202  * cache (LLC), the CPU cache will be flushed, which is expensive.
 203  *
 204  * map_gtt() maps the bo for MMIO access, uncached but write-combined.  It
 205  * will block if the bo is busy.  This variant promises a reasonable speed for
 206  * sequential writes, but reads would be very slow.  Callers always have a
 207  * linear view of the bo.
 208  *
 209  * map_unsynchronized() is similar to map_gtt(), except that it does not
 210  * block.
 211  */
 212 void *
 213 intel_bo_map(struct intel_bo *bo, bool write_enable);
 214
 215 void *
 216 intel_bo_map_gtt(struct intel_bo *bo);
 217
 218 void *
 219 intel_bo_map_unsynchronized(struct intel_bo *bo);
 220
 221 /**
 222  * Unmap \p bo.
 223  */
 224 void
 225 intel_bo_unmap(struct intel_bo *bo);
 226
 227 /**
 228  * Write data to \p bo.
 229  */
 230 int
 231 intel_bo_pwrite(struct intel_bo *bo, unsigned long offset,
 232                 unsigned long size, const void *data);
 233
 234 /**
 235  * Read data from the bo.
 236  */
 237 int
 238 intel_bo_pread(struct intel_bo *bo, unsigned long offset,
 239                unsigned long size, void *data);
 240
 241 /**
 242  * Add \p target_bo to the relocation list.
 243  *
 244  * When \p bo is submitted for execution, and if \p target_bo has moved,
 245  * the kernel will patch \p bo at \p offset to \p target_bo->offset plus
 246  * \p target_offset.
 247  */
 248 int
 249 intel_bo_add_reloc(struct intel_bo *bo, uint32_t offset,
 250                    struct intel_bo *target_bo, uint32_t target_offset,
 251                    uint32_t read_domains, uint32_t write_domain,
 252                    uint64_t *presumed_offset);
 253
 254 /**
 255  * Return the current number of relocations.
 256  */
 257 int
 258 intel_bo_get_reloc_count(struct intel_bo *bo);
 259
 260 /**
 261  * Truncate all relocations except the first \p start ones.
 262  *
 263  * Combined with \p intel_bo_get_reloc_count(), they can be used to undo the
 264  * \p intel_bo_add_reloc() calls that were just made.
 265  */
 266 void
 267 intel_bo_truncate_relocs(struct intel_bo *bo, int start);
 268
 269 /**
 270  * Return true if \p target_bo is on the relocation list of \p bo, or on
 271  * the relocation list of some bo that is referenced by \p bo.
 272  */
 273 bool
 274 intel_bo_has_reloc(struct intel_bo *bo, struct intel_bo *target_bo);
 275
 276 /**
 277  * Submit \p bo for execution.
 278  *
 279  * \p bo and all bos referenced by \p bo will be considered busy until all
 280  * commands are parsed and executed.
 281  */
 282 int
 283 intel_bo_exec(struct intel_bo *bo, int used,
 284               struct intel_context *ctx, unsigned long flags);
 285
 286 /**
 287  * Wait until \bo is idle, or \p timeout nanoseconds have passed.  A
 288  * negative timeout means to wait indefinitely.
 289  *
 290  * \return 0 only when \p bo is idle
 291  */
 292 int
 293 intel_bo_wait(struct intel_bo *bo, int64_t timeout);
 294
 295 /**
 296  * Return true if \p bo is busy.
 297  */
 298 static inline bool
 299 intel_bo_is_busy(struct intel_bo *bo)
 300 {
 301    return (intel_bo_wait(bo, 0) != 0);
 302 }
 303
 304 #endif /* INTEL_WINSYS_H */