src/gallium/winsys/intel/intel_winsys.h

   1 /*
   2  * Mesa 3-D graphics library
   3  *
   4  * Copyright (C) 2012-2014 LunarG, Inc.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included
  14  * in all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22  * DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors:
  25  *    Chia-I Wu <olv@lunarg.com>
  26  */
  27
  28 #ifndef INTEL_WINSYS_H
  29 #define INTEL_WINSYS_H
  30
  31 #include "pipe/p_compiler.h"
  32
  33 /* this is compatible with i915_drm.h's definitions */
  34 enum intel_exec_flag {
  35    /* bits[2:0]: ring type */
  36    INTEL_EXEC_DEFAULT         = 0 << 0,
  37    INTEL_EXEC_RENDER          = 1 << 0,
  38    INTEL_EXEC_BSD             = 2 << 0,
  39    INTEL_EXEC_BLT             = 3 << 0,
  40
  41    /* bits[7:6]: constant buffer addressing mode */
  42
  43    /* bits[8]: reset SO write offset register on GEN7+ */
  44    INTEL_EXEC_GEN7_SOL_RESET  = 1 << 8,
  45 };
  46
  47 /* this is compatible with i915_drm.h's definitions */
  48 enum intel_domain_flag {
  49    INTEL_DOMAIN_CPU           = 0x00000001,
  50    INTEL_DOMAIN_RENDER        = 0x00000002,
  51    INTEL_DOMAIN_SAMPLER       = 0x00000004,
  52    INTEL_DOMAIN_COMMAND       = 0x00000008,
  53    INTEL_DOMAIN_INSTRUCTION   = 0x00000010,
  54    INTEL_DOMAIN_VERTEX        = 0x00000020,
  55    INTEL_DOMAIN_GTT           = 0x00000040,
  56 };
  57
  58 /* this is compatible with i915_drm.h's definitions */
  59 enum intel_tiling_mode {
  60    INTEL_TILING_NONE = 0,
  61    INTEL_TILING_X    = 1,
  62    INTEL_TILING_Y    = 2,
  63 };
  64
  65 struct winsys_handle;
  66 struct intel_winsys;
  67 struct intel_context;
  68 struct intel_bo;
  69
  70 struct intel_winsys_info {
  71    int devid;
  72
  73    int max_batch_size;
  74    bool has_llc;
  75    bool has_gen7_sol_reset;
  76    bool has_address_swizzling;
  77
  78    /* valid registers for intel_winsys_read_reg() */
  79    bool has_timestamp;
  80 };
  81
  82 struct intel_winsys *
  83 intel_winsys_create_for_fd(int fd);
  84
  85 void
  86 intel_winsys_destroy(struct intel_winsys *winsys);
  87
  88 const struct intel_winsys_info *
  89 intel_winsys_get_info(const struct intel_winsys *winsys);
  90
  91 /**
  92  * Create a logical context for use with the render ring.
  93  */
  94 struct intel_context *
  95 intel_winsys_create_context(struct intel_winsys *winsys);
  96
  97 /**
  98  * Destroy a logical context.
  99  */
 100 void
 101 intel_winsys_destroy_context(struct intel_winsys *winsys,
 102                              struct intel_context *ctx);
 103
 104 /**
 105  * Read a register.  Only registers that are considered safe, such as
 106  *
 107  *   TIMESTAMP (0x2358)
 108  *
 109  * can be read.
 110  */
 111 int
 112 intel_winsys_read_reg(struct intel_winsys *winsys,
 113                       uint32_t reg, uint64_t *val);
 114
 115 /**
 116  * Allocate a linear buffer object.
 117  *
 118  * \param name             Informative description of the bo.
 119  * \param size             Size of the bo.
 120  * \param initial_domain   Initial (write) domain.
 121  */
 122 struct intel_bo *
 123 intel_winsys_alloc_buffer(struct intel_winsys *winsys,
 124                           const char *name,
 125                           unsigned long size,
 126                           uint32_t initial_domain);
 127
 128 /**
 129  * Allocate a 2-dimentional buffer object.
 130  *
 131  * \param name             Informative description of the bo.
 132  * \param width            Width of the bo.
 133  * \param height           Height of the bo.
 134  * \param cpp              Bytes per texel.
 135  * \param tiling           Tiling mode.
 136  * \param initial_domain   Initial (write) domain.
 137  * \param pitch            Pitch of the bo.
 138  */
 139 struct intel_bo *
 140 intel_winsys_alloc_texture(struct intel_winsys *winsys,
 141                            const char *name,
 142                            int width, int height, int cpp,
 143                            enum intel_tiling_mode tiling,
 144                            uint32_t initial_domain,
 145                            unsigned long *pitch);
 146
 147 /**
 148  * Create a bo from a winsys handle.
 149  */
 150 struct intel_bo *
 151 intel_winsys_import_handle(struct intel_winsys *winsys,
 152                            const char *name,
 153                            const struct winsys_handle *handle,
 154                            int width, int height, int cpp,
 155                            enum intel_tiling_mode *tiling,
 156                            unsigned long *pitch);
 157
 158 /**
 159  * Export \p bo as a winsys handle for inter-process sharing.
 160  */
 161 int
 162 intel_winsys_export_handle(struct intel_winsys *winsys,
 163                            struct intel_bo *bo,
 164                            enum intel_tiling_mode tiling,
 165                            unsigned long pitch,
 166                            struct winsys_handle *handle);
 167
 168 /**
 169  * Return true when buffer objects directly specified in \p bo_array, and
 170  * those indirectly referenced by them, can fit in the aperture space.
 171  */
 172 bool
 173 intel_winsys_can_submit_bo(struct intel_winsys *winsys,
 174                            struct intel_bo **bo_array,
 175                            int count);
 176
 177 /**
 178  * Submit \p bo for execution.
 179  *
 180  * \p bo and all bos referenced by \p bo will be considered busy until all
 181  * commands are parsed and executed.  \p ctx is ignored when the bo is not
 182  * submitted to the render ring.
 183  */
 184 int
 185 intel_winsys_submit_bo(struct intel_winsys *winsys,
 186                        struct intel_bo *bo, int used,
 187                        struct intel_context *ctx,
 188                        unsigned long flags);
 189
 190 /**
 191  * Decode the commands contained in \p bo.  For debugging.
 192  *
 193  * \param bo      Batch buffer to decode.
 194  * \param used    Size of the commands in bytes.
 195  */
 196 void
 197 intel_winsys_decode_bo(struct intel_winsys *winsys,
 198                        struct intel_bo *bo, int used);
 199
 200 /**
 201  * Increase the reference count of \p bo.
 202  */
 203 void
 204 intel_bo_reference(struct intel_bo *bo);
 205
 206 /**
 207  * Decrease the reference count of \p bo.  When the reference count reaches
 208  * zero, \p bo is destroyed.
 209  */
 210 void
 211 intel_bo_unreference(struct intel_bo *bo);
 212
 213 /**
 214  * Map \p bo for CPU access.  Recursive mapping is allowed.
 215  *
 216  * map() maps the backing store into CPU address space, cached.  It will block
 217  * if the bo is busy.  This variant allows fastest random reads and writes,
 218  * but the caller needs to handle tiling or swizzling manually if the bo is
 219  * tiled or swizzled.  If write is enabled and there is no shared last-level
 220  * cache (LLC), the CPU cache will be flushed, which is expensive.
 221  *
 222  * map_gtt() maps the bo for MMIO access, uncached but write-combined.  It
 223  * will block if the bo is busy.  This variant promises a reasonable speed for
 224  * sequential writes, but reads would be very slow.  Callers always have a
 225  * linear view of the bo.
 226  *
 227  * map_unsynchronized() is similar to map_gtt(), except that it does not
 228  * block.
 229  */
 230 void *
 231 intel_bo_map(struct intel_bo *bo, bool write_enable);
 232
 233 void *
 234 intel_bo_map_gtt(struct intel_bo *bo);
 235
 236 void *
 237 intel_bo_map_unsynchronized(struct intel_bo *bo);
 238
 239 /**
 240  * Unmap \p bo.
 241  */
 242 void
 243 intel_bo_unmap(struct intel_bo *bo);
 244
 245 /**
 246  * Write data to \p bo.
 247  */
 248 int
 249 intel_bo_pwrite(struct intel_bo *bo, unsigned long offset,
 250                 unsigned long size, const void *data);
 251
 252 /**
 253  * Read data from the bo.
 254  */
 255 int
 256 intel_bo_pread(struct intel_bo *bo, unsigned long offset,
 257                unsigned long size, void *data);
 258
 259 /**
 260  * Add \p target_bo to the relocation list.
 261  *
 262  * When \p bo is submitted for execution, and if \p target_bo has moved,
 263  * the kernel will patch \p bo at \p offset to \p target_bo->offset plus
 264  * \p target_offset.
 265  */
 266 int
 267 intel_bo_add_reloc(struct intel_bo *bo, uint32_t offset,
 268                    struct intel_bo *target_bo, uint32_t target_offset,
 269                    uint32_t read_domains, uint32_t write_domain,
 270                    uint64_t *presumed_offset);
 271
 272 /**
 273  * Return the current number of relocations.
 274  */
 275 int
 276 intel_bo_get_reloc_count(struct intel_bo *bo);
 277
 278 /**
 279  * Truncate all relocations except the first \p start ones.
 280  *
 281  * Combined with \p intel_bo_get_reloc_count(), they can be used to undo the
 282  * \p intel_bo_add_reloc() calls that were just made.
 283  */
 284 void
 285 intel_bo_truncate_relocs(struct intel_bo *bo, int start);
 286
 287 /**
 288  * Return true if \p target_bo is on the relocation list of \p bo, or on
 289  * the relocation list of some bo that is referenced by \p bo.
 290  */
 291 bool
 292 intel_bo_has_reloc(struct intel_bo *bo, struct intel_bo *target_bo);
 293
 294 /**
 295  * Wait until \bo is idle, or \p timeout nanoseconds have passed.  A
 296  * negative timeout means to wait indefinitely.
 297  *
 298  * \return 0 only when \p bo is idle
 299  */
 300 int
 301 intel_bo_wait(struct intel_bo *bo, int64_t timeout);
 302
 303 /**
 304  * Return true if \p bo is busy.
 305  */
 306 static inline bool
 307 intel_bo_is_busy(struct intel_bo *bo)
 308 {
 309    return (intel_bo_wait(bo, 0) != 0);
 310 }
 311
 312 #endif /* INTEL_WINSYS_H */