src/gallium/winsys/r600/drm/r600_priv.h

   1 /*
   2  * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * on the rights to use, copy, modify, merge, publish, distribute, sub
   8  * license, and/or sell copies of the Software, and to permit persons to whom
   9  * the Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  21  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *      Jerome Glisse
  25  */
  26 #ifndef R600_PRIV_H
  27 #define R600_PRIV_H
  28
  29 #include "r600.h"
  30 #include "../../radeon/drm/radeon_winsys.h"
  31 #include "util/u_hash_table.h"
  32 #include "os/os_thread.h"
  33
  34 #define PKT_COUNT_C                     0xC000FFFF
  35 #define PKT_COUNT_S(x)                  (((x) & 0x3FFF) << 16)
  36
  37 struct radeon {
  38         struct radeon_winsys            *ws;
  39         struct radeon_info              info;
  40         unsigned                        family;
  41         enum chip_class                 chip_class;
  42         struct r600_tiling_info         tiling_info;
  43 };
  44
  45 /* these flags are used in register flags and added into block flags */
  46 #define REG_FLAG_NEED_BO 1
  47 #define REG_FLAG_DIRTY_ALWAYS 2
  48 #define REG_FLAG_RV6XX_SBU 4
  49 #define REG_FLAG_NOT_R600 8
  50 #define REG_FLAG_ENABLE_ALWAYS 16
  51 #define BLOCK_FLAG_RESOURCE 32
  52 #define REG_FLAG_FLUSH_CHANGE 64
  53
  54 struct r600_reg {
  55         unsigned                        offset;
  56         unsigned                        flags;
  57         unsigned                        flush_flags;
  58         unsigned                        flush_mask;
  59 };
  60
  61 #define BO_BOUND_TEXTURE 1
  62
  63 struct r600_bo {
  64         struct pipe_reference           reference; /* this must be the first member for the r600_bo_reference inline to work */
  65         /* DO NOT MOVE THIS ^ */
  66         struct pb_buffer                *buf;
  67         struct radeon_winsys_cs_handle  *cs_buf;
  68         unsigned                        domains;
  69         unsigned                        last_flush;
  70         unsigned                        binding;
  71 };
  72
  73 /*
  74  * radeon_pciid.c
  75  */
  76 unsigned radeon_family_from_device(unsigned device);
  77
  78 /*
  79  * r600_hw_context.c
  80  */
  81 void r600_context_bo_flush(struct r600_context *ctx, unsigned flush_flags,
  82                                 unsigned flush_mask, struct r600_bo *rbo);
  83 struct r600_bo *r600_context_reg_bo(struct r600_context *ctx, unsigned offset);
  84 int r600_context_add_block(struct r600_context *ctx, const struct r600_reg *reg, unsigned nreg,
  85                            unsigned opcode, unsigned offset_base);
  86 void r600_context_pipe_state_set_resource(struct r600_context *ctx, struct r600_pipe_resource_state *state, struct r600_block *block);
  87 void r600_context_block_emit_dirty(struct r600_context *ctx, struct r600_block *block);
  88 void r600_context_block_resource_emit_dirty(struct r600_context *ctx, struct r600_block *block);
  89 void r600_context_dirty_block(struct r600_context *ctx, struct r600_block *block,
  90                               int dirty, int index);
  91 int r600_setup_block_table(struct r600_context *ctx);
  92 void r600_context_reg(struct r600_context *ctx,
  93                       unsigned offset, unsigned value,
  94                       unsigned mask);
  95 void r600_init_cs(struct r600_context *ctx);
  96 int r600_resource_init(struct r600_context *ctx, struct r600_range *range, unsigned offset, unsigned nblocks, unsigned stride, struct r600_reg *reg, int nreg, unsigned offset_base);
  97
  98 static INLINE unsigned r600_context_bo_reloc(struct r600_context *ctx, struct r600_bo *rbo,
  99                                              enum radeon_bo_usage usage)
 100 {
 101         enum radeon_bo_domain rd = usage & RADEON_USAGE_READ ? rbo->domains : 0;
 102         enum radeon_bo_domain wd = usage & RADEON_USAGE_WRITE ? rbo->domains : 0;
 103
 104         assert(usage);
 105
 106         unsigned reloc_index =
 107                 ctx->radeon->ws->cs_add_reloc(ctx->cs, rbo->cs_buf,
 108                                               rd, wd);
 109
 110         if (reloc_index >= ctx->creloc)
 111                 ctx->creloc = reloc_index+1;
 112
 113         r600_bo_reference(&ctx->bo[reloc_index], rbo);
 114         return reloc_index * 4;
 115 }
 116
 117 #endif