50783a610692e2385fca1076ae024d546bbf33b3
[mesa.git] / src / gallium / winsys / r600 / drm / r600_priv.h
1 /*
2 * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 *
23 * Authors:
24 * Jerome Glisse
25 */
26 #ifndef R600_PRIV_H
27 #define R600_PRIV_H
28
29 #include "r600.h"
30 #include "../../radeon/drm/radeon_winsys.h"
31 #include "util/u_hash_table.h"
32 #include "os/os_thread.h"
33
34 #define PKT_COUNT_C 0xC000FFFF
35 #define PKT_COUNT_S(x) (((x) & 0x3FFF) << 16)
36
37 struct r600_bomgr;
38 struct r600_bo;
39
40 struct radeon {
41 struct radeon_winsys *ws;
42 struct radeon_info info;
43 unsigned family;
44 enum chip_class chip_class;
45 struct r600_tiling_info tiling_info;
46 struct r600_bomgr *bomgr;
47 unsigned fence;
48 unsigned *cfence;
49 struct r600_bo *fence_bo;
50 unsigned num_tile_pipes;
51 unsigned backend_map;
52 boolean backend_map_valid;
53
54 /* List of buffer handles and its mutex. */
55 struct util_hash_table *bo_handles;
56 pipe_mutex bo_handles_mutex;
57 };
58
59 /* these flags are used in register flags and added into block flags */
60 #define REG_FLAG_NEED_BO 1
61 #define REG_FLAG_DIRTY_ALWAYS 2
62 #define REG_FLAG_RV6XX_SBU 4
63 #define REG_FLAG_NOT_R600 8
64 #define REG_FLAG_ENABLE_ALWAYS 16
65 #define BLOCK_FLAG_RESOURCE 32
66 #define REG_FLAG_FLUSH_CHANGE 64
67
68 struct r600_reg {
69 unsigned offset;
70 unsigned flags;
71 unsigned flush_flags;
72 unsigned flush_mask;
73 };
74
75 #define BO_BOUND_TEXTURE 1
76 struct radeon_bo {
77 struct pipe_reference reference;
78 unsigned handle;
79 unsigned size;
80 unsigned alignment;
81 int map_count;
82 void *data;
83 struct list_head fencedlist;
84 unsigned fence;
85 struct r600_context *ctx;
86 boolean shared;
87 struct r600_reloc *reloc;
88 unsigned reloc_id;
89 unsigned last_flush;
90 unsigned name;
91 unsigned binding;
92 };
93
94 struct r600_bo {
95 struct pipe_reference reference; /* this must be the first member for the r600_bo_reference inline to work */
96 /* DO NOT MOVE THIS ^ */
97 unsigned size;
98 unsigned tiling_flags;
99 unsigned domains;
100 struct radeon_bo *bo;
101 unsigned fence;
102 /* manager data */
103 struct list_head list;
104 unsigned manager_id;
105 unsigned alignment;
106 unsigned offset;
107 int64_t start;
108 int64_t end;
109 };
110
111 struct r600_bomgr {
112 struct radeon *radeon;
113 unsigned usecs;
114 pipe_mutex mutex;
115 struct list_head delayed;
116 unsigned num_delayed;
117 };
118
119 /*
120 * r600_drm.c
121 */
122 struct radeon *r600_new(int fd, unsigned device);
123 void r600_delete(struct radeon *r600);
124
125 /*
126 * radeon_pciid.c
127 */
128 unsigned radeon_family_from_device(unsigned device);
129
130 /*
131 * radeon_bo.c
132 */
133 struct radeon_bo *radeon_bo(struct radeon *radeon, unsigned handle,
134 unsigned size, unsigned alignment, unsigned initial_domain);
135 void radeon_bo_reference(struct radeon *radeon, struct radeon_bo **dst,
136 struct radeon_bo *src);
137 int radeon_bo_wait(struct radeon *radeon, struct radeon_bo *bo);
138 int radeon_bo_busy(struct radeon *radeon, struct radeon_bo *bo, uint32_t *domain);
139 int radeon_bo_fencelist(struct radeon *radeon, struct radeon_bo **bolist, uint32_t num_bo);
140 int radeon_bo_get_tiling_flags(struct radeon *radeon,
141 struct radeon_bo *bo,
142 uint32_t *tiling_flags);
143 int radeon_bo_get_name(struct radeon *radeon,
144 struct radeon_bo *bo,
145 uint32_t *name);
146 int radeon_bo_fixed_map(struct radeon *radeon, struct radeon_bo *bo);
147
148 /*
149 * r600_hw_context.c
150 */
151 int r600_context_init_fence(struct r600_context *ctx);
152 void r600_context_get_reloc(struct r600_context *ctx, struct r600_bo *rbo);
153 void r600_context_bo_flush(struct r600_context *ctx, unsigned flush_flags,
154 unsigned flush_mask, struct r600_bo *rbo);
155 struct r600_bo *r600_context_reg_bo(struct r600_context *ctx, unsigned offset);
156 int r600_context_add_block(struct r600_context *ctx, const struct r600_reg *reg, unsigned nreg,
157 unsigned opcode, unsigned offset_base);
158 void r600_context_pipe_state_set_resource(struct r600_context *ctx, struct r600_pipe_resource_state *state, struct r600_block *block);
159 void r600_context_block_emit_dirty(struct r600_context *ctx, struct r600_block *block);
160 void r600_context_block_resource_emit_dirty(struct r600_context *ctx, struct r600_block *block);
161 void r600_context_dirty_block(struct r600_context *ctx, struct r600_block *block,
162 int dirty, int index);
163 int r600_setup_block_table(struct r600_context *ctx);
164 void r600_context_reg(struct r600_context *ctx,
165 unsigned offset, unsigned value,
166 unsigned mask);
167 void r600_init_cs(struct r600_context *ctx);
168 int r600_resource_init(struct r600_context *ctx, struct r600_range *range, unsigned offset, unsigned nblocks, unsigned stride, struct r600_reg *reg, int nreg, unsigned offset_base);
169
170 static INLINE void r600_context_bo_reloc(struct r600_context *ctx, u32 *pm4, struct r600_bo *rbo)
171 {
172 struct radeon_bo *bo = rbo->bo;
173
174 assert(bo != NULL);
175
176 if (!bo->reloc)
177 r600_context_get_reloc(ctx, rbo);
178
179 /* set PKT3 to point to proper reloc */
180 *pm4 = bo->reloc_id;
181 }
182
183 /*
184 * r600_bo.c
185 */
186 void r600_bo_destroy(struct radeon *radeon, struct r600_bo *bo);
187
188 /*
189 * r600_bomgr.c
190 */
191 struct r600_bomgr *r600_bomgr_create(struct radeon *radeon, unsigned usecs);
192 void r600_bomgr_destroy(struct r600_bomgr *mgr);
193 boolean r600_bomgr_bo_destroy(struct r600_bomgr *mgr, struct r600_bo *bo);
194 void r600_bomgr_bo_init(struct r600_bomgr *mgr, struct r600_bo *bo);
195 struct r600_bo *r600_bomgr_bo_create(struct r600_bomgr *mgr,
196 unsigned size,
197 unsigned alignment,
198 unsigned cfence);
199
200
201 /*
202 * helpers
203 */
204
205
206 /*
207 * radeon_bo.c
208 */
209 static inline int radeon_bo_map(struct radeon *radeon, struct radeon_bo *bo)
210 {
211 if (bo->map_count == 0 && !bo->data)
212 return radeon_bo_fixed_map(radeon, bo);
213 bo->map_count++;
214 return 0;
215 }
216
217 static inline void radeon_bo_unmap(struct radeon *radeon, struct radeon_bo *bo)
218 {
219 bo->map_count--;
220 assert(bo->map_count >= 0);
221 }
222
223 /*
224 * fence
225 */
226 static inline boolean fence_is_after(unsigned fence, unsigned ofence)
227 {
228 /* handle wrap around */
229 if (fence < 0x80000000 && ofence > 0x80000000)
230 return TRUE;
231 if (fence > ofence)
232 return TRUE;
233 return FALSE;
234 }
235
236 #endif