src/gallium/winsys/r600/drm/r600_priv.h

   1 /*
   2  * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * on the rights to use, copy, modify, merge, publish, distribute, sub
   8  * license, and/or sell copies of the Software, and to permit persons to whom
   9  * the Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  21  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *      Jerome Glisse
  25  */
  26 #ifndef R600_PRIV_H
  27 #define R600_PRIV_H
  28
  29 #include <errno.h>
  30 #include <stdint.h>
  31 #include <stdlib.h>
  32 #include <assert.h>
  33 #include <util/u_double_list.h>
  34 #include <util/u_inlines.h>
  35 #include "util/u_hash_table.h"
  36 #include <os/os_thread.h>
  37 #include "r600.h"
  38
  39 #define PKT_COUNT_C                     0xC000FFFF
  40 #define PKT_COUNT_S(x)                  (((x) & 0x3FFF) << 16)
  41
  42 struct r600_bomgr;
  43 struct r600_bo;
  44
  45 struct radeon {
  46         int                             fd;
  47         int                             refcount;
  48         unsigned                        device;
  49         unsigned                        family;
  50         enum chip_class                 chip_class;
  51         struct r600_tiling_info         tiling_info;
  52         struct r600_bomgr               *bomgr;
  53         unsigned                        fence;
  54         unsigned                        *cfence;
  55         struct r600_bo                  *fence_bo;
  56         unsigned                        clock_crystal_freq;
  57         unsigned                        num_backends;
  58         unsigned                        minor_version;
  59
  60         /* List of buffer handles and its mutex. */
  61         struct util_hash_table          *bo_handles;
  62         pipe_mutex bo_handles_mutex;
  63 };
  64
  65 #define REG_FLAG_NEED_BO 1
  66 #define REG_FLAG_DIRTY_ALWAYS 2
  67 #define REG_FLAG_RV6XX_SBU 4
  68
  69 struct r600_reg {
  70         unsigned                        offset;
  71         unsigned                        flags;
  72         unsigned                        flush_flags;
  73         unsigned                        flush_mask;
  74 };
  75
  76 struct radeon_bo {
  77         struct pipe_reference           reference;
  78         unsigned                        handle;
  79         unsigned                        size;
  80         unsigned                        alignment;
  81         int                             map_count;
  82         void                            *data;
  83         struct list_head                fencedlist;
  84         unsigned                        fence;
  85         struct r600_context             *ctx;
  86         boolean                         shared;
  87         struct r600_reloc               *reloc;
  88         unsigned                        reloc_id;
  89         unsigned                        last_flush;
  90         unsigned                        name;
  91 };
  92
  93 struct r600_bo {
  94         struct pipe_reference           reference;
  95         unsigned                        size;
  96         unsigned                        tiling_flags;
  97         unsigned                        kernel_pitch;
  98         unsigned                        domains;
  99         struct radeon_bo                *bo;
 100         unsigned                        fence;
 101         /* manager data */
 102         struct list_head                list;
 103         unsigned                        manager_id;
 104         unsigned                        alignment;
 105         unsigned                        offset;
 106         int64_t                         start;
 107         int64_t                         end;
 108 };
 109
 110 struct r600_bomgr {
 111         struct radeon                   *radeon;
 112         unsigned                        usecs;
 113         pipe_mutex                      mutex;
 114         struct list_head                delayed;
 115         unsigned                        num_delayed;
 116 };
 117
 118 /*
 119  * r600_drm.c
 120  */
 121 struct radeon *r600_new(int fd, unsigned device);
 122 void r600_delete(struct radeon *r600);
 123
 124 /*
 125  * radeon_pciid.c
 126  */
 127 unsigned radeon_family_from_device(unsigned device);
 128
 129 /*
 130  * radeon_bo.c
 131  */
 132 struct radeon_bo *radeon_bo(struct radeon *radeon, unsigned handle,
 133                             unsigned size, unsigned alignment);
 134 void radeon_bo_reference(struct radeon *radeon, struct radeon_bo **dst,
 135                          struct radeon_bo *src);
 136 int radeon_bo_wait(struct radeon *radeon, struct radeon_bo *bo);
 137 int radeon_bo_busy(struct radeon *radeon, struct radeon_bo *bo, uint32_t *domain);
 138 int radeon_bo_fencelist(struct radeon *radeon, struct radeon_bo **bolist, uint32_t num_bo);
 139 int radeon_bo_get_tiling_flags(struct radeon *radeon,
 140                                struct radeon_bo *bo,
 141                                uint32_t *tiling_flags,
 142                                uint32_t *pitch);
 143 int radeon_bo_get_name(struct radeon *radeon,
 144                        struct radeon_bo *bo,
 145                        uint32_t *name);
 146 int radeon_bo_fixed_map(struct radeon *radeon, struct radeon_bo *bo);
 147
 148 /*
 149  * r600_hw_context.c
 150  */
 151 int r600_context_init_fence(struct r600_context *ctx);
 152 void r600_context_bo_reloc(struct r600_context *ctx, u32 *pm4, struct r600_bo *rbo);
 153 void r600_context_bo_flush(struct r600_context *ctx, unsigned flush_flags,
 154                                 unsigned flush_mask, struct r600_bo *rbo);
 155 struct r600_bo *r600_context_reg_bo(struct r600_context *ctx, unsigned offset);
 156 int r600_context_add_block(struct r600_context *ctx, const struct r600_reg *reg, unsigned nreg,
 157                            unsigned opcode, unsigned offset_base);
 158 void r600_context_pipe_state_set_resource(struct r600_context *ctx, struct r600_pipe_state *state, unsigned offset);
 159 void r600_context_block_emit_dirty(struct r600_context *ctx, struct r600_block *block);
 160 void r600_context_dirty_block(struct r600_context *ctx, struct r600_block *block,
 161                               int dirty, int index);
 162
 163 void r600_context_reg(struct r600_context *ctx,
 164                       unsigned offset, unsigned value,
 165                       unsigned mask);
 166 /*
 167  * r600_bo.c
 168  */
 169 void r600_bo_destroy(struct radeon *radeon, struct r600_bo *bo);
 170
 171 /*
 172  * r600_bomgr.c
 173  */
 174 struct r600_bomgr *r600_bomgr_create(struct radeon *radeon, unsigned usecs);
 175 void r600_bomgr_destroy(struct r600_bomgr *mgr);
 176 bool r600_bomgr_bo_destroy(struct r600_bomgr *mgr, struct r600_bo *bo);
 177 void r600_bomgr_bo_init(struct r600_bomgr *mgr, struct r600_bo *bo);
 178 struct r600_bo *r600_bomgr_bo_create(struct r600_bomgr *mgr,
 179                                         unsigned size,
 180                                         unsigned alignment,
 181                                         unsigned cfence);
 182
 183
 184 /*
 185  * helpers
 186  */
 187
 188 /* each range covers 9 bits of dword space = 512 dwords = 2k bytes */
 189 /* there is a block entry for each register so 512 blocks */
 190 /* we have no registers to read/write below 0x8000 (0x2000 in dw space) */
 191 /* we use some fake offsets at 0x40000 to do evergreen sampler borders so take 0x42000 as a max bound*/
 192 #define RANGE_OFFSET_START 0x8000
 193 #define HASH_SHIFT 9
 194 #define NUM_RANGES (0x42000 - RANGE_OFFSET_START) / (4 << HASH_SHIFT) /* 128 << 9 = 64k */
 195
 196 #define CTX_RANGE_ID(ctx, offset) ((((offset - RANGE_OFFSET_START) >> 2) >> HASH_SHIFT) & 255)
 197 #define CTX_BLOCK_ID(ctx, offset) (((offset - RANGE_OFFSET_START) >> 2) & ((1 << HASH_SHIFT) - 1))
 198
 199 /*
 200  * radeon_bo.c
 201  */
 202 static inline int radeon_bo_map(struct radeon *radeon, struct radeon_bo *bo)
 203 {
 204         if (bo->map_count == 0 && !bo->data)
 205                 return radeon_bo_fixed_map(radeon, bo);
 206         bo->map_count++;
 207         return 0;
 208 }
 209
 210 static inline void radeon_bo_unmap(struct radeon *radeon, struct radeon_bo *bo)
 211 {
 212         bo->map_count--;
 213         assert(bo->map_count >= 0);
 214 }
 215
 216 /*
 217  * fence
 218  */
 219 static inline bool fence_is_after(unsigned fence, unsigned ofence)
 220 {
 221         /* handle wrap around */
 222         if (fence < 0x80000000 && ofence > 0x80000000)
 223                 return TRUE;
 224         if (fence > ofence)
 225                 return TRUE;
 226         return FALSE;
 227 }
 228
 229 #endif