r600g: emit CS using radeon_winsys
[mesa.git] / src / gallium / winsys / r600 / drm / r600_priv.h
1 /*
2 * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 *
23 * Authors:
24 * Jerome Glisse
25 */
26 #ifndef R600_PRIV_H
27 #define R600_PRIV_H
28
29 #include "r600.h"
30 #include "../../radeon/drm/radeon_winsys.h"
31 #include "util/u_hash_table.h"
32 #include "os/os_thread.h"
33 #include "radeon_drm.h"
34
35 #define PKT_COUNT_C 0xC000FFFF
36 #define PKT_COUNT_S(x) (((x) & 0x3FFF) << 16)
37
38 struct radeon {
39 struct radeon_winsys *ws;
40 struct radeon_info info;
41 unsigned family;
42 enum chip_class chip_class;
43 struct r600_tiling_info tiling_info;
44 unsigned num_tile_pipes;
45 unsigned backend_map;
46 boolean backend_map_valid;
47 };
48
49 /* these flags are used in register flags and added into block flags */
50 #define REG_FLAG_NEED_BO 1
51 #define REG_FLAG_DIRTY_ALWAYS 2
52 #define REG_FLAG_RV6XX_SBU 4
53 #define REG_FLAG_NOT_R600 8
54 #define REG_FLAG_ENABLE_ALWAYS 16
55 #define BLOCK_FLAG_RESOURCE 32
56 #define REG_FLAG_FLUSH_CHANGE 64
57
58 struct r600_reg {
59 unsigned offset;
60 unsigned flags;
61 unsigned flush_flags;
62 unsigned flush_mask;
63 };
64
65 #define BO_BOUND_TEXTURE 1
66 struct radeon_bo {
67 struct pipe_reference reference;
68 struct pb_buffer *buf;
69 struct radeon_winsys_cs_handle *cs_buf;
70 unsigned handle;
71 unsigned size;
72 int map_count;
73 void *data;
74
75 unsigned last_flush;
76 unsigned binding;
77 };
78
79 struct r600_bo {
80 struct pipe_reference reference; /* this must be the first member for the r600_bo_reference inline to work */
81 /* DO NOT MOVE THIS ^ */
82 unsigned domains;
83 struct radeon_bo *bo;
84 };
85
86 /*
87 * radeon_pciid.c
88 */
89 unsigned radeon_family_from_device(unsigned device);
90
91 /*
92 * radeon_bo.c
93 */
94 struct radeon_bo *radeon_bo(struct radeon *radeon, unsigned handle,
95 unsigned size, unsigned alignment, unsigned bind, unsigned initial_domain);
96 void radeon_bo_reference(struct radeon *radeon, struct radeon_bo **dst,
97 struct radeon_bo *src);
98 int radeon_bo_wait(struct radeon *radeon, struct radeon_bo *bo);
99 int radeon_bo_busy(struct radeon *radeon, struct radeon_bo *bo, uint32_t *domain);
100 int radeon_bo_fencelist(struct radeon *radeon, struct radeon_bo **bolist, uint32_t num_bo);
101 int radeon_bo_get_tiling_flags(struct radeon *radeon,
102 struct radeon_bo *bo,
103 uint32_t *tiling_flags);
104 int radeon_bo_get_name(struct radeon *radeon,
105 struct radeon_bo *bo,
106 uint32_t *name);
107 int radeon_bo_fixed_map(struct radeon *radeon, struct radeon_bo *bo);
108
109 /*
110 * r600_hw_context.c
111 */
112 int r600_context_init_fence(struct r600_context *ctx);
113 void r600_context_bo_flush(struct r600_context *ctx, unsigned flush_flags,
114 unsigned flush_mask, struct r600_bo *rbo);
115 struct r600_bo *r600_context_reg_bo(struct r600_context *ctx, unsigned offset);
116 int r600_context_add_block(struct r600_context *ctx, const struct r600_reg *reg, unsigned nreg,
117 unsigned opcode, unsigned offset_base);
118 void r600_context_pipe_state_set_resource(struct r600_context *ctx, struct r600_pipe_resource_state *state, struct r600_block *block);
119 void r600_context_block_emit_dirty(struct r600_context *ctx, struct r600_block *block);
120 void r600_context_block_resource_emit_dirty(struct r600_context *ctx, struct r600_block *block);
121 void r600_context_dirty_block(struct r600_context *ctx, struct r600_block *block,
122 int dirty, int index);
123 int r600_setup_block_table(struct r600_context *ctx);
124 void r600_context_reg(struct r600_context *ctx,
125 unsigned offset, unsigned value,
126 unsigned mask);
127 void r600_init_cs(struct r600_context *ctx);
128 int r600_resource_init(struct r600_context *ctx, struct r600_range *range, unsigned offset, unsigned nblocks, unsigned stride, struct r600_reg *reg, int nreg, unsigned offset_base);
129
130 static INLINE unsigned r600_context_bo_reloc(struct r600_context *ctx, struct r600_bo *rbo)
131 {
132 struct radeon_bo *bo = rbo->bo;
133 unsigned reloc_index;
134
135 assert(bo != NULL);
136
137 reloc_index =
138 ctx->radeon->ws->trans_add_reloc(ctx->cs, bo->cs_buf, rbo->domains, rbo->domains);
139
140 if (reloc_index >= ctx->creloc)
141 ctx->creloc = reloc_index+1;
142
143 radeon_bo_reference(ctx->radeon, &ctx->bo[reloc_index], bo);
144 return reloc_index * 4;
145 }
146
147 /*
148 * r600_bo.c
149 */
150 void r600_bo_destroy(struct radeon *radeon, struct r600_bo *bo);
151
152
153 /*
154 * radeon_bo.c
155 */
156 static inline int radeon_bo_map(struct radeon *radeon, struct radeon_bo *bo)
157 {
158 if (bo->map_count == 0 && !bo->data)
159 return radeon_bo_fixed_map(radeon, bo);
160 bo->map_count++;
161 return 0;
162 }
163
164 static inline void radeon_bo_unmap(struct radeon *radeon, struct radeon_bo *bo)
165 {
166 bo->map_count--;
167 assert(bo->map_count >= 0);
168 }
169
170 /*
171 * fence
172 */
173 static inline boolean fence_is_after(unsigned fence, unsigned ofence)
174 {
175 /* handle wrap around */
176 if (fence < 0x80000000 && ofence > 0x80000000)
177 return TRUE;
178 if (fence > ofence)
179 return TRUE;
180 return FALSE;
181 }
182
183 #endif