src/gallium/winsys/r600/drm/radeon_bo_pb.c

   1 #include "radeon_priv.h"
   2
   3 #include "util/u_inlines.h"
   4 #include "util/u_memory.h"
   5 #include "util/u_double_list.h"
   6 #include "pipebuffer/pb_buffer.h"
   7 #include "pipebuffer/pb_bufmgr.h"
   8
   9 struct radeon_bo_pb {
  10         struct pb_buffer b;
  11         struct radeon_bo *bo;
  12
  13         struct radeon_bo_pbmgr *mgr;
  14         struct list_head maplist;
  15 };
  16
  17 extern const struct pb_vtbl radeon_bo_pb_vtbl;
  18
  19 static INLINE struct radeon_bo_pb *radeon_bo_pb(struct pb_buffer *buf)
  20 {
  21         assert(buf);
  22         assert(buf->vtbl == &radeon_bo_pb_vtbl);
  23         return (struct radeon_bo_pb *)buf;
  24 }
  25
  26 struct radeon_bo_pbmgr {
  27         struct pb_manager b;
  28         struct radeon *radeon;
  29         struct list_head buffer_map_list;
  30 };
  31
  32 static INLINE struct radeon_bo_pbmgr *radeon_bo_pbmgr(struct pb_manager *mgr)
  33 {
  34         assert(mgr);
  35         return (struct radeon_bo_pbmgr *)mgr;
  36 }
  37
  38 static void radeon_bo_pb_destroy(struct pb_buffer *_buf)
  39 {
  40         struct radeon_bo_pb *buf = radeon_bo_pb(_buf);
  41
  42         LIST_DEL(&buf->maplist);
  43
  44         if (buf->bo->data != NULL) {
  45                 radeon_bo_unmap(buf->mgr->radeon, buf->bo);
  46         }
  47         radeon_bo_reference(buf->mgr->radeon, &buf->bo, NULL);
  48         FREE(buf);
  49 }
  50
  51 static void *
  52 radeon_bo_pb_map_internal(struct pb_buffer *_buf,
  53                           unsigned flags, void *ctx)
  54 {
  55         struct radeon_bo_pb *buf = radeon_bo_pb(_buf);
  56
  57         if (flags & PB_USAGE_DONTBLOCK) {
  58                 if (p_atomic_read(&buf->bo->reference.count) > 1)
  59                         return NULL;
  60         }
  61         if (buf->bo->data != NULL) {
  62                 LIST_DELINIT(&buf->maplist);
  63                 return buf->bo->data;
  64         }
  65
  66         if (flags & PB_USAGE_DONTBLOCK) {
  67                 uint32_t domain;
  68                 if (radeon_bo_busy(buf->mgr->radeon, buf->bo, &domain))
  69                         return NULL;
  70         }
  71
  72         if (p_atomic_read(&buf->bo->reference.count) > 1 && ctx) {
  73                 r600_flush_ctx(ctx);
  74         }
  75         if (radeon_bo_map(buf->mgr->radeon, buf->bo)) {
  76                 return NULL;
  77         }
  78         LIST_DELINIT(&buf->maplist);
  79         return buf->bo->data;
  80 }
  81
  82 static void radeon_bo_pb_unmap_internal(struct pb_buffer *_buf)
  83 {
  84         struct radeon_bo_pb *buf = radeon_bo_pb(_buf);
  85         LIST_ADDTAIL(&buf->maplist, &buf->mgr->buffer_map_list);
  86 }
  87
  88 static void
  89 radeon_bo_pb_get_base_buffer(struct pb_buffer *buf,
  90                              struct pb_buffer **base_buf,
  91                              unsigned *offset)
  92 {
  93         *base_buf = buf;
  94         *offset = 0;
  95 }
  96
  97 static enum pipe_error
  98 radeon_bo_pb_validate(struct pb_buffer *_buf,
  99                       struct pb_validate *vl,
 100                       unsigned flags)
 101 {
 102         /* Always pinned */
 103         return PIPE_OK;
 104 }
 105
 106 static void
 107 radeon_bo_pb_fence(struct pb_buffer *buf,
 108                    struct pipe_fence_handle *fence)
 109 {
 110 }
 111
 112 const struct pb_vtbl radeon_bo_pb_vtbl = {
 113     radeon_bo_pb_destroy,
 114     radeon_bo_pb_map_internal,
 115     radeon_bo_pb_unmap_internal,
 116     radeon_bo_pb_validate,
 117     radeon_bo_pb_fence,
 118     radeon_bo_pb_get_base_buffer,
 119 };
 120
 121 struct pb_buffer *
 122 radeon_bo_pb_create_buffer_from_handle(struct pb_manager *_mgr,
 123                                        uint32_t handle)
 124 {
 125         struct radeon_bo_pbmgr *mgr = radeon_bo_pbmgr(_mgr);
 126         struct radeon *radeon = mgr->radeon;
 127         struct radeon_bo_pb *bo;
 128         struct radeon_bo *hw_bo;
 129
 130         hw_bo = radeon_bo(radeon, handle, 0, 0, NULL);
 131         if (hw_bo == NULL)
 132                 return NULL;
 133
 134         bo = CALLOC_STRUCT(radeon_bo_pb);
 135         if (!bo) {
 136                 radeon_bo_reference(radeon, &hw_bo, NULL);
 137                 return NULL;
 138         }
 139
 140         LIST_INITHEAD(&bo->maplist);
 141         pipe_reference_init(&bo->b.base.reference, 1);
 142         bo->b.base.alignment = 0;
 143         bo->b.base.usage = PB_USAGE_GPU_WRITE | PB_USAGE_GPU_READ;
 144         bo->b.base.size = hw_bo->size;
 145         bo->b.vtbl = &radeon_bo_pb_vtbl;
 146         bo->mgr = mgr;
 147
 148         bo->bo = hw_bo;
 149
 150         return &bo->b;
 151 }
 152
 153 static struct pb_buffer *
 154 radeon_bo_pb_create_buffer(struct pb_manager *_mgr,
 155                            pb_size size,
 156                            const struct pb_desc *desc)
 157 {
 158         struct radeon_bo_pbmgr *mgr = radeon_bo_pbmgr(_mgr);
 159         struct radeon *radeon = mgr->radeon;
 160         struct radeon_bo_pb *bo;
 161         uint32_t domain;
 162
 163         bo = CALLOC_STRUCT(radeon_bo_pb);
 164         if (!bo)
 165                 goto error1;
 166
 167         pipe_reference_init(&bo->b.base.reference, 1);
 168         bo->b.base.alignment = desc->alignment;
 169         bo->b.base.usage = desc->usage;
 170         bo->b.base.size = size;
 171         bo->b.vtbl = &radeon_bo_pb_vtbl;
 172         bo->mgr = mgr;
 173
 174         LIST_INITHEAD(&bo->maplist);
 175
 176         bo->bo = radeon_bo(radeon, 0, size,
 177                            desc->alignment, NULL);
 178         if (bo->bo == NULL)
 179                 goto error2;
 180         return &bo->b;
 181
 182 error2:
 183         FREE(bo);
 184 error1:
 185         return NULL;
 186 }
 187
 188 static void
 189 radeon_bo_pbmgr_flush(struct pb_manager *mgr)
 190 {
 191     /* NOP */
 192 }
 193
 194 static void
 195 radeon_bo_pbmgr_destroy(struct pb_manager *_mgr)
 196 {
 197         struct radeon_bo_pbmgr *mgr = radeon_bo_pbmgr(_mgr);
 198         FREE(mgr);
 199 }
 200
 201 struct pb_manager *radeon_bo_pbmgr_create(struct radeon *radeon)
 202 {
 203         struct radeon_bo_pbmgr *mgr;
 204
 205         mgr = CALLOC_STRUCT(radeon_bo_pbmgr);
 206         if (!mgr)
 207                 return NULL;
 208
 209         mgr->b.destroy = radeon_bo_pbmgr_destroy;
 210         mgr->b.create_buffer = radeon_bo_pb_create_buffer;
 211         mgr->b.flush = radeon_bo_pbmgr_flush;
 212
 213         mgr->radeon = radeon;
 214         LIST_INITHEAD(&mgr->buffer_map_list);
 215         return &mgr->b;
 216 }
 217
 218 void radeon_bo_pbmgr_flush_maps(struct pb_manager *_mgr)
 219 {
 220         struct radeon_bo_pbmgr *mgr = radeon_bo_pbmgr(_mgr);
 221         struct radeon_bo_pb *rpb, *t_rpb;
 222
 223         LIST_FOR_EACH_ENTRY_SAFE(rpb, t_rpb, &mgr->buffer_map_list, maplist) {
 224                 radeon_bo_unmap(mgr->radeon, rpb->bo);
 225                 LIST_DELINIT(&rpb->maplist);
 226         }
 227
 228         LIST_INITHEAD(&mgr->buffer_map_list);
 229 }
 230
 231 struct radeon_bo *radeon_bo_pb_get_bo(struct pb_buffer *_buf)
 232 {
 233         struct radeon_bo_pb *buf;
 234         if (_buf->vtbl == &radeon_bo_pb_vtbl) {
 235                 buf = radeon_bo_pb(_buf);
 236                 return buf->bo;
 237         } else {
 238                 struct pb_buffer *base_buf;
 239                 pb_size offset;
 240                 pb_get_base_buffer(_buf, &base_buf, &offset);
 241                 if (base_buf->vtbl == &radeon_bo_pb_vtbl) {
 242                         buf = radeon_bo_pb(base_buf);
 243                         return buf->bo;
 244                 }
 245         }
 246         return NULL;
 247 }