2 * Copyright 2010 Dave Airlie
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
26 #include <util/u_inlines.h>
27 #include <util/u_memory.h>
28 #include <util/u_double_list.h>
29 #include <pipebuffer/pb_buffer.h>
30 #include <pipebuffer/pb_bufmgr.h>
31 #include "r600_priv.h"
37 struct radeon_bo_pbmgr
*mgr
;
40 extern const struct pb_vtbl radeon_bo_pb_vtbl
;
42 static INLINE
struct radeon_bo_pb
*radeon_bo_pb(struct pb_buffer
*buf
)
45 assert(buf
->vtbl
== &radeon_bo_pb_vtbl
);
46 return (struct radeon_bo_pb
*)buf
;
49 struct radeon_bo_pbmgr
{
51 struct radeon
*radeon
;
54 static INLINE
struct radeon_bo_pbmgr
*radeon_bo_pbmgr(struct pb_manager
*mgr
)
57 return (struct radeon_bo_pbmgr
*)mgr
;
60 static void radeon_bo_pb_destroy(struct pb_buffer
*_buf
)
62 struct radeon_bo_pb
*buf
= radeon_bo_pb(_buf
);
64 /* If this buffer is on the list of buffers to unmap,
65 * do the unmapping now.
67 radeon_bo_unmap(buf
->mgr
->radeon
, buf
->bo
);
68 radeon_bo_reference(buf
->mgr
->radeon
, &buf
->bo
, NULL
);
73 radeon_bo_pb_map_internal(struct pb_buffer
*_buf
,
74 unsigned flags
, void *ctx
)
76 struct radeon_bo_pb
*buf
= radeon_bo_pb(_buf
);
77 struct pipe_context
*pctx
= ctx
;
79 if (flags
& PB_USAGE_UNSYNCHRONIZED
) {
80 if (radeon_bo_map(buf
->mgr
->radeon
, buf
->bo
)) {
86 if (p_atomic_read(&buf
->bo
->reference
.count
) > 1) {
87 if (flags
& PB_USAGE_DONTBLOCK
) {
91 pctx
->flush(pctx
, 0, NULL
);
95 if (flags
& PB_USAGE_DONTBLOCK
) {
97 if (radeon_bo_busy(buf
->mgr
->radeon
, buf
->bo
, &domain
))
99 if (radeon_bo_map(buf
->mgr
->radeon
, buf
->bo
)) {
105 if (radeon_bo_map(buf
->mgr
->radeon
, buf
->bo
)) {
108 if (radeon_bo_wait(buf
->mgr
->radeon
, buf
->bo
)) {
109 radeon_bo_unmap(buf
->mgr
->radeon
, buf
->bo
);
113 return buf
->bo
->data
;
116 static void radeon_bo_pb_unmap_internal(struct pb_buffer
*_buf
)
121 radeon_bo_pb_get_base_buffer(struct pb_buffer
*buf
,
122 struct pb_buffer
**base_buf
,
129 static enum pipe_error
130 radeon_bo_pb_validate(struct pb_buffer
*_buf
,
131 struct pb_validate
*vl
,
139 radeon_bo_pb_fence(struct pb_buffer
*buf
,
140 struct pipe_fence_handle
*fence
)
144 const struct pb_vtbl radeon_bo_pb_vtbl
= {
145 radeon_bo_pb_destroy
,
146 radeon_bo_pb_map_internal
,
147 radeon_bo_pb_unmap_internal
,
148 radeon_bo_pb_validate
,
150 radeon_bo_pb_get_base_buffer
,
154 radeon_bo_pb_create_buffer_from_handle(struct pb_manager
*_mgr
,
157 struct radeon_bo_pbmgr
*mgr
= radeon_bo_pbmgr(_mgr
);
158 struct radeon
*radeon
= mgr
->radeon
;
159 struct radeon_bo_pb
*bo
;
160 struct radeon_bo
*hw_bo
;
162 hw_bo
= radeon_bo(radeon
, handle
, 0, 0);
166 bo
= CALLOC_STRUCT(radeon_bo_pb
);
168 radeon_bo_reference(radeon
, &hw_bo
, NULL
);
172 pipe_reference_init(&bo
->b
.base
.reference
, 1);
173 bo
->b
.base
.alignment
= 0;
174 bo
->b
.base
.usage
= PB_USAGE_GPU_WRITE
| PB_USAGE_GPU_READ
;
175 bo
->b
.base
.size
= hw_bo
->size
;
176 bo
->b
.vtbl
= &radeon_bo_pb_vtbl
;
184 static struct pb_buffer
*
185 radeon_bo_pb_create_buffer(struct pb_manager
*_mgr
,
187 const struct pb_desc
*desc
)
189 struct radeon_bo_pbmgr
*mgr
= radeon_bo_pbmgr(_mgr
);
190 struct radeon
*radeon
= mgr
->radeon
;
191 struct radeon_bo_pb
*bo
;
193 bo
= CALLOC_STRUCT(radeon_bo_pb
);
197 pipe_reference_init(&bo
->b
.base
.reference
, 1);
198 bo
->b
.base
.alignment
= desc
->alignment
;
199 bo
->b
.base
.usage
= desc
->usage
;
200 bo
->b
.base
.size
= size
;
201 bo
->b
.vtbl
= &radeon_bo_pb_vtbl
;
204 bo
->bo
= radeon_bo(radeon
, 0, size
, desc
->alignment
);
216 radeon_bo_pbmgr_flush(struct pb_manager
*mgr
)
222 radeon_bo_pbmgr_destroy(struct pb_manager
*_mgr
)
224 struct radeon_bo_pbmgr
*mgr
= radeon_bo_pbmgr(_mgr
);
228 struct pb_manager
*radeon_bo_pbmgr_create(struct radeon
*radeon
)
230 struct radeon_bo_pbmgr
*mgr
;
232 mgr
= CALLOC_STRUCT(radeon_bo_pbmgr
);
236 mgr
->b
.destroy
= radeon_bo_pbmgr_destroy
;
237 mgr
->b
.create_buffer
= radeon_bo_pb_create_buffer
;
238 mgr
->b
.flush
= radeon_bo_pbmgr_flush
;
240 mgr
->radeon
= radeon
;
244 struct radeon_bo
*radeon_bo_pb_get_bo(struct pb_buffer
*_buf
)
246 struct radeon_bo_pb
*buf
;
247 if (_buf
->vtbl
== &radeon_bo_pb_vtbl
) {
248 buf
= radeon_bo_pb(_buf
);
251 struct pb_buffer
*base_buf
;
253 pb_get_base_buffer(_buf
, &base_buf
, &offset
);
254 if (base_buf
->vtbl
== &radeon_bo_pb_vtbl
) {
255 buf
= radeon_bo_pb(base_buf
);