a57163be03e0d3e8bbfc99e7c5af16f5e0ff50f8
[mesa.git] / src / gallium / winsys / r600 / drm / radeon_ctx.c
1 /*
2 * Copyright 2010 Jerome Glisse <glisse@freedesktop.org>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 *
23 * Authors:
24 * Jerome Glisse
25 */
26 #include <stdio.h>
27 #include <stdlib.h>
28 #include <string.h>
29 #include "radeon_priv.h"
30 #include "radeon_drm.h"
31 #include "bof.h"
32
33 static int radeon_ctx_set_bo_new(struct radeon_ctx *ctx, struct radeon_ws_bo *bo)
34 {
35 if (ctx->nbo >= RADEON_CTX_MAX_PM4)
36 return -EBUSY;
37 radeon_ws_bo_reference(ctx->radeon, &ctx->bo[ctx->nbo], bo);
38 ctx->nbo++;
39 return 0;
40 }
41
42 static struct radeon_ws_bo *radeon_ctx_get_bo(struct radeon_ctx *ctx, unsigned reloc)
43 {
44 struct radeon_cs_reloc *greloc;
45 unsigned i;
46 struct radeon_ws_bo *bo;
47
48 greloc = (void *)(((u8 *)ctx->reloc) + reloc * 4);
49 for (i = 0; i < ctx->nbo; i++) {
50 if (ctx->bo[i]->bo->handle == greloc->handle) {
51 radeon_ws_bo_reference(ctx->radeon, &bo, ctx->bo[i]);
52 return bo;
53 }
54 }
55 fprintf(stderr, "%s no bo for reloc[%d 0x%08X] %d\n", __func__, reloc, greloc->handle, ctx->nbo);
56 return NULL;
57 }
58
59 static void radeon_ctx_get_placement(struct radeon_ctx *ctx, unsigned reloc, u32 *placement)
60 {
61 struct radeon_cs_reloc *greloc;
62 unsigned i;
63
64 placement[0] = 0;
65 placement[1] = 0;
66 greloc = (void *)(((u8 *)ctx->reloc) + reloc * 4);
67 for (i = 0; i < ctx->nbo; i++) {
68 if (ctx->bo[i]->bo->handle == greloc->handle) {
69 placement[0] = greloc->read_domain | greloc->write_domain;
70 placement[1] = placement[0];
71 return;
72 }
73 }
74 }
75
76 void radeon_ctx_clear(struct radeon_ctx *ctx)
77 {
78 for (int i = 0; i < ctx->nbo; i++) {
79 radeon_ws_bo_reference(ctx->radeon, &ctx->bo[i], NULL);
80 }
81 ctx->ndwords = RADEON_CTX_MAX_PM4;
82 ctx->cdwords = 0;
83 ctx->nreloc = 0;
84 ctx->nbo = 0;
85 }
86
87 struct radeon_ctx *radeon_ctx_init(struct radeon *radeon)
88 {
89 struct radeon_ctx *ctx;
90 if (radeon == NULL)
91 return NULL;
92 ctx = calloc(1, sizeof(struct radeon_ctx));
93 ctx->radeon = radeon_incref(radeon);
94 radeon_ctx_clear(ctx);
95 ctx->pm4 = malloc(RADEON_CTX_MAX_PM4 * 4);
96 if (ctx->pm4 == NULL) {
97 radeon_ctx_fini(ctx);
98 return NULL;
99 }
100 ctx->reloc = malloc(sizeof(struct radeon_cs_reloc) * RADEON_CTX_MAX_PM4);
101 if (ctx->reloc == NULL) {
102 radeon_ctx_fini(ctx);
103 return NULL;
104 }
105 ctx->bo = malloc(sizeof(void *) * RADEON_CTX_MAX_PM4);
106 if (ctx->bo == NULL) {
107 radeon_ctx_fini(ctx);
108 return NULL;
109 }
110 return ctx;
111 }
112
113 void radeon_ctx_fini(struct radeon_ctx *ctx)
114 {
115 unsigned i;
116
117 if (ctx == NULL)
118 return;
119
120 for (i = 0; i < ctx->nbo; i++) {
121 radeon_ws_bo_reference(ctx->radeon, &ctx->bo[i], NULL);
122 }
123 ctx->radeon = radeon_decref(ctx->radeon);
124 free(ctx->bo);
125 free(ctx->pm4);
126 free(ctx->reloc);
127 free(ctx);
128 }
129
130 static int radeon_ctx_state_bo(struct radeon_ctx *ctx, struct radeon_state *state)
131 {
132 unsigned i, j;
133 int r;
134
135 if (state == NULL)
136 return 0;
137 for (i = 0; i < state->nbo; i++) {
138 for (j = 0; j < ctx->nbo; j++) {
139 if (state->bo[i] == ctx->bo[j])
140 break;
141 }
142 if (j == ctx->nbo) {
143 r = radeon_ctx_set_bo_new(ctx, state->bo[i]);
144 if (r)
145 return r;
146 }
147 }
148 return 0;
149 }
150
151
152 int radeon_ctx_submit(struct radeon_ctx *ctx)
153 {
154 struct drm_radeon_cs drmib;
155 struct drm_radeon_cs_chunk chunks[2];
156 uint64_t chunk_array[2];
157 int r = 0;
158
159 if (!ctx->cdwords)
160 return 0;
161 #if 0
162 for (r = 0; r < ctx->cdwords; r++) {
163 fprintf(stderr, "0x%08X\n", ctx->pm4[r]);
164 }
165 #endif
166 drmib.num_chunks = 2;
167 drmib.chunks = (uint64_t)(uintptr_t)chunk_array;
168 chunks[0].chunk_id = RADEON_CHUNK_ID_IB;
169 chunks[0].length_dw = ctx->cdwords;
170 chunks[0].chunk_data = (uint64_t)(uintptr_t)ctx->pm4;
171 chunks[1].chunk_id = RADEON_CHUNK_ID_RELOCS;
172 chunks[1].length_dw = ctx->nreloc * sizeof(struct radeon_cs_reloc) / 4;
173 chunks[1].chunk_data = (uint64_t)(uintptr_t)ctx->reloc;
174 chunk_array[0] = (uint64_t)(uintptr_t)&chunks[0];
175 chunk_array[1] = (uint64_t)(uintptr_t)&chunks[1];
176 #if 1
177 r = drmCommandWriteRead(ctx->radeon->fd, DRM_RADEON_CS, &drmib,
178 sizeof(struct drm_radeon_cs));
179 #endif
180 return r;
181 }
182
183 static int radeon_ctx_reloc(struct radeon_ctx *ctx, struct radeon_ws_bo *bo,
184 unsigned id, unsigned *placement)
185 {
186 unsigned i;
187
188 for (i = 0; i < ctx->nreloc; i++) {
189 if (ctx->reloc[i].handle == bo->bo->handle) {
190 ctx->pm4[id] = i * sizeof(struct radeon_cs_reloc) / 4;
191 return 0;
192 }
193 }
194 if (ctx->nreloc >= RADEON_CTX_MAX_PM4) {
195 return -EBUSY;
196 }
197 ctx->reloc[ctx->nreloc].handle = bo->bo->handle;
198 ctx->reloc[ctx->nreloc].read_domain = placement[0] | placement [1];
199 ctx->reloc[ctx->nreloc].write_domain = placement[0] | placement [1];
200 ctx->reloc[ctx->nreloc].flags = 0;
201 ctx->pm4[id] = ctx->nreloc * sizeof(struct radeon_cs_reloc) / 4;
202 ctx->nreloc++;
203 return 0;
204 }
205
206 static int radeon_ctx_state_schedule(struct radeon_ctx *ctx, struct radeon_state *state)
207 {
208 unsigned i, rid, bid, cid;
209 int r;
210
211 if (state == NULL)
212 return 0;
213 if (state->cpm4 > ctx->ndwords) {
214 return -EBUSY;
215 }
216 memcpy(&ctx->pm4[ctx->cdwords], state->pm4, state->cpm4 * 4);
217 for (i = 0; i < state->nreloc; i++) {
218 rid = state->reloc_pm4_id[i];
219 bid = state->reloc_bo_id[i];
220 cid = ctx->cdwords + rid;
221 r = radeon_ctx_reloc(ctx, state->bo[bid], cid,
222 &state->placement[bid * 2]);
223 if (r) {
224 fprintf(stderr, "%s state %d failed to reloc\n", __func__, state->stype->stype);
225 return r;
226 }
227 }
228 ctx->cdwords += state->cpm4;
229 ctx->ndwords -= state->cpm4;
230 return 0;
231 }
232
233 int radeon_ctx_set_query_state(struct radeon_ctx *ctx, struct radeon_state *state)
234 {
235 int r = 0;
236
237 /* !!! ONLY ACCEPT QUERY STATE HERE !!! */
238 r = radeon_state_pm4(state);
239 if (r)
240 return r;
241 /* BEGIN/END query are balanced in the same cs so account for END
242 * END query when scheduling BEGIN query
243 */
244 switch (state->stype->stype) {
245 case R600_STATE_QUERY_BEGIN:
246 /* is there enough place for begin & end */
247 if ((state->cpm4 * 2) > ctx->ndwords)
248 return -EBUSY;
249 ctx->ndwords -= state->cpm4;
250 break;
251 case R600_STATE_QUERY_END:
252 ctx->ndwords += state->cpm4;
253 break;
254 default:
255 return -EINVAL;
256 }
257 return radeon_ctx_state_schedule(ctx, state);
258 }
259
260 int radeon_ctx_set_draw(struct radeon_ctx *ctx, struct radeon_draw *draw)
261 {
262 unsigned previous_cdwords;
263 int r = 0;
264 int i;
265
266 for (i = 0; i < ctx->radeon->max_states; i++) {
267 r = radeon_ctx_state_bo(ctx, draw->state[i]);
268 if (r)
269 return r;
270 }
271 previous_cdwords = ctx->cdwords;
272 for (i = 0; i < ctx->radeon->max_states; i++) {
273 if (draw->state[i]) {
274 r = radeon_ctx_state_schedule(ctx, draw->state[i]);
275 if (r) {
276 ctx->cdwords = previous_cdwords;
277 return r;
278 }
279 }
280 }
281
282 return 0;
283 }
284
285 #if 0
286 int radeon_ctx_pm4(struct radeon_ctx *ctx)
287 {
288 unsigned i;
289 int r;
290
291 free(ctx->pm4);
292 ctx->cpm4 = 0;
293 ctx->pm4 = malloc(ctx->draw_cpm4 * 4);
294 if (ctx->pm4 == NULL)
295 return -EINVAL;
296 for (i = 0, ctx->id = 0; i < ctx->nstate; i++) {
297 }
298 if (ctx->id != ctx->draw_cpm4) {
299 fprintf(stderr, "%s miss predicted pm4 size %d for %d\n",
300 __func__, ctx->draw_cpm4, ctx->id);
301 return -EINVAL;
302 }
303 ctx->cpm4 = ctx->draw_cpm4;
304 return 0;
305 }
306 #endif
307
308 void radeon_ctx_dump_bof(struct radeon_ctx *ctx, const char *file)
309 {
310 bof_t *bcs, *blob, *array, *bo, *size, *handle, *device_id, *root;
311 unsigned i;
312 void *data;
313
314 root = device_id = bcs = blob = array = bo = size = handle = NULL;
315 root = bof_object();
316 if (root == NULL)
317 goto out_err;
318 device_id = bof_int32(ctx->radeon->device);
319 if (device_id == NULL)
320 return;
321 if (bof_object_set(root, "device_id", device_id))
322 goto out_err;
323 bof_decref(device_id);
324 device_id = NULL;
325 /* dump relocs */
326 blob = bof_blob(ctx->nreloc * 16, ctx->reloc);
327 if (blob == NULL)
328 goto out_err;
329 if (bof_object_set(root, "reloc", blob))
330 goto out_err;
331 bof_decref(blob);
332 blob = NULL;
333 /* dump cs */
334 blob = bof_blob(ctx->cdwords * 4, ctx->pm4);
335 if (blob == NULL)
336 goto out_err;
337 if (bof_object_set(root, "pm4", blob))
338 goto out_err;
339 bof_decref(blob);
340 blob = NULL;
341 /* dump bo */
342 array = bof_array();
343 if (array == NULL)
344 goto out_err;
345 for (i = 0; i < ctx->nbo; i++) {
346 bo = bof_object();
347 if (bo == NULL)
348 goto out_err;
349 size = bof_int32(ctx->bo[i]->bo->size);
350 if (size == NULL)
351 goto out_err;
352 if (bof_object_set(bo, "size", size))
353 goto out_err;
354 bof_decref(size);
355 size = NULL;
356 handle = bof_int32(ctx->bo[i]->bo->handle);
357 if (handle == NULL)
358 goto out_err;
359 if (bof_object_set(bo, "handle", handle))
360 goto out_err;
361 bof_decref(handle);
362 handle = NULL;
363 data = radeon_ws_bo_map(ctx->radeon, ctx->bo[i], 0, NULL);
364 blob = bof_blob(ctx->bo[i]->bo->size, data);
365 radeon_ws_bo_unmap(ctx->radeon, ctx->bo[i]);
366 if (blob == NULL)
367 goto out_err;
368 if (bof_object_set(bo, "data", blob))
369 goto out_err;
370 bof_decref(blob);
371 blob = NULL;
372 if (bof_array_append(array, bo))
373 goto out_err;
374 bof_decref(bo);
375 bo = NULL;
376 }
377 if (bof_object_set(root, "bo", array))
378 goto out_err;
379 bof_dump_file(root, file);
380 out_err:
381 bof_decref(blob);
382 bof_decref(array);
383 bof_decref(bo);
384 bof_decref(size);
385 bof_decref(handle);
386 bof_decref(device_id);
387 bof_decref(root);
388 }