2 * Copyright © 2008 Jérôme Glisse
3 * Copyright © 2010 Marek Olšák <maraeo@gmail.com>
6 * Permission is hereby granted, free of charge, to any person obtaining
7 * a copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
15 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
16 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
17 * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
18 * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
23 * The above copyright notice and this permission notice (including the
24 * next paragraph) shall be included in all copies or substantial portions
29 * Marek Olšák <maraeo@gmail.com>
31 * Based on work from libdrm_radeon by:
32 * Aapo Tahkola <aet@rasterburn.org>
33 * Nicolai Haehnle <prefect_@gmx.net>
34 * Jérôme Glisse <glisse@freedesktop.org>
38 This file replaces libdrm's radeon_cs_gem with our own implemention.
39 It's optimized specifically for r300g, but r600g could use it as well.
40 Reloc writes and space checking are faster and simpler than their
41 counterparts in libdrm (the time complexity of all the functions
42 is O(1) in nearly all scenarios, thanks to hashing).
46 cs_add_reloc(cs, buf, read_domain, write_domain) adds a new relocation and
47 also adds the size of 'buf' to the used_gart and used_vram winsys variables
48 based on the domains, which are simply or'd for the accounting purposes.
49 The adding is skipped if the reloc is already present in the list, but it
50 accounts any newly-referenced domains.
52 cs_validate is then called, which just checks:
53 used_vram/gart < vram/gart_size * 0.8
54 The 0.8 number allows for some memory fragmentation. If the validation
55 fails, the pipe driver flushes CS and tries do the validation again,
56 i.e. it validates only that one operation. If it fails again, it drops
57 the operation on the floor and prints some nasty message to stderr.
58 (done in the pipe driver)
60 cs_write_reloc(cs, buf) just writes a reloc that has been added using
61 cs_add_reloc. The read_domain and write_domain parameters have been removed,
62 because we already specify them in cs_add_reloc.
65 #include "radeon_drm_cs.h"
67 #include "util/u_memory.h"
74 #define RELOC_DWORDS (sizeof(struct drm_radeon_cs_reloc) / sizeof(uint32_t))
76 static boolean
radeon_init_cs_context(struct radeon_cs_context
*csc
, int fd
)
80 csc
->relocs_bo
= (struct radeon_bo
**)
81 CALLOC(1, csc
->nrelocs
* sizeof(struct radeon_bo
*));
82 if (!csc
->relocs_bo
) {
86 csc
->relocs
= (struct drm_radeon_cs_reloc
*)
87 CALLOC(1, csc
->nrelocs
* sizeof(struct drm_radeon_cs_reloc
));
93 csc
->chunks
[0].chunk_id
= RADEON_CHUNK_ID_IB
;
94 csc
->chunks
[0].length_dw
= 0;
95 csc
->chunks
[0].chunk_data
= (uint64_t)(uintptr_t)csc
->buf
;
96 csc
->chunks
[1].chunk_id
= RADEON_CHUNK_ID_RELOCS
;
97 csc
->chunks
[1].length_dw
= 0;
98 csc
->chunks
[1].chunk_data
= (uint64_t)(uintptr_t)csc
->relocs
;
100 csc
->chunk_array
[0] = (uint64_t)(uintptr_t)&csc
->chunks
[0];
101 csc
->chunk_array
[1] = (uint64_t)(uintptr_t)&csc
->chunks
[1];
103 csc
->cs
.num_chunks
= 2;
104 csc
->cs
.chunks
= (uint64_t)(uintptr_t)csc
->chunk_array
;
108 static void radeon_cs_context_cleanup(struct radeon_cs_context
*csc
)
112 for (i
= 0; i
< csc
->crelocs
; i
++) {
113 p_atomic_dec(&csc
->relocs_bo
[i
]->num_cs_references
);
114 radeon_bo_reference(&csc
->relocs_bo
[i
], NULL
);
118 csc
->chunks
[0].length_dw
= 0;
119 csc
->chunks
[1].length_dw
= 0;
122 memset(csc
->is_handle_added
, 0, sizeof(csc
->is_handle_added
));
125 static void radeon_destroy_cs_context(struct radeon_cs_context
*csc
)
127 radeon_cs_context_cleanup(csc
);
128 FREE(csc
->relocs_bo
);
132 static struct r300_winsys_cs
*radeon_drm_cs_create(struct r300_winsys_screen
*rws
)
134 struct radeon_drm_winsys
*ws
= radeon_drm_winsys(rws
);
135 struct radeon_drm_cs
*cs
;
137 cs
= CALLOC_STRUCT(radeon_drm_cs
);
144 if (!radeon_init_cs_context(&cs
->csc1
, cs
->ws
->fd
)) {
148 if (!radeon_init_cs_context(&cs
->csc2
, cs
->ws
->fd
)) {
149 radeon_destroy_cs_context(&cs
->csc1
);
154 /* Set the first command buffer as current. */
157 cs
->base
.buf
= cs
->csc
->buf
;
159 p_atomic_inc(&ws
->num_cs
);
163 #define OUT_CS(cs, value) (cs)->buf[(cs)->cdw++] = (value)
165 static INLINE
void update_domains(struct drm_radeon_cs_reloc
*reloc
,
166 enum r300_buffer_domain rd
,
167 enum r300_buffer_domain wd
,
168 enum r300_buffer_domain
*added_domains
)
170 *added_domains
= (rd
| wd
) & ~(reloc
->read_domains
| reloc
->write_domain
);
172 if (reloc
->read_domains
& wd
) {
173 reloc
->read_domains
= rd
;
174 reloc
->write_domain
= wd
;
175 } else if (rd
& reloc
->write_domain
) {
176 reloc
->read_domains
= rd
;
177 reloc
->write_domain
|= wd
;
179 reloc
->read_domains
|= rd
;
180 reloc
->write_domain
|= wd
;
184 int radeon_get_reloc(struct radeon_cs_context
*csc
, struct radeon_bo
*bo
)
186 struct drm_radeon_cs_reloc
*reloc
;
188 unsigned hash
= bo
->handle
& (sizeof(csc
->is_handle_added
)-1);
190 if (csc
->is_handle_added
[hash
]) {
191 reloc
= csc
->relocs_hashlist
[hash
];
192 if (reloc
->handle
== bo
->handle
) {
193 return csc
->reloc_indices_hashlist
[hash
];
196 /* Hash collision, look for the BO in the list of relocs linearly. */
197 for (i
= csc
->crelocs
; i
!= 0;) {
199 reloc
= &csc
->relocs
[i
];
200 if (reloc
->handle
== bo
->handle
) {
201 /* Put this reloc in the hash list.
202 * This will prevent additional hash collisions if there are
203 * several subsequent get_reloc calls of the same buffer.
205 * Example: Assuming buffers A,B,C collide in the hash list,
206 * the following sequence of relocs:
207 * AAAAAAAAAAABBBBBBBBBBBBBBCCCCCCCC
208 * will collide here: ^ and here: ^,
209 * meaning that we should get very few collisions in the end. */
210 csc
->relocs_hashlist
[hash
] = reloc
;
211 csc
->reloc_indices_hashlist
[hash
] = i
;
212 /*printf("write_reloc collision, hash: %i, handle: %i\n", hash, bo->handle);*/
221 static void radeon_add_reloc(struct radeon_cs_context
*csc
,
222 struct radeon_bo
*bo
,
223 enum r300_buffer_domain rd
,
224 enum r300_buffer_domain wd
,
225 enum r300_buffer_domain
*added_domains
)
227 struct drm_radeon_cs_reloc
*reloc
;
229 unsigned hash
= bo
->handle
& (sizeof(csc
->is_handle_added
)-1);
231 if (csc
->is_handle_added
[hash
]) {
232 reloc
= csc
->relocs_hashlist
[hash
];
233 if (reloc
->handle
== bo
->handle
) {
234 update_domains(reloc
, rd
, wd
, added_domains
);
238 /* Hash collision, look for the BO in the list of relocs linearly. */
239 for (i
= csc
->crelocs
; i
!= 0;) {
241 reloc
= &csc
->relocs
[i
];
242 if (reloc
->handle
== bo
->handle
) {
243 update_domains(reloc
, rd
, wd
, added_domains
);
245 csc
->relocs_hashlist
[hash
] = reloc
;
246 csc
->reloc_indices_hashlist
[hash
] = i
;
247 /*printf("write_reloc collision, hash: %i, handle: %i\n", hash, bo->handle);*/
253 /* New relocation, check if the backing array is large enough. */
254 if (csc
->crelocs
>= csc
->nrelocs
) {
258 size
= csc
->nrelocs
* sizeof(struct radeon_bo
*);
259 csc
->relocs_bo
= (struct radeon_bo
**)realloc(csc
->relocs_bo
, size
);
261 size
= csc
->nrelocs
* sizeof(struct drm_radeon_cs_reloc
);
262 csc
->relocs
= (struct drm_radeon_cs_reloc
*)realloc(csc
->relocs
, size
);
264 csc
->chunks
[1].chunk_data
= (uint64_t)(uintptr_t)csc
->relocs
;
267 /* Initialize the new relocation. */
268 p_atomic_inc(&bo
->num_cs_references
);
269 radeon_bo_reference(&csc
->relocs_bo
[csc
->crelocs
], bo
);
270 reloc
= &csc
->relocs
[csc
->crelocs
];
271 reloc
->handle
= bo
->handle
;
272 reloc
->read_domains
= rd
;
273 reloc
->write_domain
= wd
;
276 csc
->is_handle_added
[hash
] = TRUE
;
277 csc
->relocs_hashlist
[hash
] = reloc
;
278 csc
->reloc_indices_hashlist
[hash
] = csc
->crelocs
;
280 csc
->chunks
[1].length_dw
+= RELOC_DWORDS
;
283 *added_domains
= rd
| wd
;
286 static void radeon_drm_cs_add_reloc(struct r300_winsys_cs
*rcs
,
287 struct r300_winsys_cs_handle
*buf
,
288 enum r300_buffer_domain rd
,
289 enum r300_buffer_domain wd
)
291 struct radeon_drm_cs
*cs
= radeon_drm_cs(rcs
);
292 struct radeon_bo
*bo
= (struct radeon_bo
*)buf
;
293 enum r300_buffer_domain added_domains
;
295 radeon_add_reloc(cs
->csc
, bo
, rd
, wd
, &added_domains
);
300 if (added_domains
& R300_DOMAIN_GTT
)
301 cs
->csc
->used_gart
+= bo
->size
;
302 if (added_domains
& R300_DOMAIN_VRAM
)
303 cs
->csc
->used_vram
+= bo
->size
;
306 static boolean
radeon_drm_cs_validate(struct r300_winsys_cs
*rcs
)
308 struct radeon_drm_cs
*cs
= radeon_drm_cs(rcs
);
310 return cs
->csc
->used_gart
< cs
->ws
->gart_size
* 0.8 &&
311 cs
->csc
->used_vram
< cs
->ws
->vram_size
* 0.8;
314 static void radeon_drm_cs_write_reloc(struct r300_winsys_cs
*rcs
,
315 struct r300_winsys_cs_handle
*buf
)
317 struct radeon_drm_cs
*cs
= radeon_drm_cs(rcs
);
318 struct radeon_bo
*bo
= (struct radeon_bo
*)buf
;
320 unsigned index
= radeon_get_reloc(cs
->csc
, bo
);
323 fprintf(stderr
, "r300: Cannot get a relocation in %s.\n", __func__
);
327 OUT_CS(&cs
->base
, 0xc0001000);
328 OUT_CS(&cs
->base
, index
* RELOC_DWORDS
);
331 static PIPE_THREAD_ROUTINE(radeon_drm_cs_emit_ioctl
, param
)
333 struct radeon_cs_context
*csc
= (struct radeon_cs_context
*)param
;
336 if (drmCommandWriteRead(csc
->fd
, DRM_RADEON_CS
,
337 &csc
->cs
, sizeof(struct drm_radeon_cs
))) {
338 if (debug_get_bool_option("RADEON_DUMP_CS", FALSE
)) {
341 fprintf(stderr
, "radeon: The kernel rejected CS, dumping...\n");
342 for (i
= 0; i
< csc
->chunks
[0].length_dw
; i
++) {
343 fprintf(stderr
, "0x%08X\n", csc
->buf
[i
]);
346 fprintf(stderr
, "radeon: The kernel rejected CS, "
347 "see dmesg for more information.\n");
351 for (i
= 0; i
< csc
->crelocs
; i
++)
352 p_atomic_dec(&csc
->relocs_bo
[i
]->num_active_ioctls
);
356 void radeon_drm_cs_sync_flush(struct radeon_drm_cs
*cs
)
358 /* Wait for any pending ioctl to complete. */
360 pipe_thread_wait(cs
->thread
);
365 DEBUG_GET_ONCE_BOOL_OPTION(thread
, "RADEON_THREAD", TRUE
)
367 static void radeon_drm_cs_flush(struct r300_winsys_cs
*rcs
, unsigned flags
)
369 struct radeon_drm_cs
*cs
= radeon_drm_cs(rcs
);
370 struct radeon_cs_context
*tmp
;
372 radeon_drm_cs_sync_flush(cs
);
374 /* If the CS is not empty, emit it in a newly-spawned thread. */
376 unsigned i
, crelocs
= cs
->csc
->crelocs
;
378 cs
->csc
->chunks
[0].length_dw
= cs
->base
.cdw
;
380 for (i
= 0; i
< crelocs
; i
++)
381 p_atomic_inc(&cs
->csc
->relocs_bo
[i
]->num_active_ioctls
);
383 if (cs
->ws
->num_cpus
> 1 && debug_get_option_thread() &&
384 (flags
& R300_FLUSH_ASYNC
)) {
385 cs
->thread
= pipe_thread_create(radeon_drm_cs_emit_ioctl
, cs
->csc
);
388 radeon_drm_cs_emit_ioctl(cs
->csc
);
392 /* Flip command streams. */
397 /* Prepare a new CS. */
398 radeon_cs_context_cleanup(cs
->csc
);
400 cs
->base
.buf
= cs
->csc
->buf
;
404 static void radeon_drm_cs_destroy(struct r300_winsys_cs
*rcs
)
406 struct radeon_drm_cs
*cs
= radeon_drm_cs(rcs
);
407 radeon_drm_cs_sync_flush(cs
);
408 radeon_cs_context_cleanup(&cs
->csc1
);
409 radeon_cs_context_cleanup(&cs
->csc2
);
410 p_atomic_dec(&cs
->ws
->num_cs
);
411 radeon_destroy_cs_context(&cs
->csc1
);
412 radeon_destroy_cs_context(&cs
->csc2
);
416 static void radeon_drm_cs_set_flush(struct r300_winsys_cs
*rcs
,
417 void (*flush
)(void *ctx
, unsigned flags
),
420 struct radeon_drm_cs
*cs
= radeon_drm_cs(rcs
);
421 cs
->flush_cs
= flush
;
422 cs
->flush_data
= user
;
425 static boolean
radeon_bo_is_referenced(struct r300_winsys_cs
*rcs
,
426 struct r300_winsys_cs_handle
*_buf
)
428 struct radeon_drm_cs
*cs
= radeon_drm_cs(rcs
);
429 struct radeon_bo
*bo
= (struct radeon_bo
*)_buf
;
431 return radeon_bo_is_referenced_by_cs(cs
, bo
);
434 void radeon_drm_cs_init_functions(struct radeon_drm_winsys
*ws
)
436 ws
->base
.cs_create
= radeon_drm_cs_create
;
437 ws
->base
.cs_destroy
= radeon_drm_cs_destroy
;
438 ws
->base
.cs_add_reloc
= radeon_drm_cs_add_reloc
;
439 ws
->base
.cs_validate
= radeon_drm_cs_validate
;
440 ws
->base
.cs_write_reloc
= radeon_drm_cs_write_reloc
;
441 ws
->base
.cs_flush
= radeon_drm_cs_flush
;
442 ws
->base
.cs_set_flush
= radeon_drm_cs_set_flush
;
443 ws
->base
.cs_is_buffer_referenced
= radeon_bo_is_referenced
;