src/gallium/winsys/radeon/drm/radeon_drm_winsys.h

   1 /*
   2  * Copyright © 2009 Corbin Simpson
   3  * All Rights Reserved.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining
   6  * a copy of this software and associated documentation files (the
   7  * "Software"), to deal in the Software without restriction, including
   8  * without limitation the rights to use, copy, modify, merge, publish,
   9  * distribute, sub license, and/or sell copies of the Software, and to
  10  * permit persons to whom the Software is furnished to do so, subject to
  11  * the following conditions:
  12  *
  13  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  14  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  15  * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  16  * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
  17  * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  18  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  20  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * The above copyright notice and this permission notice (including the
  23  * next paragraph) shall be included in all copies or substantial portions
  24  * of the Software.
  25  */
  26 /*
  27  * Authors:
  28  *      Corbin Simpson <MostAwesomeDude@gmail.com>
  29  */
  30 #ifndef RADEON_DRM_WINSYS_H
  31 #define RADEON_DRM_WINSYS_H
  32
  33 #include "gallium/drivers/radeon/radeon_winsys.h"
  34 #include "os/os_thread.h"
  35 #include <radeon_drm.h>
  36
  37 #ifndef DRM_RADEON_GEM_USERPTR
  38
  39 #define DRM_RADEON_GEM_USERPTR          0x2d
  40
  41 #define RADEON_GEM_USERPTR_READONLY     (1 << 0)
  42 #define RADEON_GEM_USERPTR_ANONONLY     (1 << 1)
  43 #define RADEON_GEM_USERPTR_VALIDATE     (1 << 2)
  44 #define RADEON_GEM_USERPTR_REGISTER     (1 << 3)
  45
  46 struct drm_radeon_gem_userptr {
  47        uint64_t                addr;
  48        uint64_t                size;
  49        uint32_t                flags;
  50        uint32_t                handle;
  51 };
  52
  53 #endif
  54
  55 struct radeon_drm_cs;
  56
  57 enum radeon_generation {
  58     DRV_R300,
  59     DRV_R600,
  60     DRV_SI
  61 };
  62
  63 struct radeon_drm_winsys {
  64     struct radeon_winsys base;
  65     struct pipe_reference reference;
  66
  67     int fd; /* DRM file descriptor */
  68     int num_cs; /* The number of command streams created. */
  69     uint64_t allocated_vram;
  70     uint64_t allocated_gtt;
  71     uint64_t buffer_wait_time; /* time spent in buffer_wait in ns */
  72     uint64_t num_cs_flushes;
  73
  74     enum radeon_generation gen;
  75     struct radeon_info info;
  76     uint32_t va_start;
  77     uint32_t va_unmap_working;
  78     uint32_t accel_working2;
  79
  80     struct pb_manager *kman;
  81     struct pb_manager *cman;
  82     struct radeon_surface_manager *surf_man;
  83
  84     uint32_t num_cpus;      /* Number of CPUs. */
  85
  86     struct radeon_drm_cs *hyperz_owner;
  87     pipe_mutex hyperz_owner_mutex;
  88     struct radeon_drm_cs *cmask_owner;
  89     pipe_mutex cmask_owner_mutex;
  90
  91     /* rings submission thread */
  92     pipe_mutex cs_stack_lock;
  93     pipe_semaphore cs_queued;
  94     pipe_thread thread;
  95     int kill_thread;
  96     int ncs;
  97     struct radeon_drm_cs *cs_stack[RING_LAST];
  98 };
  99
 100 static inline struct radeon_drm_winsys *
 101 radeon_drm_winsys(struct radeon_winsys *base)
 102 {
 103     return (struct radeon_drm_winsys*)base;
 104 }
 105
 106 void radeon_drm_ws_queue_cs(struct radeon_drm_winsys *ws, struct radeon_drm_cs *cs);
 107 void radeon_surface_init_functions(struct radeon_drm_winsys *ws);
 108
 109 #endif