2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
23 #include "radeon_drm_buffer.h"
25 #include "util/u_memory.h"
26 #include "pipebuffer/pb_bufmgr.h"
28 #include "state_tracker/drm_driver.h"
30 static unsigned get_pb_usage_from_create_flags(unsigned bind
, unsigned usage
,
31 enum r300_buffer_domain domain
)
35 if (bind
& (PIPE_BIND_DEPTH_STENCIL
| PIPE_BIND_RENDER_TARGET
|
36 PIPE_BIND_DISPLAY_TARGET
| PIPE_BIND_SCANOUT
))
37 res
|= PB_USAGE_GPU_WRITE
;
39 if (bind
& PIPE_BIND_SAMPLER_VIEW
)
40 res
|= PB_USAGE_GPU_READ
| PB_USAGE_GPU_WRITE
;
42 if (bind
& (PIPE_BIND_VERTEX_BUFFER
| PIPE_BIND_INDEX_BUFFER
))
43 res
|= PB_USAGE_GPU_READ
;
45 if (bind
& PIPE_BIND_TRANSFER_WRITE
)
46 res
|= PB_USAGE_CPU_WRITE
;
48 if (bind
& PIPE_BIND_TRANSFER_READ
)
49 res
|= PB_USAGE_CPU_READ
;
51 /* Is usage of any use for us? Probably not. */
53 /* Now add driver-specific usage flags. */
54 if (bind
& (PIPE_BIND_VERTEX_BUFFER
| PIPE_BIND_INDEX_BUFFER
))
55 res
|= RADEON_PB_USAGE_VERTEX
;
57 if (domain
& R300_DOMAIN_GTT
)
58 res
|= RADEON_PB_USAGE_DOMAIN_GTT
;
60 if (domain
& R300_DOMAIN_VRAM
)
61 res
|= RADEON_PB_USAGE_DOMAIN_VRAM
;
66 static struct r300_winsys_buffer
*
67 radeon_r300_winsys_buffer_create(struct r300_winsys_screen
*rws
,
72 enum r300_buffer_domain domain
)
74 struct radeon_drm_winsys
*ws
= radeon_drm_winsys(rws
);
76 struct pb_manager
*provider
;
77 struct pb_buffer
*buffer
;
79 memset(&desc
, 0, sizeof(desc
));
80 desc
.alignment
= alignment
;
81 desc
.usage
= get_pb_usage_from_create_flags(bind
, usage
, domain
);
83 /* Assign a buffer manager. */
84 if (bind
& (PIPE_BIND_VERTEX_BUFFER
| PIPE_BIND_INDEX_BUFFER
))
89 buffer
= provider
->create_buffer(provider
, size
, &desc
);
93 return (struct r300_winsys_buffer
*)buffer
;
96 static void radeon_r300_winsys_buffer_reference(struct r300_winsys_screen
*rws
,
97 struct r300_winsys_buffer
**pdst
,
98 struct r300_winsys_buffer
*src
)
100 struct pb_buffer
*_src
= radeon_pb_buffer(src
);
101 struct pb_buffer
*_dst
= radeon_pb_buffer(*pdst
);
103 pb_reference(&_dst
, _src
);
105 *pdst
= (struct r300_winsys_buffer
*)_dst
;
108 static struct r300_winsys_buffer
*radeon_r300_winsys_buffer_from_handle(struct r300_winsys_screen
*rws
,
109 struct winsys_handle
*whandle
,
113 struct radeon_drm_winsys
*ws
= radeon_drm_winsys(rws
);
114 struct pb_buffer
*_buf
;
116 _buf
= radeon_drm_bufmgr_create_buffer_from_handle(ws
->kman
, whandle
->handle
);
119 *stride
= whandle
->stride
;
121 *size
= _buf
->base
.size
;
123 return (struct r300_winsys_buffer
*)_buf
;
126 static boolean
radeon_r300_winsys_buffer_get_handle(struct r300_winsys_screen
*rws
,
127 struct r300_winsys_buffer
*buffer
,
129 struct winsys_handle
*whandle
)
131 struct pb_buffer
*_buf
= radeon_pb_buffer(buffer
);
132 whandle
->stride
= stride
;
133 return radeon_drm_bufmgr_get_handle(_buf
, whandle
);
136 static uint32_t radeon_get_value(struct r300_winsys_screen
*rws
,
137 enum r300_value_id id
)
139 struct radeon_drm_winsys
*ws
= (struct radeon_drm_winsys
*)rws
;
142 case R300_VID_PCI_ID
:
144 case R300_VID_GB_PIPES
:
146 case R300_VID_Z_PIPES
:
148 case R300_VID_SQUARE_TILING_SUPPORT
:
149 return ws
->squaretiling
;
150 case R300_VID_DRM_2_3_0
:
151 return ws
->drm_2_3_0
;
152 case R300_VID_DRM_2_6_0
:
153 return ws
->drm_2_6_0
;
154 case R300_VID_DRM_2_8_0
:
155 return ws
->drm_2_8_0
;
156 case R300_CAN_HYPERZ
:
162 void radeon_winsys_init_functions(struct radeon_drm_winsys
*ws
)
164 ws
->base
.get_value
= radeon_get_value
;
165 ws
->base
.buffer_create
= radeon_r300_winsys_buffer_create
;
166 ws
->base
.buffer_reference
= radeon_r300_winsys_buffer_reference
;
167 ws
->base
.buffer_from_handle
= radeon_r300_winsys_buffer_from_handle
;
168 ws
->base
.buffer_get_handle
= radeon_r300_winsys_buffer_get_handle
;