Merge branch 'gallium-index-bias'
[mesa.git] / src / gallium / winsys / radeon / drm / radeon_r300.c
1 /*
2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
22
23 #include "radeon_r300.h"
24 #include "radeon_buffer.h"
25
26 #include "radeon_bo_gem.h"
27 #include "radeon_cs_gem.h"
28 #include "state_tracker/drm_api.h"
29
30 static struct r300_winsys_buffer *
31 radeon_r300_winsys_buffer_create(struct r300_winsys_screen *rws,
32 unsigned alignment,
33 unsigned usage,
34 unsigned size)
35 {
36 struct radeon_libdrm_winsys *ws = radeon_winsys_screen(rws);
37 struct pb_desc desc;
38 struct pb_manager *provider;
39 struct pb_buffer *buffer;
40
41 memset(&desc, 0, sizeof(desc));
42 desc.alignment = alignment;
43 desc.usage = usage;
44
45 if (usage & PIPE_BIND_CONSTANT_BUFFER)
46 provider = ws->mman;
47 else if ((usage & PIPE_BIND_VERTEX_BUFFER) ||
48 (usage & PIPE_BIND_INDEX_BUFFER))
49 provider = ws->cman;
50 else
51 provider = ws->kman;
52 buffer = provider->create_buffer(provider, size, &desc);
53 if (!buffer)
54 return NULL;
55
56 return radeon_libdrm_winsys_buffer(buffer);
57 }
58
59 static void radeon_r300_winsys_buffer_destroy(struct r300_winsys_buffer *buf)
60 {
61 struct pb_buffer *_buf = radeon_pb_buffer(buf);
62
63 pb_destroy(_buf);
64 }
65 static void radeon_r300_winsys_buffer_set_tiling(struct r300_winsys_screen *rws,
66 struct r300_winsys_buffer *buf,
67 uint32_t pitch,
68 enum r300_buffer_tiling microtiled,
69 enum r300_buffer_tiling macrotiled)
70 {
71 struct pb_buffer *_buf = radeon_pb_buffer(buf);
72 radeon_drm_bufmgr_set_tiling(_buf, microtiled, macrotiled, pitch);
73 }
74
75 static void radeon_r300_winsys_buffer_get_tiling(struct r300_winsys_screen *rws,
76 struct r300_winsys_buffer *buf,
77 enum r300_buffer_tiling *microtiled,
78 enum r300_buffer_tiling *macrotiled)
79 {
80 struct pb_buffer *_buf = radeon_pb_buffer(buf);
81 radeon_drm_bufmgr_get_tiling(_buf, microtiled, macrotiled);
82 }
83
84 static void *radeon_r300_winsys_buffer_map(struct r300_winsys_screen *ws,
85 struct r300_winsys_buffer *buf,
86 unsigned usage)
87 {
88 struct pb_buffer *_buf = radeon_pb_buffer(buf);
89
90 return pb_map(_buf, usage);
91 }
92
93 static void radeon_r300_winsys_buffer_unmap(struct r300_winsys_screen *ws,
94 struct r300_winsys_buffer *buf)
95 {
96 struct pb_buffer *_buf = radeon_pb_buffer(buf);
97
98 pb_unmap(_buf);
99 }
100
101 static void radeon_r300_winsys_buffer_reference(struct r300_winsys_screen *rws,
102 struct r300_winsys_buffer **pdst,
103 struct r300_winsys_buffer *src)
104 {
105 struct pb_buffer *_src = radeon_pb_buffer(src);
106 struct pb_buffer *_dst = radeon_pb_buffer(*pdst);
107
108 pb_reference(&_dst, _src);
109
110 *pdst = radeon_libdrm_winsys_buffer(_dst);
111 }
112
113 static boolean radeon_r300_winsys_is_buffer_referenced(struct r300_winsys_screen *rws,
114 struct r300_winsys_buffer *buf,
115 enum r300_reference_domain domain)
116 {
117 struct pb_buffer *_buf = radeon_pb_buffer(buf);
118
119 return radeon_drm_bufmgr_is_buffer_referenced(_buf, domain);
120 }
121
122 static struct r300_winsys_buffer *radeon_r300_winsys_buffer_from_handle(struct r300_winsys_screen *rws,
123 struct pipe_screen *screen,
124 struct winsys_handle *whandle,
125 unsigned *stride)
126 {
127 struct radeon_libdrm_winsys *ws = radeon_winsys_screen(rws);
128 struct pb_buffer *_buf;
129
130 _buf = radeon_drm_bufmgr_create_buffer_from_handle(ws->kman, whandle->handle);
131 *stride = whandle->stride;
132 return radeon_libdrm_winsys_buffer(_buf);
133 }
134
135 static boolean radeon_r300_winsys_buffer_get_handle(struct r300_winsys_screen *rws,
136 struct r300_winsys_buffer *buffer,
137 unsigned stride,
138 struct winsys_handle *whandle)
139 {
140 struct pb_buffer *_buf = radeon_pb_buffer(buffer);
141 boolean ret;
142 ret = radeon_drm_bufmgr_get_handle(_buf, whandle);
143 if (ret)
144 whandle->stride = stride;
145 return ret;
146 }
147
148 static void radeon_set_flush_cb(struct r300_winsys_screen *rws,
149 void (*flush_cb)(void *),
150 void *data)
151 {
152 struct radeon_libdrm_winsys *ws = radeon_winsys_screen(rws);
153 ws->flush_cb = flush_cb;
154 ws->flush_data = data;
155 radeon_cs_space_set_flush(ws->cs, flush_cb, data);
156 }
157
158 static boolean radeon_add_buffer(struct r300_winsys_screen *rws,
159 struct r300_winsys_buffer *buf,
160 uint32_t rd,
161 uint32_t wd)
162 {
163 struct pb_buffer *_buf = radeon_pb_buffer(buf);
164
165 return radeon_drm_bufmgr_add_buffer(_buf, rd, wd);
166 }
167
168 static boolean radeon_validate(struct r300_winsys_screen *rws)
169 {
170 struct radeon_libdrm_winsys *ws = radeon_winsys_screen(rws);
171 if (radeon_cs_space_check(ws->cs) < 0) {
172 return FALSE;
173 }
174
175 /* Things are fine, we can proceed as normal. */
176 return TRUE;
177 }
178
179 static boolean radeon_check_cs(struct r300_winsys_screen *rws, int size)
180 {
181 struct radeon_libdrm_winsys *ws = radeon_winsys_screen(rws);
182 struct radeon_cs *cs = ws->cs;
183
184 return radeon_validate(rws) && cs->cdw + size <= cs->ndw;
185 }
186
187 static void radeon_begin_cs(struct r300_winsys_screen *rws,
188 int size,
189 const char* file,
190 const char* function,
191 int line)
192 {
193 struct radeon_libdrm_winsys *ws = radeon_winsys_screen(rws);
194 radeon_cs_begin(ws->cs, size, file, function, line);
195 }
196
197 static void radeon_write_cs_dword(struct r300_winsys_screen *rws,
198 uint32_t dword)
199 {
200 struct radeon_libdrm_winsys *ws = radeon_winsys_screen(rws);
201 radeon_cs_write_dword(ws->cs, dword);
202 }
203
204 static void radeon_write_cs_reloc(struct r300_winsys_screen *rws,
205 struct r300_winsys_buffer *buf,
206 uint32_t rd,
207 uint32_t wd,
208 uint32_t flags)
209 {
210 struct pb_buffer *_buf = radeon_pb_buffer(buf);
211 radeon_drm_bufmgr_write_reloc(_buf, rd, wd, flags);
212 }
213
214 static void radeon_reset_bos(struct r300_winsys_screen *rws)
215 {
216 struct radeon_libdrm_winsys *ws = radeon_winsys_screen(rws);
217 radeon_cs_space_reset_bos(ws->cs);
218 }
219
220 static void radeon_end_cs(struct r300_winsys_screen *rws,
221 const char* file,
222 const char* function,
223 int line)
224 {
225 struct radeon_libdrm_winsys *ws = radeon_winsys_screen(rws);
226 radeon_cs_end(ws->cs, file, function, line);
227 }
228
229 static void radeon_flush_cs(struct r300_winsys_screen *rws)
230 {
231 struct radeon_libdrm_winsys *ws = radeon_winsys_screen(rws);
232 int retval;
233
234 /* Don't flush a zero-sized CS. */
235 if (!ws->cs->cdw) {
236 return;
237 }
238
239 radeon_drm_bufmgr_flush_maps(ws->kman);
240 /* Emit the CS. */
241 retval = radeon_cs_emit(ws->cs);
242 if (retval) {
243 debug_printf("radeon: Bad CS, dumping...\n");
244 radeon_cs_print(ws->cs, stderr);
245 }
246
247 /* Reset CS.
248 * Someday, when we care about performance, we should really find a way
249 * to rotate between two or three CS objects so that the GPU can be
250 * spinning through one CS while another one is being filled. */
251 radeon_cs_erase(ws->cs);
252 }
253
254 static uint32_t radeon_get_value(struct r300_winsys_screen *rws,
255 enum r300_value_id id)
256 {
257 struct radeon_libdrm_winsys *ws = (struct radeon_libdrm_winsys *)rws;
258
259 switch(id) {
260 case R300_VID_PCI_ID:
261 return ws->pci_id;
262 case R300_VID_GB_PIPES:
263 return ws->gb_pipes;
264 case R300_VID_Z_PIPES:
265 return ws->z_pipes;
266 case R300_VID_SQUARE_TILING_SUPPORT:
267 return ws->squaretiling;
268 case R300_VID_TEX3D_MIP_BUG:
269 return ws->tex3d_mip_bug;
270 }
271 return 0;
272 }
273
274 static void
275 radeon_winsys_destroy(struct r300_winsys_screen *rws)
276 {
277 struct radeon_libdrm_winsys *ws = (struct radeon_libdrm_winsys *)rws;
278 radeon_cs_destroy(ws->cs);
279
280 ws->cman->destroy(ws->cman);
281 ws->kman->destroy(ws->kman);
282 ws->mman->destroy(ws->mman);
283
284 radeon_bo_manager_gem_dtor(ws->bom);
285 radeon_cs_manager_gem_dtor(ws->csm);
286 }
287
288 boolean
289 radeon_setup_winsys(int fd, struct radeon_libdrm_winsys* ws)
290 {
291
292 ws->csm = radeon_cs_manager_gem_ctor(fd);
293 if (!ws->csm)
294 goto fail;
295 ws->bom = radeon_bo_manager_gem_ctor(fd);
296 if (!ws->bom)
297 goto fail;
298 ws->kman = radeon_drm_bufmgr_create(ws);
299 if (!ws->kman)
300 goto fail;
301
302 ws->cman = pb_cache_manager_create(ws->kman, 100000);
303 if (!ws->cman)
304 goto fail;
305
306 ws->mman = pb_malloc_bufmgr_create();
307 if (!ws->mman)
308 goto fail;
309
310 /* Size limit on IBs is 64 kibibytes. */
311 ws->cs = radeon_cs_create(ws->csm, 1024 * 64 / 4);
312 if (!ws->cs)
313 goto fail;
314 radeon_cs_set_limit(ws->cs,
315 RADEON_GEM_DOMAIN_GTT, ws->gart_size);
316 radeon_cs_set_limit(ws->cs,
317 RADEON_GEM_DOMAIN_VRAM, ws->vram_size);
318
319 ws->base.add_buffer = radeon_add_buffer;
320 ws->base.validate = radeon_validate;
321 ws->base.destroy = radeon_winsys_destroy;
322 ws->base.check_cs = radeon_check_cs;
323 ws->base.begin_cs = radeon_begin_cs;
324 ws->base.write_cs_dword = radeon_write_cs_dword;
325 ws->base.write_cs_reloc = radeon_write_cs_reloc;
326 ws->base.end_cs = radeon_end_cs;
327 ws->base.flush_cs = radeon_flush_cs;
328 ws->base.reset_bos = radeon_reset_bos;
329 ws->base.set_flush_cb = radeon_set_flush_cb;
330 ws->base.get_value = radeon_get_value;
331
332 ws->base.buffer_create = radeon_r300_winsys_buffer_create;
333 ws->base.buffer_destroy = radeon_r300_winsys_buffer_destroy;
334 ws->base.buffer_set_tiling = radeon_r300_winsys_buffer_set_tiling;
335 ws->base.buffer_get_tiling = radeon_r300_winsys_buffer_get_tiling;
336 ws->base.buffer_map = radeon_r300_winsys_buffer_map;
337 ws->base.buffer_unmap = radeon_r300_winsys_buffer_unmap;
338 ws->base.buffer_reference = radeon_r300_winsys_buffer_reference;
339 ws->base.buffer_from_handle = radeon_r300_winsys_buffer_from_handle;
340 ws->base.buffer_get_handle = radeon_r300_winsys_buffer_get_handle;
341 ws->base.is_buffer_referenced = radeon_r300_winsys_is_buffer_referenced;
342 return TRUE;
343
344 fail:
345 if (ws->csm)
346 radeon_cs_manager_gem_dtor(ws->csm);
347
348 if (ws->bom)
349 radeon_bo_manager_gem_dtor(ws->bom);
350
351 if (ws->cman)
352 ws->cman->destroy(ws->cman);
353 if (ws->kman)
354 ws->kman->destroy(ws->kman);
355 if (ws->mman)
356 ws->mman->destroy(ws->mman);
357
358 if (ws->cs)
359 radeon_cs_destroy(ws->cs);
360 return FALSE;
361 }