src/gallium/winsys/radeon/drm/radeon_winsys.h

   1 /*
   2  * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
   3  * Copyright 2010 Marek Olšák <maraeo@gmail.com>
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * on the rights to use, copy, modify, merge, publish, distribute, sub
   9  * license, and/or sell copies of the Software, and to permit persons to whom
  10  * the Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  20  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  21  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  22  * USE OR OTHER DEALINGS IN THE SOFTWARE. */
  23
  24 #ifndef RADEON_WINSYS_H
  25 #define RADEON_WINSYS_H
  26
  27 /* The public winsys interface header for the radeon driver. */
  28
  29 /* R300 features in DRM.
  30  *
  31  * 2.6.0:
  32  * - Hyper-Z
  33  * - GB_Z_PEQ_CONFIG on rv350->r4xx
  34  * - R500 FG_ALPHA_VALUE
  35  *
  36  * 2.8.0:
  37  * - R500 US_FORMAT regs
  38  * - R500 ARGB2101010 colorbuffer
  39  * - CMask and AA regs
  40  * - R16F/RG16F
  41  */
  42
  43 #include "pipebuffer/pb_buffer.h"
  44 #include "libdrm/radeon_surface.h"
  45
  46 #define RADEON_MAX_CMDBUF_DWORDS (16 * 1024)
  47
  48 #define RADEON_FLUSH_ASYNC              (1 << 0)
  49 #define RADEON_FLUSH_KEEP_TILING_FLAGS  (1 << 1) /* needs DRM 2.12.0 */
  50 #define RADEON_FLUSH_COMPUTE            (1 << 2)
  51 #define RADEON_FLUSH_END_OF_FRAME       (1 << 3)
  52
  53 /* Tiling flags. */
  54 enum radeon_bo_layout {
  55     RADEON_LAYOUT_LINEAR = 0,
  56     RADEON_LAYOUT_TILED,
  57     RADEON_LAYOUT_SQUARETILED,
  58
  59     RADEON_LAYOUT_UNKNOWN
  60 };
  61
  62 enum radeon_bo_domain { /* bitfield */
  63     RADEON_DOMAIN_GTT  = 2,
  64     RADEON_DOMAIN_VRAM = 4
  65 };
  66
  67 enum radeon_bo_usage { /* bitfield */
  68     RADEON_USAGE_READ = 2,
  69     RADEON_USAGE_WRITE = 4,
  70     RADEON_USAGE_READWRITE = RADEON_USAGE_READ | RADEON_USAGE_WRITE
  71 };
  72
  73 enum radeon_family {
  74     CHIP_UNKNOWN = 0,
  75     CHIP_R300, /* R3xx-based cores. */
  76     CHIP_R350,
  77     CHIP_RV350,
  78     CHIP_RV370,
  79     CHIP_RV380,
  80     CHIP_RS400,
  81     CHIP_RC410,
  82     CHIP_RS480,
  83     CHIP_R420,     /* R4xx-based cores. */
  84     CHIP_R423,
  85     CHIP_R430,
  86     CHIP_R480,
  87     CHIP_R481,
  88     CHIP_RV410,
  89     CHIP_RS600,
  90     CHIP_RS690,
  91     CHIP_RS740,
  92     CHIP_RV515,    /* R5xx-based cores. */
  93     CHIP_R520,
  94     CHIP_RV530,
  95     CHIP_R580,
  96     CHIP_RV560,
  97     CHIP_RV570,
  98     CHIP_R600,
  99     CHIP_RV610,
 100     CHIP_RV630,
 101     CHIP_RV670,
 102     CHIP_RV620,
 103     CHIP_RV635,
 104     CHIP_RS780,
 105     CHIP_RS880,
 106     CHIP_RV770,
 107     CHIP_RV730,
 108     CHIP_RV710,
 109     CHIP_RV740,
 110     CHIP_CEDAR,
 111     CHIP_REDWOOD,
 112     CHIP_JUNIPER,
 113     CHIP_CYPRESS,
 114     CHIP_HEMLOCK,
 115     CHIP_PALM,
 116     CHIP_SUMO,
 117     CHIP_SUMO2,
 118     CHIP_BARTS,
 119     CHIP_TURKS,
 120     CHIP_CAICOS,
 121     CHIP_CAYMAN,
 122     CHIP_ARUBA,
 123     CHIP_TAHITI,
 124     CHIP_PITCAIRN,
 125     CHIP_VERDE,
 126     CHIP_OLAND,
 127     CHIP_LAST,
 128 };
 129
 130 enum chip_class {
 131     CLASS_UNKNOWN = 0,
 132     R300,
 133     R400,
 134     R500,
 135     R600,
 136     R700,
 137     EVERGREEN,
 138     CAYMAN,
 139     TAHITI,
 140 };
 141
 142 enum ring_type {
 143     RING_GFX = 0,
 144     RING_DMA,
 145     RING_LAST,
 146 };
 147
 148 struct winsys_handle;
 149 struct radeon_winsys_cs_handle;
 150
 151 struct radeon_winsys_cs {
 152     unsigned                    cdw;  /* Number of used dwords. */
 153     uint32_t                    *buf; /* The command buffer. */
 154     enum ring_type              ring_type;
 155 };
 156
 157 struct radeon_info {
 158     uint32_t                    pci_id;
 159     enum radeon_family          family;
 160     enum chip_class             chip_class;
 161     uint32_t                    gart_size;
 162     uint32_t                    vram_size;
 163
 164     uint32_t                    drm_major; /* version */
 165     uint32_t                    drm_minor;
 166     uint32_t                    drm_patchlevel;
 167
 168     uint32_t                    r300_num_gb_pipes;
 169     uint32_t                    r300_num_z_pipes;
 170
 171     uint32_t                    r600_num_backends;
 172     uint32_t                    r600_clock_crystal_freq;
 173     uint32_t                    r600_tiling_config;
 174     uint32_t                    r600_num_tile_pipes;
 175     uint32_t                    r600_backend_map;
 176     uint32_t                    r600_va_start;
 177     uint32_t                    r600_ib_vm_max_size;
 178     uint32_t                    r600_max_pipes;
 179     boolean                     r600_backend_map_valid;
 180     boolean                     r600_virtual_address;
 181     boolean                     r600_has_dma;
 182 };
 183
 184 enum radeon_feature_id {
 185     RADEON_FID_R300_HYPERZ_ACCESS,     /* ZMask + HiZ */
 186     RADEON_FID_R300_CMASK_ACCESS,
 187 };
 188
 189 struct radeon_winsys {
 190     /**
 191      * Reference counting
 192      */
 193     struct pipe_reference reference;
 194
 195     /**
 196      * Destroy this winsys.
 197      *
 198      * \param ws        The winsys this function is called from.
 199      */
 200     void (*destroy)(struct radeon_winsys *ws);
 201
 202     /**
 203      * Query an info structure from winsys.
 204      *
 205      * \param ws        The winsys this function is called from.
 206      * \param info      Return structure
 207      */
 208     void (*query_info)(struct radeon_winsys *ws,
 209                        struct radeon_info *info);
 210
 211     /**************************************************************************
 212      * Buffer management. Buffer attributes are mostly fixed over its lifetime.
 213      *
 214      * Remember that gallium gets to choose the interface it needs, and the
 215      * window systems must then implement that interface (rather than the
 216      * other way around...).
 217      *************************************************************************/
 218
 219     /**
 220      * Create a buffer object.
 221      *
 222      * \param ws        The winsys this function is called from.
 223      * \param size      The size to allocate.
 224      * \param alignment An alignment of the buffer in memory.
 225      * \param use_reusable_pool Whether the cache buffer manager should be used.
 226      * \param domain    A bitmask of the RADEON_DOMAIN_* flags.
 227      * \return          The created buffer object.
 228      */
 229     struct pb_buffer *(*buffer_create)(struct radeon_winsys *ws,
 230                                        unsigned size,
 231                                        unsigned alignment,
 232                                        boolean use_reusable_pool,
 233                                        enum radeon_bo_domain domain);
 234
 235     struct radeon_winsys_cs_handle *(*buffer_get_cs_handle)(
 236             struct pb_buffer *buf);
 237
 238     /**
 239      * Map the entire data store of a buffer object into the client's address
 240      * space.
 241      *
 242      * \param buf       A winsys buffer object to map.
 243      * \param cs        A command stream to flush if the buffer is referenced by it.
 244      * \param usage     A bitmask of the PIPE_TRANSFER_* flags.
 245      * \return          The pointer at the beginning of the buffer.
 246      */
 247     void *(*buffer_map)(struct radeon_winsys_cs_handle *buf,
 248                         struct radeon_winsys_cs *cs,
 249                         enum pipe_transfer_usage usage);
 250
 251     /**
 252      * Unmap a buffer object from the client's address space.
 253      *
 254      * \param buf       A winsys buffer object to unmap.
 255      */
 256     void (*buffer_unmap)(struct radeon_winsys_cs_handle *buf);
 257
 258     /**
 259      * Return TRUE if a buffer object is being used by the GPU.
 260      *
 261      * \param buf       A winsys buffer object.
 262      * \param usage     Only check whether the buffer is busy for the given usage.
 263      */
 264     boolean (*buffer_is_busy)(struct pb_buffer *buf,
 265                               enum radeon_bo_usage usage);
 266
 267     /**
 268      * Wait for a buffer object until it is not used by a GPU. This is
 269      * equivalent to a fence placed after the last command using the buffer,
 270      * and synchronizing to the fence.
 271      *
 272      * \param buf       A winsys buffer object to wait for.
 273      * \param usage     Only wait until the buffer is idle for the given usage,
 274      *                  but may still be busy for some other usage.
 275      */
 276     void (*buffer_wait)(struct pb_buffer *buf, enum radeon_bo_usage usage);
 277
 278     /**
 279      * Return tiling flags describing a memory layout of a buffer object.
 280      *
 281      * \param buf       A winsys buffer object to get the flags from.
 282      * \param macrotile A pointer to the return value of the microtile flag.
 283      * \param microtile A pointer to the return value of the macrotile flag.
 284      *
 285      * \note microtile and macrotile are not bitmasks!
 286      */
 287     void (*buffer_get_tiling)(struct pb_buffer *buf,
 288                               enum radeon_bo_layout *microtile,
 289                               enum radeon_bo_layout *macrotile,
 290                               unsigned *bankw, unsigned *bankh,
 291                               unsigned *tile_split,
 292                               unsigned *stencil_tile_split,
 293                               unsigned *mtilea);
 294
 295     /**
 296      * Set tiling flags describing a memory layout of a buffer object.
 297      *
 298      * \param buf       A winsys buffer object to set the flags for.
 299      * \param cs        A command stream to flush if the buffer is referenced by it.
 300      * \param macrotile A macrotile flag.
 301      * \param microtile A microtile flag.
 302      * \param stride    A stride of the buffer in bytes, for texturing.
 303      *
 304      * \note microtile and macrotile are not bitmasks!
 305      */
 306     void (*buffer_set_tiling)(struct pb_buffer *buf,
 307                               struct radeon_winsys_cs *rcs,
 308                               enum radeon_bo_layout microtile,
 309                               enum radeon_bo_layout macrotile,
 310                               unsigned bankw, unsigned bankh,
 311                               unsigned tile_split,
 312                               unsigned stencil_tile_split,
 313                               unsigned mtilea,
 314                               unsigned stride);
 315
 316     /**
 317      * Get a winsys buffer from a winsys handle. The internal structure
 318      * of the handle is platform-specific and only a winsys should access it.
 319      *
 320      * \param ws        The winsys this function is called from.
 321      * \param whandle   A winsys handle pointer as was received from a state
 322      *                  tracker.
 323      * \param stride    The returned buffer stride in bytes.
 324      */
 325     struct pb_buffer *(*buffer_from_handle)(struct radeon_winsys *ws,
 326                                             struct winsys_handle *whandle,
 327                                             unsigned *stride);
 328
 329     /**
 330      * Get a winsys handle from a winsys buffer. The internal structure
 331      * of the handle is platform-specific and only a winsys should access it.
 332      *
 333      * \param buf       A winsys buffer object to get the handle from.
 334      * \param whandle   A winsys handle pointer.
 335      * \param stride    A stride of the buffer in bytes, for texturing.
 336      * \return          TRUE on success.
 337      */
 338     boolean (*buffer_get_handle)(struct pb_buffer *buf,
 339                                  unsigned stride,
 340                                  struct winsys_handle *whandle);
 341
 342     /**
 343      * Return the virtual address of a buffer.
 344      *
 345      * \param buf       A winsys buffer object
 346      * \return          virtual address
 347      */
 348     uint64_t (*buffer_get_virtual_address)(struct radeon_winsys_cs_handle *buf);
 349
 350     /**************************************************************************
 351      * Command submission.
 352      *
 353      * Each pipe context should create its own command stream and submit
 354      * commands independently of other contexts.
 355      *************************************************************************/
 356
 357     /**
 358      * Create a command stream.
 359      *
 360      * \param ws        The winsys this function is called from.
 361      */
 362     struct radeon_winsys_cs *(*cs_create)(struct radeon_winsys *ws, enum ring_type ring_type);
 363
 364     /**
 365      * Destroy a command stream.
 366      *
 367      * \param cs        A command stream to destroy.
 368      */
 369     void (*cs_destroy)(struct radeon_winsys_cs *cs);
 370
 371     /**
 372      * Add a new buffer relocation. Every relocation must first be added
 373      * before it can be written.
 374      *
 375      * \param cs  A command stream to add buffer for validation against.
 376      * \param buf A winsys buffer to validate.
 377      * \param usage   Whether the buffer is used for read and/or write.
 378      * \param domain  Bitmask of the RADEON_DOMAIN_* flags.
 379      * \return Relocation index.
 380      */
 381     unsigned (*cs_add_reloc)(struct radeon_winsys_cs *cs,
 382                              struct radeon_winsys_cs_handle *buf,
 383                              enum radeon_bo_usage usage,
 384                              enum radeon_bo_domain domain);
 385
 386     /**
 387      * Return TRUE if there is enough memory in VRAM and GTT for the relocs
 388      * added so far. If the validation fails, all the relocations which have
 389      * been added since the last call of cs_validate will be removed and
 390      * the CS will be flushed (provided there are still any relocations).
 391      *
 392      * \param cs        A command stream to validate.
 393      */
 394     boolean (*cs_validate)(struct radeon_winsys_cs *cs);
 395
 396     /**
 397      * Return TRUE if there is enough memory in VRAM and GTT for the relocs
 398      * added so far.
 399      *
 400      * \param cs        A command stream to validate.
 401      * \param vram      VRAM memory size pending to be use
 402      * \param gtt       GTT memory size pending to be use
 403      */
 404     boolean (*cs_memory_below_limit)(struct radeon_winsys_cs *cs, uint64_t vram, uint64_t gtt);
 405
 406     /**
 407      * Write a relocated dword to a command buffer.
 408      *
 409      * \param cs        A command stream the relocation is written to.
 410      * \param buf       A winsys buffer to write the relocation for.
 411      */
 412     void (*cs_write_reloc)(struct radeon_winsys_cs *cs,
 413                            struct radeon_winsys_cs_handle *buf);
 414
 415     /**
 416      * Flush a command stream.
 417      *
 418      * \param cs        A command stream to flush.
 419      * \param flags,    RADEON_FLUSH_ASYNC or 0.
 420      */
 421     void (*cs_flush)(struct radeon_winsys_cs *cs, unsigned flags);
 422
 423     /**
 424      * Set a flush callback which is called from winsys when flush is
 425      * required.
 426      *
 427      * \param cs        A command stream to set the callback for.
 428      * \param flush     A flush callback function associated with the command stream.
 429      * \param user      A user pointer that will be passed to the flush callback.
 430      */
 431     void (*cs_set_flush_callback)(struct radeon_winsys_cs *cs,
 432                                   void (*flush)(void *ctx, unsigned flags),
 433                                   void *ctx);
 434
 435     /**
 436      * Return TRUE if a buffer is referenced by a command stream.
 437      *
 438      * \param cs        A command stream.
 439      * \param buf       A winsys buffer.
 440      */
 441     boolean (*cs_is_buffer_referenced)(struct radeon_winsys_cs *cs,
 442                                        struct radeon_winsys_cs_handle *buf,
 443                                        enum radeon_bo_usage usage);
 444
 445     /**
 446      * Request access to a feature for a command stream.
 447      *
 448      * \param cs        A command stream.
 449      * \param fid       Feature ID, one of RADEON_FID_*
 450      * \param enable    Whether to enable or disable the feature.
 451      */
 452     boolean (*cs_request_feature)(struct radeon_winsys_cs *cs,
 453                                   enum radeon_feature_id fid,
 454                                   boolean enable);
 455      /**
 456       * Make sure all asynchronous flush of the cs have completed
 457       *
 458       * \param cs        A command stream.
 459       */
 460     void (*cs_sync_flush)(struct radeon_winsys_cs *cs);
 461
 462     /**
 463      * Initialize surface
 464      *
 465      * \param ws        The winsys this function is called from.
 466      * \param surf      Surface structure ptr
 467      */
 468     int (*surface_init)(struct radeon_winsys *ws,
 469                         struct radeon_surface *surf);
 470
 471     /**
 472      * Find best values for a surface
 473      *
 474      * \param ws        The winsys this function is called from.
 475      * \param surf      Surface structure ptr
 476      */
 477     int (*surface_best)(struct radeon_winsys *ws,
 478                         struct radeon_surface *surf);
 479
 480     /**
 481      * Return the current timestamp (gpu clock) on r600 and later GPUs.
 482      *
 483      * \param ws        The winsys this function is called from.
 484      */
 485     uint64_t (*query_timestamp)(struct radeon_winsys *ws);
 486 };
 487
 488 #endif